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dfu: Fix up the Kconfig mess
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1/*
2 * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#ifndef _SMSC_SIO1007_H_
8#define _SMSC_SIO1007_H_
9
10/*
11 * The I/O base address of SIO1007 at power-up is determined by the SYSOPT0
12 * and SYSOPT1 pins at the deasserting edge of PCIRST#. The combination of
13 * SYSOPT0 and SYSOPT1 determines one of the following addresses.
14 */
15#define SIO1007_IOPORT0 0x002e
16#define SIO1007_IOPORT1 0x004e
17#define SIO1007_IOPORT2 0x162e
18#define SIO1007_IOPORT3 0x164e
19
20/* SIO1007 registers */
21
22#define DEV_POWER_CTRL 0x02
23#define UART1_POWER_ON (1 << 3)
24#define UART2_POWER_ON (1 << 7)
25
26#define UART1_IOBASE 0x24
27#define UART2_IOBASE 0x25
28#define UART_IRQ 0x28
29
30#define RTR_IOBASE_HIGH 0x21
31#define RTR_IOBASE_LOW 0x30
32
33#define GPIO0_DIR 0x31
34#define GPIO1_DIR 0x35
35#define GPIO_DIR_INPUT 0
36#define GPIO_DIR_OUTPUT 1
37
38#define GPIO0_POL 0x32
39#define GPIO1_POL 0x36
40#define GPIO_POL_NO_INVERT 0
41#define GPIO_POL_INVERT 1
42
43#define GPIO0_TYPE 0x33
44#define GPIO1_TYPE 0x37
45#define GPIO_TYPE_PUSH_PULL 0
46#define GPIO_TYPE_OPEN_DRAIN 1
47
48#define DEV_ACTIVATE 0x3a
49#define RTR_EN (1 << 1)
50
51/* Runtime register offset */
52
53#define GPIO0_DATA 0xc
54#define GPIO1_DATA 0xe
55
56/* Number of serial ports supported */
57#define SIO1007_UART_NUM 2
58
59/* Number of gpio pins supported */
60#define GPIO_NUM_PER_GROUP 8
61#define GPIO_GROUP_NUM 2
62#define SIO1007_GPIO_NUM (GPIO_NUM_PER_GROUP * GPIO_GROUP_NUM)
63
64/**
65 * Configure the I/O port address of the specified serial device and
66 * enable the serial device.
67 *
68 * @port: SIO1007 I/O port address
69 * @num: serial device number (0 or 1)
70 * @iobase: processor I/O port address to assign to this serial device
71 * @irq: processor IRQ number to assign to this serial device
72 */
73void sio1007_enable_serial(int port, int num, int iobase, int irq);
74
75/**
76 * Configure the I/O port address of the runtime register block and
77 * enable the address decoding.
78 *
79 * @port: SIO1007 I/O port address
80 * @iobase: processor I/O port address to assign to the runtime registers
81 */
82void sio1007_enable_runtime(int port, int iobase);
83
84/**
85 * Configure the direction/polority/type of a specified GPIO pin
86 *
87 * @port: SIO1007 I/O port address
88 * @gpio: GPIO number (0-7 for GP10-GP17, 8-15 for GP30-GP37)
89 * @dir: GPIO_DIR_INPUT or GPIO_DIR_OUTPUT
90 * @pol: GPIO_POL_NO_INVERT or GPIO_POL_INVERT
91 * @type: GPIO_TYPE_PUSH_PULL or GPIO_TYPE_OPEN_DRAIN
92 */
93void sio1007_gpio_config(int port, int gpio, int dir, int pol, int type);
94
95/**
96 * Get a GPIO pin value.
97 * This will work whether the GPIO is an input or an output.
98 *
99 * @port: runtime register block I/O port address
100 * @gpio: GPIO number (0-7 for GP10-GP17, 8-15 for GP30-GP37)
101 * @return: 0 if low, 1 if high, -EINVAL if gpio number is invalid
102 */
103int sio1007_gpio_get_value(int port, int gpio);
104
105/**
106 * Set a GPIO pin value.
107 * This will only work when the GPIO is configured as an output.
108 *
109 * @port: runtime register block I/O port address
110 * @gpio: GPIO number (0-7 for GP10-GP17, 8-15 for GP30-GP37)
111 * @val: 0 if low, 1 if high
112 */
113void sio1007_gpio_set_value(int port, int gpio, int val);
114
115#endif /* _SMSC_SIO1007_H_ */