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77f85581 1/*
469146c0
JT
2 * Common SPI Interface: Controller-specific definitions
3 *
77f85581
WD
4 * (C) Copyright 2001
5 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
6 *
1a459660 7 * SPDX-License-Identifier: GPL-2.0+
77f85581
WD
8 */
9
10#ifndef _SPI_H_
11#define _SPI_H_
12
38254f45 13/* SPI mode flags */
465c00d7
JT
14#define SPI_CPHA BIT(0) /* clock phase */
15#define SPI_CPOL BIT(1) /* clock polarity */
16#define SPI_MODE_0 (0|0) /* (original MicroWire) */
17#define SPI_MODE_1 (0|SPI_CPHA)
18#define SPI_MODE_2 (SPI_CPOL|0)
19#define SPI_MODE_3 (SPI_CPOL|SPI_CPHA)
20#define SPI_CS_HIGH BIT(2) /* CS active high */
21#define SPI_LSB_FIRST BIT(3) /* per-word bits-on-wire */
22#define SPI_3WIRE BIT(4) /* SI/SO signals shared */
23#define SPI_LOOP BIT(5) /* loopback mode */
24#define SPI_SLAVE BIT(6) /* slave mode */
25#define SPI_PREAMBLE BIT(7) /* Skip preamble bytes */
29ee0262 26#define SPI_TX_BYTE BIT(8) /* transmit with 1 wire byte */
2b11a41c
JT
27#define SPI_TX_DUAL BIT(9) /* transmit with 2 wires */
28#define SPI_TX_QUAD BIT(10) /* transmit with 4 wires */
08fe9c29 29#define SPI_RX_SLOW BIT(11) /* receive with 1 wire slow */
3ac48d0e
JT
30#define SPI_RX_DUAL BIT(12) /* receive with 2 wires */
31#define SPI_RX_QUAD BIT(13) /* receive with 4 wires */
4e09cc1e 32
bb786b84 33/* Header byte that marks the start of the message */
ce22b922 34#define SPI_PREAMBLE_END_BYTE 0xec
bb786b84 35
5d69df35 36#define SPI_DEFAULT_WORDLEN 8
5753d09b 37
d7af6a48 38#ifdef CONFIG_DM_SPI
d0cff03e 39/* TODO(sjg@chromium.org): Remove this and use max_hz from struct spi_slave */
d7af6a48
SG
40struct dm_spi_bus {
41 uint max_hz;
42};
43
d0cff03e
SG
44/**
45 * struct dm_spi_platdata - platform data for all SPI slaves
46 *
47 * This describes a SPI slave, a child device of the SPI bus. To obtain this
48 * struct from a spi_slave, use dev_get_parent_platdata(dev) or
49 * dev_get_parent_platdata(slave->dev).
50 *
51 * This data is immuatable. Each time the device is probed, @max_hz and @mode
52 * will be copied to struct spi_slave.
53 *
54 * @cs: Chip select number (0..n-1)
55 * @max_hz: Maximum bus speed that this slave can tolerate
56 * @mode: SPI mode to use for this device (see SPI mode flags)
57 */
58struct dm_spi_slave_platdata {
59 unsigned int cs;
60 uint max_hz;
61 uint mode;
62};
63
d7af6a48
SG
64#endif /* CONFIG_DM_SPI */
65
1b1bd9a7 66/**
ce22b922 67 * struct spi_slave - Representation of a SPI slave
d255bb0e 68 *
d7af6a48 69 * For driver model this is the per-child data used by the SPI bus. It can
bcbe3d15 70 * be accessed using dev_get_parent_priv() on the slave device. The SPI uclass
d0cff03e
SG
71 * sets uip per_child_auto_alloc_size to sizeof(struct spi_slave), and the
72 * driver should not override it. Two platform data fields (max_hz and mode)
73 * are copied into this structure to provide an initial value. This allows
74 * them to be changed, since we should never change platform data in drivers.
d255bb0e 75 *
d7af6a48
SG
76 * If not using driver model, drivers are expected to extend this with
77 * controller-specific data.
78 *
79 * @dev: SPI slave device
80 * @max_hz: Maximum speed for this slave
60e2809a
SG
81 * @speed: Current bus speed. This is 0 until the bus is first
82 * claimed.
d7af6a48
SG
83 * @bus: ID of the bus that the slave is attached to. For
84 * driver model this is the sequence number of the SPI
85 * bus (bus->seq) so does not need to be stored
ce22b922 86 * @cs: ID of the chip select connected to the slave.
f5c3c033 87 * @mode: SPI mode to use for this slave (see SPI mode flags)
5753d09b 88 * @wordlen: Size of SPI word in number of bits
8af74edc
ÁFR
89 * @max_read_size: If non-zero, the maximum number of bytes which can
90 * be read at once.
ce22b922 91 * @max_write_size: If non-zero, the maximum number of bytes which can
6c94bd12 92 * be written at once.
ce22b922 93 * @memory_map: Address of read-only SPI flash access.
f77f4691 94 * @flags: Indication of SPI flags.
d255bb0e
HS
95 */
96struct spi_slave {
d7af6a48
SG
97#ifdef CONFIG_DM_SPI
98 struct udevice *dev; /* struct spi_slave is dev->parentdata */
99 uint max_hz;
60e2809a 100 uint speed;
d7af6a48 101#else
1b1bd9a7
JT
102 unsigned int bus;
103 unsigned int cs;
d0cff03e 104#endif
f5c3c033 105 uint mode;
5753d09b 106 unsigned int wordlen;
8af74edc 107 unsigned int max_read_size;
0c456cee 108 unsigned int max_write_size;
004f15b6 109 void *memory_map;
c40f6003 110
f77f4691 111 u8 flags;
29ee0262
JT
112#define SPI_XFER_BEGIN BIT(0) /* Assert CS before transfer */
113#define SPI_XFER_END BIT(1) /* Deassert CS after transfer */
c40f6003 114#define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END)
29ee0262
JT
115#define SPI_XFER_MMAP BIT(2) /* Memory Mapped start */
116#define SPI_XFER_MMAP_END BIT(3) /* Memory Mapped End */
d255bb0e 117};
77f85581 118
1b1bd9a7 119/**
77f85581 120 * Initialization, must be called once on start up.
d255bb0e
HS
121 *
122 * TODO: I don't think we really need this.
77f85581
WD
123 */
124void spi_init(void);
125
ba6c3ce9
SG
126/**
127 * spi_do_alloc_slave - Allocate a new SPI slave (internal)
128 *
129 * Allocate and zero all fields in the spi slave, and set the bus/chip
130 * select. Use the helper macro spi_alloc_slave() to call this.
131 *
1b1bd9a7
JT
132 * @offset: Offset of struct spi_slave within slave structure.
133 * @size: Size of slave structure.
134 * @bus: Bus ID of the slave chip.
135 * @cs: Chip select ID of the slave chip on the specified bus.
ba6c3ce9
SG
136 */
137void *spi_do_alloc_slave(int offset, int size, unsigned int bus,
138 unsigned int cs);
139
140/**
141 * spi_alloc_slave - Allocate a new SPI slave
142 *
143 * Allocate and zero all fields in the spi slave, and set the bus/chip
144 * select.
145 *
1b1bd9a7
JT
146 * @_struct: Name of structure to allocate (e.g. struct tegra_spi).
147 * This structure must contain a member 'struct spi_slave *slave'.
148 * @bus: Bus ID of the slave chip.
149 * @cs: Chip select ID of the slave chip on the specified bus.
ba6c3ce9
SG
150 */
151#define spi_alloc_slave(_struct, bus, cs) \
152 spi_do_alloc_slave(offsetof(_struct, slave), \
153 sizeof(_struct), bus, cs)
154
155/**
156 * spi_alloc_slave_base - Allocate a new SPI slave with no private data
157 *
158 * Allocate and zero all fields in the spi slave, and set the bus/chip
159 * select.
160 *
1b1bd9a7
JT
161 * @bus: Bus ID of the slave chip.
162 * @cs: Chip select ID of the slave chip on the specified bus.
ba6c3ce9
SG
163 */
164#define spi_alloc_slave_base(bus, cs) \
165 spi_do_alloc_slave(0, sizeof(struct spi_slave), bus, cs)
166
1b1bd9a7 167/**
d255bb0e
HS
168 * Set up communications parameters for a SPI slave.
169 *
170 * This must be called once for each slave. Note that this function
171 * usually doesn't touch any actual hardware, it only initializes the
172 * contents of spi_slave so that the hardware can be easily
173 * initialized later.
174 *
1b1bd9a7
JT
175 * @bus: Bus ID of the slave chip.
176 * @cs: Chip select ID of the slave chip on the specified bus.
177 * @max_hz: Maximum SCK rate in Hz.
178 * @mode: Clock polarity, clock phase and other parameters.
d255bb0e
HS
179 *
180 * Returns: A spi_slave reference that can be used in subsequent SPI
181 * calls, or NULL if one or more of the parameters are not supported.
182 */
183struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
184 unsigned int max_hz, unsigned int mode);
185
1b1bd9a7 186/**
d255bb0e
HS
187 * Free any memory associated with a SPI slave.
188 *
1b1bd9a7 189 * @slave: The SPI slave
d255bb0e
HS
190 */
191void spi_free_slave(struct spi_slave *slave);
192
1b1bd9a7 193/**
d255bb0e
HS
194 * Claim the bus and prepare it for communication with a given slave.
195 *
196 * This must be called before doing any transfers with a SPI slave. It
197 * will enable and initialize any SPI hardware as necessary, and make
198 * sure that the SCK line is in the correct idle state. It is not
199 * allowed to claim the same bus for several slaves without releasing
200 * the bus in between.
201 *
1b1bd9a7 202 * @slave: The SPI slave
d255bb0e
HS
203 *
204 * Returns: 0 if the bus was claimed successfully, or a negative value
205 * if it wasn't.
206 */
207int spi_claim_bus(struct spi_slave *slave);
208
1b1bd9a7 209/**
d255bb0e
HS
210 * Release the SPI bus
211 *
212 * This must be called once for every call to spi_claim_bus() after
213 * all transfers have finished. It may disable any SPI hardware as
214 * appropriate.
215 *
1b1bd9a7 216 * @slave: The SPI slave
d255bb0e
HS
217 */
218void spi_release_bus(struct spi_slave *slave);
77f85581 219
5753d09b
NK
220/**
221 * Set the word length for SPI transactions
222 *
223 * Set the word length (number of bits per word) for SPI transactions.
224 *
225 * @slave: The SPI slave
226 * @wordlen: The number of bits in a word
227 *
228 * Returns: 0 on success, -1 on failure.
229 */
230int spi_set_wordlen(struct spi_slave *slave, unsigned int wordlen);
231
1b1bd9a7 232/**
77f85581
WD
233 * SPI transfer
234 *
235 * This writes "bitlen" bits out the SPI MOSI port and simultaneously clocks
236 * "bitlen" bits in the SPI MISO port. That's just the way SPI works.
237 *
238 * The source of the outgoing bits is the "dout" parameter and the
239 * destination of the input bits is the "din" parameter. Note that "dout"
240 * and "din" can point to the same memory location, in which case the
241 * input data overwrites the output data (since both are buffered by
242 * temporary variables, this is OK).
243 *
77f85581 244 * spi_xfer() interface:
1b1bd9a7
JT
245 * @slave: The SPI slave which will be sending/receiving the data.
246 * @bitlen: How many bits to write and read.
247 * @dout: Pointer to a string of bits to send out. The bits are
d255bb0e 248 * held in a byte array and are sent MSB first.
1b1bd9a7
JT
249 * @din: Pointer to a string of bits that will be filled in.
250 * @flags: A bitwise combination of SPI_XFER_* flags.
77f85581 251 *
1b1bd9a7 252 * Returns: 0 on success, not 0 on failure
77f85581 253 */
d255bb0e
HS
254int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
255 void *din, unsigned long flags);
256
146bad96
TR
257/* Copy memory mapped data */
258void spi_flash_copy_mmap(void *data, void *offset, size_t len);
259
1b1bd9a7 260/**
d255bb0e
HS
261 * Determine if a SPI chipselect is valid.
262 * This function is provided by the board if the low-level SPI driver
263 * needs it to determine if a given chipselect is actually valid.
264 *
265 * Returns: 1 if bus:cs identifies a valid chip on this board, 0
266 * otherwise.
267 */
d7af6a48 268int spi_cs_is_valid(unsigned int bus, unsigned int cs);
d255bb0e 269
d7af6a48 270#ifndef CONFIG_DM_SPI
1b1bd9a7 271/**
d255bb0e
HS
272 * Activate a SPI chipselect.
273 * This function is provided by the board code when using a driver
274 * that can't control its chipselects automatically (e.g.
275 * common/soft_spi.c). When called, it should activate the chip select
276 * to the device identified by "slave".
277 */
278void spi_cs_activate(struct spi_slave *slave);
279
1b1bd9a7 280/**
d255bb0e
HS
281 * Deactivate a SPI chipselect.
282 * This function is provided by the board code when using a driver
283 * that can't control its chipselects automatically (e.g.
284 * common/soft_spi.c). When called, it should deactivate the chip
285 * select to the device identified by "slave".
286 */
287void spi_cs_deactivate(struct spi_slave *slave);
288
1b1bd9a7 289/**
fa1423e7
TC
290 * Set transfer speed.
291 * This sets a new speed to be applied for next spi_xfer().
1b1bd9a7
JT
292 * @slave: The SPI slave
293 * @hz: The transfer speed
fa1423e7
TC
294 */
295void spi_set_speed(struct spi_slave *slave, uint hz);
d7af6a48 296#endif
fa1423e7 297
1b1bd9a7 298/**
d255bb0e 299 * Write 8 bits, then read 8 bits.
1b1bd9a7
JT
300 * @slave: The SPI slave we're communicating with
301 * @byte: Byte to be written
d255bb0e
HS
302 *
303 * Returns: The value that was read, or a negative value on error.
304 *
305 * TODO: This function probably shouldn't be inlined.
306 */
307static inline int spi_w8r8(struct spi_slave *slave, unsigned char byte)
308{
309 unsigned char dout[2];
310 unsigned char din[2];
311 int ret;
312
313 dout[0] = byte;
314 dout[1] = 0;
38254f45 315
d255bb0e
HS
316 ret = spi_xfer(slave, 16, dout, din, SPI_XFER_BEGIN | SPI_XFER_END);
317 return ret < 0 ? ret : din[1];
318}
77f85581 319
d7af6a48
SG
320#ifdef CONFIG_DM_SPI
321
322/**
323 * struct spi_cs_info - Information about a bus chip select
324 *
325 * @dev: Connected device, or NULL if none
326 */
327struct spi_cs_info {
328 struct udevice *dev;
329};
330
331/**
332 * struct struct dm_spi_ops - Driver model SPI operations
333 *
334 * The uclass interface is implemented by all SPI devices which use
335 * driver model.
336 */
337struct dm_spi_ops {
338 /**
339 * Claim the bus and prepare it for communication.
340 *
341 * The device provided is the slave device. It's parent controller
342 * will be used to provide the communication.
343 *
344 * This must be called before doing any transfers with a SPI slave. It
345 * will enable and initialize any SPI hardware as necessary, and make
346 * sure that the SCK line is in the correct idle state. It is not
347 * allowed to claim the same bus for several slaves without releasing
348 * the bus in between.
349 *
9694b724 350 * @dev: The SPI slave
d7af6a48
SG
351 *
352 * Returns: 0 if the bus was claimed successfully, or a negative value
353 * if it wasn't.
354 */
9694b724 355 int (*claim_bus)(struct udevice *dev);
d7af6a48
SG
356
357 /**
358 * Release the SPI bus
359 *
360 * This must be called once for every call to spi_claim_bus() after
361 * all transfers have finished. It may disable any SPI hardware as
362 * appropriate.
363 *
9694b724 364 * @dev: The SPI slave
d7af6a48 365 */
9694b724 366 int (*release_bus)(struct udevice *dev);
d7af6a48
SG
367
368 /**
369 * Set the word length for SPI transactions
370 *
371 * Set the word length (number of bits per word) for SPI transactions.
372 *
373 * @bus: The SPI slave
374 * @wordlen: The number of bits in a word
375 *
376 * Returns: 0 on success, -ve on failure.
377 */
9694b724 378 int (*set_wordlen)(struct udevice *dev, unsigned int wordlen);
d7af6a48
SG
379
380 /**
381 * SPI transfer
382 *
383 * This writes "bitlen" bits out the SPI MOSI port and simultaneously
384 * clocks "bitlen" bits in the SPI MISO port. That's just the way SPI
385 * works.
386 *
387 * The source of the outgoing bits is the "dout" parameter and the
388 * destination of the input bits is the "din" parameter. Note that
389 * "dout" and "din" can point to the same memory location, in which
390 * case the input data overwrites the output data (since both are
391 * buffered by temporary variables, this is OK).
392 *
393 * spi_xfer() interface:
394 * @dev: The slave device to communicate with
395 * @bitlen: How many bits to write and read.
396 * @dout: Pointer to a string of bits to send out. The bits are
397 * held in a byte array and are sent MSB first.
398 * @din: Pointer to a string of bits that will be filled in.
399 * @flags: A bitwise combination of SPI_XFER_* flags.
400 *
401 * Returns: 0 on success, not -1 on failure
402 */
403 int (*xfer)(struct udevice *dev, unsigned int bitlen, const void *dout,
404 void *din, unsigned long flags);
405
406 /**
407 * Set transfer speed.
408 * This sets a new speed to be applied for next spi_xfer().
409 * @bus: The SPI bus
410 * @hz: The transfer speed
411 * @return 0 if OK, -ve on error
412 */
413 int (*set_speed)(struct udevice *bus, uint hz);
414
415 /**
416 * Set the SPI mode/flags
417 *
418 * It is unclear if we want to set speed and mode together instead
419 * of separately.
420 *
421 * @bus: The SPI bus
422 * @mode: Requested SPI mode (SPI_... flags)
423 * @return 0 if OK, -ve on error
424 */
425 int (*set_mode)(struct udevice *bus, uint mode);
426
427 /**
428 * Get information on a chip select
429 *
430 * This is only called when the SPI uclass does not know about a
431 * chip select, i.e. it has no attached device. It gives the driver
432 * a chance to allow activity on that chip select even so.
433 *
434 * @bus: The SPI bus
435 * @cs: The chip select (0..n-1)
436 * @info: Returns information about the chip select, if valid.
437 * On entry info->dev is NULL
438 * @return 0 if OK (and @info is set up), -ENODEV if the chip select
439 * is invalid, other -ve value on error
440 */
441 int (*cs_info)(struct udevice *bus, uint cs, struct spi_cs_info *info);
442};
443
c60e1f25
SG
444struct dm_spi_emul_ops {
445 /**
446 * SPI transfer
447 *
448 * This writes "bitlen" bits out the SPI MOSI port and simultaneously
449 * clocks "bitlen" bits in the SPI MISO port. That's just the way SPI
450 * works. Here the device is a slave.
451 *
452 * The source of the outgoing bits is the "dout" parameter and the
453 * destination of the input bits is the "din" parameter. Note that
454 * "dout" and "din" can point to the same memory location, in which
455 * case the input data overwrites the output data (since both are
456 * buffered by temporary variables, this is OK).
457 *
458 * spi_xfer() interface:
459 * @slave: The SPI slave which will be sending/receiving the data.
460 * @bitlen: How many bits to write and read.
461 * @dout: Pointer to a string of bits sent to the device. The
462 * bits are held in a byte array and are sent MSB first.
463 * @din: Pointer to a string of bits that will be sent back to
464 * the master.
465 * @flags: A bitwise combination of SPI_XFER_* flags.
466 *
467 * Returns: 0 on success, not -1 on failure
468 */
469 int (*xfer)(struct udevice *slave, unsigned int bitlen,
470 const void *dout, void *din, unsigned long flags);
471};
472
d7af6a48
SG
473/**
474 * spi_find_bus_and_cs() - Find bus and slave devices by number
475 *
476 * Given a bus number and chip select, this finds the corresponding bus
477 * device and slave device. Neither device is activated by this function,
478 * although they may have been activated previously.
479 *
480 * @busnum: SPI bus number
481 * @cs: Chip select to look for
482 * @busp: Returns bus device
483 * @devp: Return slave device
484 * @return 0 if found, -ENODEV on error
485 */
486int spi_find_bus_and_cs(int busnum, int cs, struct udevice **busp,
487 struct udevice **devp);
488
489/**
490 * spi_get_bus_and_cs() - Find and activate bus and slave devices by number
491 *
492 * Given a bus number and chip select, this finds the corresponding bus
493 * device and slave device.
494 *
495 * If no such slave exists, and drv_name is not NULL, then a new slave device
496 * is automatically bound on this chip select.
497 *
498 * Ths new slave device is probed ready for use with the given speed and mode.
499 *
500 * @busnum: SPI bus number
501 * @cs: Chip select to look for
502 * @speed: SPI speed to use for this slave
503 * @mode: SPI mode to use for this slave
504 * @drv_name: Name of driver to attach to this chip select
505 * @dev_name: Name of the new device thus created
506 * @busp: Returns bus device
507 * @devp: Return slave device
508 * @return 0 if found, -ve on error
509 */
510int spi_get_bus_and_cs(int busnum, int cs, int speed, int mode,
511 const char *drv_name, const char *dev_name,
512 struct udevice **busp, struct spi_slave **devp);
513
514/**
515 * spi_chip_select() - Get the chip select for a slave
516 *
517 * @return the chip select this slave is attached to
518 */
519int spi_chip_select(struct udevice *slave);
520
ff56bba2
SG
521/**
522 * spi_find_chip_select() - Find the slave attached to chip select
523 *
524 * @bus: SPI bus to search
525 * @cs: Chip select to look for
526 * @devp: Returns the slave device if found
527 * @return 0 if found, -ENODEV on error
528 */
529int spi_find_chip_select(struct udevice *bus, int cs, struct udevice **devp);
530
d7af6a48 531/**
d0cff03e 532 * spi_slave_ofdata_to_platdata() - decode standard SPI platform data
d7af6a48 533 *
d0cff03e 534 * This decodes the speed and mode for a slave from a device tree node
d7af6a48
SG
535 *
536 * @blob: Device tree blob
537 * @node: Node offset to read from
d0cff03e 538 * @plat: Place to put the decoded information
d7af6a48 539 */
279e26f5 540int spi_slave_ofdata_to_platdata(struct udevice *dev,
d0cff03e 541 struct dm_spi_slave_platdata *plat);
d7af6a48
SG
542
543/**
544 * spi_cs_info() - Check information on a chip select
545 *
546 * This checks a particular chip select on a bus to see if it has a device
547 * attached, or is even valid.
548 *
549 * @bus: The SPI bus
550 * @cs: The chip select (0..n-1)
551 * @info: Returns information about the chip select, if valid
552 * @return 0 if OK (and @info is set up), -ENODEV if the chip select
553 * is invalid, other -ve value on error
554 */
555int spi_cs_info(struct udevice *bus, uint cs, struct spi_cs_info *info);
556
557struct sandbox_state;
c60e1f25
SG
558
559/**
560 * sandbox_spi_get_emul() - get an emulator for a SPI slave
561 *
562 * This provides a way to attach an emulated SPI device to a particular SPI
563 * slave, so that xfer() operations on the slave will be handled by the
564 * emulator. If a emulator already exists on that chip select it is returned.
565 * Otherwise one is created.
566 *
567 * @state: Sandbox state
568 * @bus: SPI bus requesting the emulator
569 * @slave: SPI slave device requesting the emulator
570 * @emuip: Returns pointer to emulator
571 * @return 0 if OK, -ve on error
572 */
d7af6a48
SG
573int sandbox_spi_get_emul(struct sandbox_state *state,
574 struct udevice *bus, struct udevice *slave,
575 struct udevice **emulp);
576
7a3eff4c
PF
577/**
578 * Claim the bus and prepare it for communication with a given slave.
579 *
580 * This must be called before doing any transfers with a SPI slave. It
581 * will enable and initialize any SPI hardware as necessary, and make
582 * sure that the SCK line is in the correct idle state. It is not
583 * allowed to claim the same bus for several slaves without releasing
584 * the bus in between.
585 *
586 * @dev: The SPI slave device
587 *
588 * Returns: 0 if the bus was claimed successfully, or a negative value
589 * if it wasn't.
590 */
591int dm_spi_claim_bus(struct udevice *dev);
592
593/**
594 * Release the SPI bus
595 *
596 * This must be called once for every call to dm_spi_claim_bus() after
597 * all transfers have finished. It may disable any SPI hardware as
598 * appropriate.
599 *
600 * @slave: The SPI slave device
601 */
602void dm_spi_release_bus(struct udevice *dev);
603
604/**
605 * SPI transfer
606 *
607 * This writes "bitlen" bits out the SPI MOSI port and simultaneously clocks
608 * "bitlen" bits in the SPI MISO port. That's just the way SPI works.
609 *
610 * The source of the outgoing bits is the "dout" parameter and the
611 * destination of the input bits is the "din" parameter. Note that "dout"
612 * and "din" can point to the same memory location, in which case the
613 * input data overwrites the output data (since both are buffered by
614 * temporary variables, this is OK).
615 *
616 * dm_spi_xfer() interface:
617 * @dev: The SPI slave device which will be sending/receiving the data.
618 * @bitlen: How many bits to write and read.
619 * @dout: Pointer to a string of bits to send out. The bits are
620 * held in a byte array and are sent MSB first.
621 * @din: Pointer to a string of bits that will be filled in.
622 * @flags: A bitwise combination of SPI_XFER_* flags.
623 *
624 * Returns: 0 on success, not 0 on failure
625 */
626int dm_spi_xfer(struct udevice *dev, unsigned int bitlen,
627 const void *dout, void *din, unsigned long flags);
628
bc5701e1 629/* Access the operations for a SPI device */
d7af6a48 630#define spi_get_ops(dev) ((struct dm_spi_ops *)(dev)->driver->ops)
c60e1f25 631#define spi_emul_get_ops(dev) ((struct dm_spi_emul_ops *)(dev)->driver->ops)
d7af6a48
SG
632#endif /* CONFIG_DM_SPI */
633
77f85581 634#endif /* _SPI_H_ */