[people/ms/u-boot.git] / include / virtex2.h

/*
 * (C) Copyright 2002
 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
 * Keith Outwater, keith_outwater@mvis.com
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 *
 */

#ifndef _VIRTEX2_H_
#define _VIRTEX2_H_

#include <xilinx.h>

extern int Virtex2_load( Xilinx_desc *desc, void *image, size_t size );
extern int Virtex2_dump( Xilinx_desc *desc, void *buf, size_t bsize );
extern int Virtex2_info( Xilinx_desc *desc );

/*
 * Slave SelectMap Implementation function table.
 */
typedef struct {
	Xilinx_pre_fn	pre;
	Xilinx_pgm_fn	pgm;
	Xilinx_init_fn	init;
	Xilinx_err_fn	err;
	Xilinx_done_fn	done;
	Xilinx_clk_fn	clk;
	Xilinx_cs_fn	cs;
	Xilinx_wr_fn	wr;
	Xilinx_rdata_fn	rdata;
	Xilinx_wdata_fn	wdata;
	Xilinx_busy_fn	busy;
	Xilinx_abort_fn	abort;
	Xilinx_post_fn	post;
} Xilinx_Virtex2_Slave_SelectMap_fns;

/* Slave Serial Implementation function table */
typedef struct {
	Xilinx_pgm_fn	pgm;
	Xilinx_clk_fn	clk;
	Xilinx_rdata_fn	rdata;
	Xilinx_wdata_fn	wdata;
} Xilinx_Virtex2_Slave_Serial_fns;

/* Device Image Sizes (in bytes)
 *********************************************************************/
#define XILINX_XC2V40_SIZE		(338208 / 8)
#define XILINX_XC2V80_SIZE		(597408 / 8)
#define XILINX_XC2V250_SIZE		(1591584 / 8)
#define XILINX_XC2V500_SIZE		(2557857 / 8)
#define XILINX_XC2V1000_SIZE	(3749408 / 8)
#define XILINX_XC2V1500_SIZE	(5166240 / 8)
#define XILINX_XC2V2000_SIZE	(6808352 / 8)
#define XILINX_XC2V3000_SIZE	(9589408 / 8)
#define XILINX_XC2V4000_SIZE	(14220192 / 8)
#define XILINX_XC2V6000_SIZE	(19752096 / 8)
#define XILINX_XC2V8000_SIZE	(26185120 / 8)
#define XILINX_XC2V10000_SIZE	(33519264 / 8)

/* Descriptor Macros
 *********************************************************************/
#define XILINX_XC2V40_DESC(iface, fn_table, cookie)	\
{ Xilinx_Virtex2, iface, XILINX_XC2V40_SIZE, fn_table, cookie }

#define XILINX_XC2V80_DESC(iface, fn_table, cookie) \
{ Xilinx_Virtex2, iface, XILINX_XC2V80_SIZE, fn_table, cookie }

#define XILINX_XC2V250_DESC(iface, fn_table, cookie) \
{ Xilinx_Virtex2, iface, XILINX_XC2V250_SIZE, fn_table, cookie }

#define XILINX_XC2V500_DESC(iface, fn_table, cookie) \
{ Xilinx_Virtex2, iface, XILINX_XC2V500_SIZE, fn_table, cookie }

#define XILINX_XC2V1000_DESC(iface, fn_table, cookie) \
{ Xilinx_Virtex2, iface, XILINX_XC2V1000_SIZE, fn_table, cookie }

#define XILINX_XC2V1500_DESC(iface, fn_table, cookie) \
{ Xilinx_Virtex2, iface, XILINX_XC2V1500_SIZE, fn_table, cookie }

#define XILINX_XC2V2000_DESC(iface, fn_table, cookie) \
{ Xilinx_Virtex2, iface, XILINX_XC2V2000_SIZE, fn_table, cookie }

#define XILINX_XC2V3000_DESC(iface, fn_table, cookie) \
{ Xilinx_Virtex2, iface, XILINX_XC2V3000_SIZE, fn_table, cookie }

#define XILINX_XC2V4000_DESC(iface, fn_table, cookie) \
{ Xilinx_Virtex2, iface, XILINX_XC2V4000_SIZE, fn_table, cookie }

#define XILINX_XC2V6000_DESC(iface, fn_table, cookie) \
{ Xilinx_Virtex2, iface, XILINX_XC2V6000_SIZE, fn_table, cookie }

#define XILINX_XC2V8000_DESC(iface, fn_table, cookie) \
{ Xilinx_Virtex2, iface, XILINX_XC2V8000_SIZE, fn_table, cookie }

#define XILINX_XC2V10000_DESC(iface, fn_table, cookie) \
{ Xilinx_Virtex2, iface, XILINX_XC2V10000_SIZE, fn_table, cookie }

#endif /* _VIRTEX2_H_ */
Commit	Line	Data
c609719b WD	1	/*
	2	* (C) Copyright 2002
	3	* Rich Ireland, Enterasys Networks, rireland@enterasys.com.
	4	* Keith Outwater, keith_outwater@mvis.com
	5	*
	6	* See file CREDITS for list of people who contributed to this
	7	* project.
	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License as
	11	* published by the Free Software Foundation; either version 2 of
	12	* the License, or (at your option) any later version.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	22	* MA 02111-1307 USA
	23	*
	24	*/
	25
	26	#ifndef _VIRTEX2_H_
	27	#define _VIRTEX2_H_
	28
	29	#include <xilinx.h>
	30
	31	extern int Virtex2_load( Xilinx_desc desc, void image, size_t size );
	32	extern int Virtex2_dump( Xilinx_desc desc, void buf, size_t bsize );
	33	extern int Virtex2_info( Xilinx_desc *desc );
c609719b WD	34
	35	/*
	36	* Slave SelectMap Implementation function table.
	37	*/
	38	typedef struct {
	39	Xilinx_pre_fn pre;
	40	Xilinx_pgm_fn pgm;
	41	Xilinx_init_fn init;
	42	Xilinx_err_fn err;
	43	Xilinx_done_fn done;
	44	Xilinx_clk_fn clk;
	45	Xilinx_cs_fn cs;
	46	Xilinx_wr_fn wr;
	47	Xilinx_rdata_fn rdata;
	48	Xilinx_wdata_fn wdata;
	49	Xilinx_busy_fn busy;
	50	Xilinx_abort_fn abort;
	51	Xilinx_post_fn post;
c609719b WD	52	} Xilinx_Virtex2_Slave_SelectMap_fns;
	53
	54	/* Slave Serial Implementation function table */
	55	typedef struct {
	56	Xilinx_pgm_fn pgm;
	57	Xilinx_clk_fn clk;
	58	Xilinx_rdata_fn rdata;
	59	Xilinx_wdata_fn wdata;
c609719b WD	60	} Xilinx_Virtex2_Slave_Serial_fns;
	61
	62	/* Device Image Sizes (in bytes)
	63	*********************************************************************/
	64	#define XILINX_XC2V40_SIZE (338208 / 8)
	65	#define XILINX_XC2V80_SIZE (597408 / 8)
	66	#define XILINX_XC2V250_SIZE (1591584 / 8)
	67	#define XILINX_XC2V500_SIZE (2557857 / 8)
	68	#define XILINX_XC2V1000_SIZE (3749408 / 8)
	69	#define XILINX_XC2V1500_SIZE (5166240 / 8)
	70	#define XILINX_XC2V2000_SIZE (6808352 / 8)
	71	#define XILINX_XC2V3000_SIZE (9589408 / 8)
	72	#define XILINX_XC2V4000_SIZE (14220192 / 8)
	73	#define XILINX_XC2V6000_SIZE (19752096 / 8)
	74	#define XILINX_XC2V8000_SIZE (26185120 / 8)
	75	#define XILINX_XC2V10000_SIZE (33519264 / 8)
	76
	77	/* Descriptor Macros
	78	*********************************************************************/
	79	#define XILINX_XC2V40_DESC(iface, fn_table, cookie) \
	80	{ Xilinx_Virtex2, iface, XILINX_XC2V40_SIZE, fn_table, cookie }
	81
	82	#define XILINX_XC2V80_DESC(iface, fn_table, cookie) \
	83	{ Xilinx_Virtex2, iface, XILINX_XC2V80_SIZE, fn_table, cookie }
	84
	85	#define XILINX_XC2V250_DESC(iface, fn_table, cookie) \
	86	{ Xilinx_Virtex2, iface, XILINX_XC2V250_SIZE, fn_table, cookie }
	87
	88	#define XILINX_XC2V500_DESC(iface, fn_table, cookie) \
	89	{ Xilinx_Virtex2, iface, XILINX_XC2V500_SIZE, fn_table, cookie }
	90
	91	#define XILINX_XC2V1000_DESC(iface, fn_table, cookie) \
	92	{ Xilinx_Virtex2, iface, XILINX_XC2V1000_SIZE, fn_table, cookie }
	93
	94	#define XILINX_XC2V1500_DESC(iface, fn_table, cookie) \
	95	{ Xilinx_Virtex2, iface, XILINX_XC2V1500_SIZE, fn_table, cookie }
	96
	97	#define XILINX_XC2V2000_DESC(iface, fn_table, cookie) \
	98	{ Xilinx_Virtex2, iface, XILINX_XC2V2000_SIZE, fn_table, cookie }
	99
	100	#define XILINX_XC2V3000_DESC(iface, fn_table, cookie) \
	101	{ Xilinx_Virtex2, iface, XILINX_XC2V3000_SIZE, fn_table, cookie }
	102
	103	#define XILINX_XC2V4000_DESC(iface, fn_table, cookie) \
	104	{ Xilinx_Virtex2, iface, XILINX_XC2V4000_SIZE, fn_table, cookie }
	105
	106	#define XILINX_XC2V6000_DESC(iface, fn_table, cookie) \
	107	{ Xilinx_Virtex2, iface, XILINX_XC2V6000_SIZE, fn_table, cookie }
	108
	109	#define XILINX_XC2V8000_DESC(iface, fn_table, cookie) \
	110	{ Xilinx_Virtex2, iface, XILINX_XC2V8000_SIZE, fn_table, cookie }
	111
	112	#define XILINX_XC2V10000_DESC(iface, fn_table, cookie) \
	113	{ Xilinx_Virtex2, iface, XILINX_XC2V10000_SIZE, fn_table, cookie }
	114
	115	#endif /* _VIRTEX2_H_ */