[people/ms/u-boot.git] / include / zynqpl.h

/*
 * (C) Copyright 2012-2013, Xilinx, Michal Simek
 *
 * (C) Copyright 2012
 * Joe Hershberger <joe.hershberger@ni.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef _ZYNQPL_H_
#define _ZYNQPL_H_

#include <xilinx.h>

extern int zynq_load(Xilinx_desc *desc, const void *image, size_t size);
extern int zynq_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
extern int zynq_info(Xilinx_desc *desc);

#define XILINX_ZYNQ_7010	0x2
#define XILINX_ZYNQ_7015	0x1b
#define XILINX_ZYNQ_7020	0x7
#define XILINX_ZYNQ_7030	0xc
#define XILINX_ZYNQ_7045	0x11
#define XILINX_ZYNQ_7100	0x16

/* Device Image Sizes */
#define XILINX_XC7Z010_SIZE	16669920/8
#define XILINX_XC7Z015_SIZE	28085344/8
#define XILINX_XC7Z020_SIZE	32364512/8
#define XILINX_XC7Z030_SIZE	47839328/8
#define XILINX_XC7Z045_SIZE	106571232/8
#define XILINX_XC7Z100_SIZE	139330784/8

/* Descriptor Macros */
#define XILINX_XC7Z010_DESC(cookie) \
{ xilinx_zynq, devcfg, XILINX_XC7Z010_SIZE, NULL, cookie, "7z010" }

#define XILINX_XC7Z015_DESC(cookie) \
{ xilinx_zynq, devcfg, XILINX_XC7Z015_SIZE, NULL, cookie, "7z015" }

#define XILINX_XC7Z020_DESC(cookie) \
{ xilinx_zynq, devcfg, XILINX_XC7Z020_SIZE, NULL, cookie, "7z020" }

#define XILINX_XC7Z030_DESC(cookie) \
{ xilinx_zynq, devcfg, XILINX_XC7Z030_SIZE, NULL, cookie, "7z030" }

#define XILINX_XC7Z045_DESC(cookie) \
{ xilinx_zynq, devcfg, XILINX_XC7Z045_SIZE, NULL, cookie, "7z045" }

#define XILINX_XC7Z100_DESC(cookie) \
{ xilinx_zynq, devcfg, XILINX_XC7Z100_SIZE, NULL, cookie, "7z100" }

#endif /* _ZYNQPL_H_ */
Commit	Line	Data
d5dae85f MS	1	/*
	2	* (C) Copyright 2012-2013, Xilinx, Michal Simek
	3	*
	4	* (C) Copyright 2012
	5	* Joe Hershberger <joe.hershberger@ni.com>
	6	*
1a459660	7	* SPDX-License-Identifier: GPL-2.0+
d5dae85f MS	8	*/
	9
	10	#ifndef _ZYNQPL_H_
	11	#define _ZYNQPL_H_
	12
	13	#include <xilinx.h>
	14
	15	extern int zynq_load(Xilinx_desc desc, const void image, size_t size);
	16	extern int zynq_dump(Xilinx_desc desc, const void buf, size_t bsize);
	17	extern int zynq_info(Xilinx_desc *desc);
	18
	19	#define XILINX_ZYNQ_7010 0x2
31993d6a	20	#define XILINX_ZYNQ_7015 0x1b
d5dae85f MS	21	#define XILINX_ZYNQ_7020 0x7
	22	#define XILINX_ZYNQ_7030 0xc
	23	#define XILINX_ZYNQ_7045 0x11
fd2b10b6	24	#define XILINX_ZYNQ_7100 0x16
d5dae85f MS	25
	26	/* Device Image Sizes */
	27	#define XILINX_XC7Z010_SIZE 16669920/8
31993d6a	28	#define XILINX_XC7Z015_SIZE 28085344/8
d5dae85f MS	29	#define XILINX_XC7Z020_SIZE 32364512/8
	30	#define XILINX_XC7Z030_SIZE 47839328/8
	31	#define XILINX_XC7Z045_SIZE 106571232/8
fd2b10b6	32	#define XILINX_XC7Z100_SIZE 139330784/8
d5dae85f MS	33
	34	/* Descriptor Macros */
	35	#define XILINX_XC7Z010_DESC(cookie) \
6631db47	36	{ xilinx_zynq, devcfg, XILINX_XC7Z010_SIZE, NULL, cookie, "7z010" }
d5dae85f	37
31993d6a MS	38	#define XILINX_XC7Z015_DESC(cookie) \
	39	{ xilinx_zynq, devcfg, XILINX_XC7Z015_SIZE, NULL, cookie, "7z015" }
	40
d5dae85f	41	#define XILINX_XC7Z020_DESC(cookie) \
6631db47	42	{ xilinx_zynq, devcfg, XILINX_XC7Z020_SIZE, NULL, cookie, "7z020" }
d5dae85f MS	43
d5dae85f MS	44	#define XILINX_XC7Z030_DESC(cookie) \
6631db47	45	{ xilinx_zynq, devcfg, XILINX_XC7Z030_SIZE, NULL, cookie, "7z030" }
d5dae85f MS	46
d5dae85f MS	47	#define XILINX_XC7Z045_DESC(cookie) \
6631db47	48	{ xilinx_zynq, devcfg, XILINX_XC7Z045_SIZE, NULL, cookie, "7z045" }
d5dae85f	49
fd2b10b6 MS	50	#define XILINX_XC7Z100_DESC(cookie) \
	51	{ xilinx_zynq, devcfg, XILINX_XC7Z100_SIZE, NULL, cookie, "7z100" }
	52
d5dae85f	53	#endif /* _ZYNQPL_H_ */