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b5220bc6
SG
1/*
2 * Copyright (c) 2011 The Chromium OS Authors.
1a459660 3 * SPDX-License-Identifier: GPL-2.0+
b5220bc6
SG
4 */
5
29a23f9d 6#ifndef USE_HOSTCC
b5220bc6 7#include <common.h>
fcc0a877 8#include <dm.h>
5c33c9fd 9#include <errno.h>
b5220bc6
SG
10#include <serial.h>
11#include <libfdt.h>
12#include <fdtdec.h>
b45122fd 13#include <asm/sections.h>
5c33c9fd 14#include <linux/ctype.h>
b5220bc6
SG
15
16DECLARE_GLOBAL_DATA_PTR;
17
18/*
19 * Here are the type we know about. One day we might allow drivers to
20 * register. For now we just put them here. The COMPAT macro allows us to
21 * turn this into a sparse list later, and keeps the ID with the name.
22 */
23#define COMPAT(id, name) name
24static const char * const compat_names[COMPAT_COUNT] = {
f88fe2de 25 COMPAT(UNKNOWN, "<none>"),
0e35ad05
JZ
26 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
27 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
312693c3 28 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
e1ae0d1f 29 COMPAT(NVIDIA_TEGRA20_PWM, "nvidia,tegra20-pwm"),
00f37327
SG
30 COMPAT(NVIDIA_TEGRA124_DC, "nvidia,tegra124-dc"),
31 COMPAT(NVIDIA_TEGRA124_SOR, "nvidia,tegra124-sor"),
32 COMPAT(NVIDIA_TEGRA124_PMC, "nvidia,tegra124-pmc"),
87540de3 33 COMPAT(NVIDIA_TEGRA20_DC, "nvidia,tegra20-dc"),
7aaa5a60 34 COMPAT(NVIDIA_TEGRA210_SDMMC, "nvidia,tegra210-sdhci"),
a73ca478 35 COMPAT(NVIDIA_TEGRA124_SDMMC, "nvidia,tegra124-sdhci"),
f4e4e0b0 36 COMPAT(NVIDIA_TEGRA30_SDMMC, "nvidia,tegra30-sdhci"),
c9aa831e 37 COMPAT(NVIDIA_TEGRA20_SDMMC, "nvidia,tegra20-sdhci"),
79c7a90f 38 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
7aaa5a60 39 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
cc9fe33a
HR
40 COMPAT(SMSC_LAN9215, "smsc,lan9215"),
41 COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
c34253d1 42 COMPAT(SAMSUNG_S3C2440_I2C, "samsung,s3c2440-i2c"),
72dbff12
RS
43 COMPAT(SAMSUNG_EXYNOS5_SOUND, "samsung,exynos-sound"),
44 COMPAT(WOLFSON_WM8994_CODEC, "wolfson,wm8994-codec"),
713cb680 45 COMPAT(GOOGLE_CROS_EC_KEYB, "google,cros-ec-keyb"),
6abd1620 46 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
108b85be 47 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
618766c0 48 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
d7377b51 49 COMPAT(SAMSUNG_EXYNOS_FIMD, "samsung,exynos-fimd"),
de461c52 50 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
1e4706a7 51 COMPAT(SAMSUNG_EXYNOS5_DP, "samsung,exynos5-dp"),
7d3ca0f8 52 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
3577fe8b 53 COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"),
ee1e3c2f 54 COMPAT(SAMSUNG_EXYNOS_SERIAL, "samsung,exynos4210-uart"),
f37df0f8 55 COMPAT(MAXIM_MAX77686_PMIC, "maxim,max77686"),
bb8215f4 56 COMPAT(GENERIC_SPI_FLASH, "spi-flash"),
7772bb78 57 COMPAT(MAXIM_98095_CODEC, "maxim,max98095-codec"),
ecbd7e1e 58 COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"),
7d95f2a3 59 COMPAT(SANDBOX_LCD_SDL, "sandbox,lcd-sdl"),
45c480c9 60 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
77f9b1fb 61 COMPAT(INTEL_MICROCODE, "intel,microcode"),
65dd74a6 62 COMPAT(MEMORY_SPD, "memory-spd"),
3ac83935 63 COMPAT(INTEL_PANTHERPOINT_AHCI, "intel,pantherpoint-ahci"),
bb80be39 64 COMPAT(INTEL_MODEL_206AX, "intel,model-206ax"),
effcf067 65 COMPAT(INTEL_GMA, "intel,gma"),
6173c45b 66 COMPAT(AMS_AS3722, "ams,as3722"),
5da38086 67 COMPAT(INTEL_ICH_SPI, "intel,ich-spi"),
c89ada01 68 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
5318f18d 69 COMPAT(INTEL_X86_PINCTRL, "intel,x86-pinctrl"),
6462cded 70 COMPAT(SOCIONEXT_XHCI, "socionext,uniphier-xhci"),
90b16d14 71 COMPAT(COMPAT_INTEL_PCH, "intel,bd82x6x"),
9c7dea60 72 COMPAT(COMPAT_INTEL_IRQ_ROUTER, "intel,irq-router"),
6ab00db2 73 COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
129adf5b 74 COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
ef4b01b2 75 COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
f3b84a30
AB
76 COMPAT(COMPAT_INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
77 COMPAT(COMPAT_INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
b5220bc6
SG
78};
79
a53f4a29
SG
80const char *fdtdec_get_compatible(enum fdt_compat_id id)
81{
82 /* We allow reading of the 'unknown' ID for testing purposes */
83 assert(id >= 0 && id < COMPAT_COUNT);
84 return compat_names[id];
85}
86
02464e38
SW
87fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
88 const char *prop_name, int index, int na, int ns,
89 fdt_size_t *sizep)
b5220bc6 90{
02464e38
SW
91 const fdt32_t *prop, *prop_end;
92 const fdt32_t *prop_addr, *prop_size, *prop_after_size;
236efe36 93 int len;
02464e38 94 fdt_addr_t addr;
b5220bc6 95
1cb2323b 96 debug("%s: %s: ", __func__, prop_name);
02464e38
SW
97
98 if (na > (sizeof(fdt_addr_t) / sizeof(fdt32_t))) {
99 debug("(na too large for fdt_addr_t type)\n");
100 return FDT_ADDR_T_NONE;
101 }
102
103 if (ns > (sizeof(fdt_size_t) / sizeof(fdt32_t))) {
104 debug("(ns too large for fdt_size_t type)\n");
105 return FDT_ADDR_T_NONE;
106 }
107
108 prop = fdt_getprop(blob, node, prop_name, &len);
109 if (!prop) {
110 debug("(not found)\n");
111 return FDT_ADDR_T_NONE;
112 }
113 prop_end = prop + (len / sizeof(*prop));
114
115 prop_addr = prop + (index * (na + ns));
116 prop_size = prop_addr + na;
117 prop_after_size = prop_size + ns;
118 if (prop_after_size > prop_end) {
119 debug("(not enough data: expected >= %d cells, got %d cells)\n",
120 (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
121 return FDT_ADDR_T_NONE;
122 }
123
124 addr = fdtdec_get_number(prop_addr, na);
125
126 if (sizep) {
127 *sizep = fdtdec_get_number(prop_size, ns);
128 debug("addr=%08llx, size=%llx\n", (u64)addr, (u64)*sizep);
129 } else {
130 debug("addr=%08llx\n", (u64)addr);
131 }
132
133 return addr;
134}
135
136fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
137 int node, const char *prop_name, int index, fdt_size_t *sizep)
138{
139 int na, ns;
140
141 debug("%s: ", __func__);
142
143 na = fdt_address_cells(blob, parent);
144 if (na < 1) {
145 debug("(bad #address-cells)\n");
146 return FDT_ADDR_T_NONE;
147 }
148
149 ns = fdt_size_cells(blob, parent);
ff0a6358 150 if (ns < 0) {
02464e38
SW
151 debug("(bad #size-cells)\n");
152 return FDT_ADDR_T_NONE;
153 }
154
155 debug("na=%d, ns=%d, ", na, ns);
156
157 return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
158 ns, sizep);
159}
160
161fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
162 const char *prop_name, int index, fdt_size_t *sizep)
163{
164 int parent;
165
166 debug("%s: ", __func__);
167
168 parent = fdt_parent_offset(blob, node);
169 if (parent < 0) {
170 debug("(no parent found)\n");
171 return FDT_ADDR_T_NONE;
5b344360 172 }
02464e38
SW
173
174 return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
175 index, sizep);
176}
177
178fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
179 const char *prop_name, fdt_size_t *sizep)
180{
d93b9a07
SW
181 int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
182
02464e38
SW
183 return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
184 sizeof(fdt_addr_t) / sizeof(fdt32_t),
d93b9a07 185 ns, sizep);
b5220bc6
SG
186}
187
4397a2a8
SG
188fdt_addr_t fdtdec_get_addr(const void *blob, int node,
189 const char *prop_name)
190{
191 return fdtdec_get_addr_size(blob, node, prop_name, NULL);
192}
193
fcc0a877 194#if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
a62e84d7
BM
195int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type,
196 const char *prop_name, struct fdt_pci_addr *addr)
197{
198 const u32 *cell;
199 int len;
200 int ret = -ENOENT;
201
202 debug("%s: %s: ", __func__, prop_name);
203
204 /*
205 * If we follow the pci bus bindings strictly, we should check
206 * the value of the node's parent node's #address-cells and
207 * #size-cells. They need to be 3 and 2 accordingly. However,
208 * for simplicity we skip the check here.
209 */
210 cell = fdt_getprop(blob, node, prop_name, &len);
211 if (!cell)
212 goto fail;
213
214 if ((len % FDT_PCI_REG_SIZE) == 0) {
215 int num = len / FDT_PCI_REG_SIZE;
216 int i;
217
218 for (i = 0; i < num; i++) {
219 debug("pci address #%d: %08lx %08lx %08lx\n", i,
4ea5243a
SW
220 (ulong)fdt32_to_cpu(cell[0]),
221 (ulong)fdt32_to_cpu(cell[1]),
222 (ulong)fdt32_to_cpu(cell[2]));
223 if ((fdt32_to_cpu(*cell) & type) == type) {
224 addr->phys_hi = fdt32_to_cpu(cell[0]);
225 addr->phys_mid = fdt32_to_cpu(cell[1]);
226 addr->phys_lo = fdt32_to_cpu(cell[1]);
a62e84d7
BM
227 break;
228 } else {
229 cell += (FDT_PCI_ADDR_CELLS +
230 FDT_PCI_SIZE_CELLS);
231 }
232 }
233
106cce96
SG
234 if (i == num) {
235 ret = -ENXIO;
a62e84d7 236 goto fail;
106cce96 237 }
a62e84d7
BM
238
239 return 0;
240 } else {
241 ret = -EINVAL;
242 }
243
244fail:
245 debug("(not found)\n");
246 return ret;
247}
248
249int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
250{
251 const char *list, *end;
252 int len;
253
254 list = fdt_getprop(blob, node, "compatible", &len);
255 if (!list)
256 return -ENOENT;
257
258 end = list + len;
259 while (list < end) {
260 char *s;
261
262 len = strlen(list);
263 if (len >= strlen("pciVVVV,DDDD")) {
264 s = strstr(list, "pci");
265
266 /*
267 * check if the string is something like pciVVVV,DDDD.RR
268 * or just pciVVVV,DDDD
269 */
270 if (s && s[7] == ',' &&
271 (s[12] == '.' || s[12] == 0)) {
272 s += 3;
273 *vendor = simple_strtol(s, NULL, 16);
274
275 s += 5;
276 *device = simple_strtol(s, NULL, 16);
277
278 return 0;
279 }
a62e84d7 280 }
bc6351eb 281 list += (len + 1);
a62e84d7
BM
282 }
283
284 return -ENOENT;
285}
286
fcc0a877
SG
287int fdtdec_get_pci_bar32(struct udevice *dev, struct fdt_pci_addr *addr,
288 u32 *bar)
a62e84d7 289{
a62e84d7 290 int barnum;
a62e84d7
BM
291
292 /* extract the bar number from fdt_pci_addr */
293 barnum = addr->phys_hi & 0xff;
294 if ((barnum < PCI_BASE_ADDRESS_0) || (barnum > PCI_CARDBUS_CIS))
295 return -EINVAL;
296
297 barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
fcc0a877 298 *bar = dm_pci_read_bar32(dev, barnum);
a62e84d7
BM
299
300 return 0;
301}
302#endif
303
aadef0a1
CLC
304uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
305 uint64_t default_val)
306{
307 const uint64_t *cell64;
308 int length;
309
310 cell64 = fdt_getprop(blob, node, prop_name, &length);
311 if (!cell64 || length < sizeof(*cell64))
312 return default_val;
313
314 return fdt64_to_cpu(*cell64);
315}
316
f88fe2de 317int fdtdec_get_is_enabled(const void *blob, int node)
b5220bc6
SG
318{
319 const char *cell;
320
f88fe2de
SG
321 /*
322 * It should say "okay", so only allow that. Some fdts use "ok" but
323 * this is a bug. Please fix your device tree source file. See here
324 * for discussion:
325 *
326 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
327 */
b5220bc6
SG
328 cell = fdt_getprop(blob, node, "status", NULL);
329 if (cell)
f88fe2de
SG
330 return 0 == strcmp(cell, "okay");
331 return 1;
b5220bc6
SG
332}
333
7cde397b 334enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
b5220bc6
SG
335{
336 enum fdt_compat_id id;
337
338 /* Search our drivers */
339 for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
340 if (0 == fdt_node_check_compatible(blob, node,
341 compat_names[id]))
342 return id;
343 return COMPAT_UNKNOWN;
344}
345
346int fdtdec_next_compatible(const void *blob, int node,
347 enum fdt_compat_id id)
348{
349 return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
350}
351
3ddecfc7
SG
352int fdtdec_next_compatible_subnode(const void *blob, int node,
353 enum fdt_compat_id id, int *depthp)
354{
355 do {
356 node = fdt_next_node(blob, node, depthp);
357 } while (*depthp > 1);
358
359 /* If this is a direct subnode, and compatible, return it */
360 if (*depthp == 1 && 0 == fdt_node_check_compatible(
361 blob, node, compat_names[id]))
362 return node;
363
364 return -FDT_ERR_NOTFOUND;
365}
366
b5220bc6
SG
367int fdtdec_next_alias(const void *blob, const char *name,
368 enum fdt_compat_id id, int *upto)
369{
370#define MAX_STR_LEN 20
371 char str[MAX_STR_LEN + 20];
372 int node, err;
373
374 /* snprintf() is not available */
375 assert(strlen(name) < MAX_STR_LEN);
376 sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
00878476 377 node = fdt_path_offset(blob, str);
b5220bc6
SG
378 if (node < 0)
379 return node;
380 err = fdt_node_check_compatible(blob, node, compat_names[id]);
381 if (err < 0)
382 return err;
f88fe2de
SG
383 if (err)
384 return -FDT_ERR_NOTFOUND;
385 (*upto)++;
386 return node;
b5220bc6
SG
387}
388
a53f4a29
SG
389int fdtdec_find_aliases_for_id(const void *blob, const char *name,
390 enum fdt_compat_id id, int *node_list, int maxcount)
c6782270
SG
391{
392 memset(node_list, '\0', sizeof(*node_list) * maxcount);
393
394 return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
395}
396
397/* TODO: Can we tighten this code up a little? */
398int fdtdec_add_aliases_for_id(const void *blob, const char *name,
399 enum fdt_compat_id id, int *node_list, int maxcount)
a53f4a29
SG
400{
401 int name_len = strlen(name);
402 int nodes[maxcount];
403 int num_found = 0;
404 int offset, node;
405 int alias_node;
406 int count;
407 int i, j;
408
409 /* find the alias node if present */
410 alias_node = fdt_path_offset(blob, "/aliases");
411
412 /*
413 * start with nothing, and we can assume that the root node can't
414 * match
415 */
416 memset(nodes, '\0', sizeof(nodes));
417
418 /* First find all the compatible nodes */
419 for (node = count = 0; node >= 0 && count < maxcount;) {
420 node = fdtdec_next_compatible(blob, node, id);
421 if (node >= 0)
422 nodes[count++] = node;
423 }
424 if (node >= 0)
425 debug("%s: warning: maxcount exceeded with alias '%s'\n",
426 __func__, name);
427
428 /* Now find all the aliases */
a53f4a29
SG
429 for (offset = fdt_first_property_offset(blob, alias_node);
430 offset > 0;
431 offset = fdt_next_property_offset(blob, offset)) {
432 const struct fdt_property *prop;
433 const char *path;
434 int number;
435 int found;
436
437 node = 0;
438 prop = fdt_get_property_by_offset(blob, offset, NULL);
439 path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
440 if (prop->len && 0 == strncmp(path, name, name_len))
441 node = fdt_path_offset(blob, prop->data);
442 if (node <= 0)
443 continue;
444
445 /* Get the alias number */
446 number = simple_strtoul(path + name_len, NULL, 10);
447 if (number < 0 || number >= maxcount) {
448 debug("%s: warning: alias '%s' is out of range\n",
449 __func__, path);
450 continue;
451 }
452
453 /* Make sure the node we found is actually in our list! */
454 found = -1;
455 for (j = 0; j < count; j++)
456 if (nodes[j] == node) {
457 found = j;
458 break;
459 }
460
461 if (found == -1) {
462 debug("%s: warning: alias '%s' points to a node "
463 "'%s' that is missing or is not compatible "
464 " with '%s'\n", __func__, path,
465 fdt_get_name(blob, node, NULL),
466 compat_names[id]);
467 continue;
468 }
469
470 /*
471 * Add this node to our list in the right place, and mark
472 * it as done.
473 */
474 if (fdtdec_get_is_enabled(blob, node)) {
c6782270
SG
475 if (node_list[number]) {
476 debug("%s: warning: alias '%s' requires that "
477 "a node be placed in the list in a "
478 "position which is already filled by "
479 "node '%s'\n", __func__, path,
480 fdt_get_name(blob, node, NULL));
481 continue;
482 }
a53f4a29
SG
483 node_list[number] = node;
484 if (number >= num_found)
485 num_found = number + 1;
486 }
c6782270 487 nodes[found] = 0;
a53f4a29
SG
488 }
489
490 /* Add any nodes not mentioned by an alias */
491 for (i = j = 0; i < maxcount; i++) {
492 if (!node_list[i]) {
493 for (; j < maxcount; j++)
494 if (nodes[j] &&
495 fdtdec_get_is_enabled(blob, nodes[j]))
496 break;
497
498 /* Have we run out of nodes to add? */
499 if (j == maxcount)
500 break;
501
502 assert(!node_list[i]);
503 node_list[i] = nodes[j++];
504 if (i >= num_found)
505 num_found = i + 1;
506 }
507 }
508
509 return num_found;
510}
511
5c33c9fd
SG
512int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
513 int *seqp)
514{
515 int base_len = strlen(base);
516 const char *find_name;
517 int find_namelen;
518 int prop_offset;
519 int aliases;
520
521 find_name = fdt_get_name(blob, offset, &find_namelen);
522 debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
523
524 aliases = fdt_path_offset(blob, "/aliases");
525 for (prop_offset = fdt_first_property_offset(blob, aliases);
526 prop_offset > 0;
527 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
528 const char *prop;
529 const char *name;
530 const char *slash;
c4af6732 531 int len, val;
5c33c9fd
SG
532
533 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
534 debug(" - %s, %s\n", name, prop);
535 if (len < find_namelen || *prop != '/' || prop[len - 1] ||
536 strncmp(name, base, base_len))
537 continue;
538
539 slash = strrchr(prop, '/');
540 if (strcmp(slash + 1, find_name))
541 continue;
c4af6732
SG
542 val = trailing_strtol(name);
543 if (val != -1) {
544 *seqp = val;
545 debug("Found seq %d\n", *seqp);
546 return 0;
5c33c9fd
SG
547 }
548 }
549
550 debug("Not found\n");
551 return -ENOENT;
552}
553
3bc37a50 554const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
aac07d49 555{
aac07d49 556 int chosen_node;
aac07d49
SG
557
558 if (!blob)
3bc37a50 559 return NULL;
aac07d49 560 chosen_node = fdt_path_offset(blob, "/chosen");
3bc37a50
SG
561 return fdt_getprop(blob, chosen_node, name, NULL);
562}
563
564int fdtdec_get_chosen_node(const void *blob, const char *name)
565{
566 const char *prop;
567
568 prop = fdtdec_get_chosen_prop(blob, name);
aac07d49
SG
569 if (!prop)
570 return -FDT_ERR_NOTFOUND;
571 return fdt_path_offset(blob, prop);
572}
573
9a263e55
SG
574int fdtdec_check_fdt(void)
575{
576 /*
577 * We must have an FDT, but we cannot panic() yet since the console
578 * is not ready. So for now, just assert(). Boards which need an early
579 * FDT (prior to console ready) will need to make their own
580 * arrangements and do their own checks.
581 */
582 assert(!fdtdec_prepare_fdt());
583 return 0;
584}
585
b5220bc6
SG
586/*
587 * This function is a little odd in that it accesses global data. At some
588 * point if the architecture board.c files merge this will make more sense.
589 * Even now, it is common code.
590 */
9a263e55 591int fdtdec_prepare_fdt(void)
b5220bc6 592{
c309c2da
SG
593 if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
594 fdt_check_header(gd->fdt_blob)) {
66312374
SG
595#ifdef CONFIG_SPL_BUILD
596 puts("Missing DTB\n");
597#else
598 puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
cb5f97f7
SG
599# ifdef DEBUG
600 if (gd->fdt_blob) {
601 printf("fdt_blob=%p\n", gd->fdt_blob);
602 print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
603 32, 0);
604 }
605# endif
66312374 606#endif
9a263e55
SG
607 return -1;
608 }
b5220bc6
SG
609 return 0;
610}
d17da655
SG
611
612int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
613{
614 const u32 *phandle;
615 int lookup;
616
1cb2323b 617 debug("%s: %s\n", __func__, prop_name);
d17da655
SG
618 phandle = fdt_getprop(blob, node, prop_name, NULL);
619 if (!phandle)
620 return -FDT_ERR_NOTFOUND;
621
622 lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
623 return lookup;
624}
625
626/**
627 * Look up a property in a node and check that it has a minimum length.
628 *
629 * @param blob FDT blob
630 * @param node node to examine
631 * @param prop_name name of property to find
632 * @param min_len minimum property length in bytes
633 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
634 found, or -FDT_ERR_BADLAYOUT if not enough data
635 * @return pointer to cell, which is only valid if err == 0
636 */
637static const void *get_prop_check_min_len(const void *blob, int node,
638 const char *prop_name, int min_len, int *err)
639{
640 const void *cell;
641 int len;
642
643 debug("%s: %s\n", __func__, prop_name);
644 cell = fdt_getprop(blob, node, prop_name, &len);
645 if (!cell)
646 *err = -FDT_ERR_NOTFOUND;
647 else if (len < min_len)
648 *err = -FDT_ERR_BADLAYOUT;
649 else
650 *err = 0;
651 return cell;
652}
653
654int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
655 u32 *array, int count)
656{
657 const u32 *cell;
658 int i, err = 0;
659
660 debug("%s: %s\n", __func__, prop_name);
661 cell = get_prop_check_min_len(blob, node, prop_name,
662 sizeof(u32) * count, &err);
663 if (!err) {
664 for (i = 0; i < count; i++)
665 array[i] = fdt32_to_cpu(cell[i]);
666 }
667 return err;
668}
669
a9f04d49
SG
670int fdtdec_get_int_array_count(const void *blob, int node,
671 const char *prop_name, u32 *array, int count)
672{
673 const u32 *cell;
674 int len, elems;
675 int i;
676
677 debug("%s: %s\n", __func__, prop_name);
678 cell = fdt_getprop(blob, node, prop_name, &len);
679 if (!cell)
680 return -FDT_ERR_NOTFOUND;
681 elems = len / sizeof(u32);
682 if (count > elems)
683 count = elems;
684 for (i = 0; i < count; i++)
685 array[i] = fdt32_to_cpu(cell[i]);
686
687 return count;
688}
689
96875e7d
SG
690const u32 *fdtdec_locate_array(const void *blob, int node,
691 const char *prop_name, int count)
692{
693 const u32 *cell;
694 int err;
695
696 cell = get_prop_check_min_len(blob, node, prop_name,
697 sizeof(u32) * count, &err);
698 return err ? NULL : cell;
699}
700
d17da655
SG
701int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
702{
703 const s32 *cell;
704 int len;
705
706 debug("%s: %s\n", __func__, prop_name);
707 cell = fdt_getprop(blob, node, prop_name, &len);
708 return cell != NULL;
709}
ed3ee5cd 710
57068a7a
SG
711int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
712 const char *list_name,
713 const char *cells_name,
714 int cell_count, int index,
715 struct fdtdec_phandle_args *out_args)
716{
717 const __be32 *list, *list_end;
718 int rc = 0, size, cur_index = 0;
719 uint32_t count = 0;
720 int node = -1;
721 int phandle;
722
723 /* Retrieve the phandle list property */
724 list = fdt_getprop(blob, src_node, list_name, &size);
725 if (!list)
726 return -ENOENT;
727 list_end = list + size / sizeof(*list);
728
729 /* Loop over the phandles until all the requested entry is found */
730 while (list < list_end) {
731 rc = -EINVAL;
732 count = 0;
733
734 /*
735 * If phandle is 0, then it is an empty entry with no
736 * arguments. Skip forward to the next entry.
737 */
738 phandle = be32_to_cpup(list++);
739 if (phandle) {
740 /*
741 * Find the provider node and parse the #*-cells
742 * property to determine the argument length.
743 *
744 * This is not needed if the cell count is hard-coded
745 * (i.e. cells_name not set, but cell_count is set),
746 * except when we're going to return the found node
747 * below.
748 */
749 if (cells_name || cur_index == index) {
750 node = fdt_node_offset_by_phandle(blob,
751 phandle);
752 if (!node) {
753 debug("%s: could not find phandle\n",
754 fdt_get_name(blob, src_node,
755 NULL));
756 goto err;
757 }
758 }
759
760 if (cells_name) {
761 count = fdtdec_get_int(blob, node, cells_name,
762 -1);
763 if (count == -1) {
764 debug("%s: could not get %s for %s\n",
765 fdt_get_name(blob, src_node,
766 NULL),
767 cells_name,
768 fdt_get_name(blob, node,
769 NULL));
770 goto err;
771 }
772 } else {
773 count = cell_count;
774 }
775
776 /*
777 * Make sure that the arguments actually fit in the
778 * remaining property data length
779 */
780 if (list + count > list_end) {
781 debug("%s: arguments longer than property\n",
782 fdt_get_name(blob, src_node, NULL));
783 goto err;
784 }
785 }
786
787 /*
788 * All of the error cases above bail out of the loop, so at
789 * this point, the parsing is successful. If the requested
790 * index matches, then fill the out_args structure and return,
791 * or return -ENOENT for an empty entry.
792 */
793 rc = -ENOENT;
794 if (cur_index == index) {
795 if (!phandle)
796 goto err;
797
798 if (out_args) {
799 int i;
800
801 if (count > MAX_PHANDLE_ARGS) {
802 debug("%s: too many arguments %d\n",
803 fdt_get_name(blob, src_node,
804 NULL), count);
805 count = MAX_PHANDLE_ARGS;
806 }
807 out_args->node = node;
808 out_args->args_count = count;
809 for (i = 0; i < count; i++) {
810 out_args->args[i] =
811 be32_to_cpup(list++);
812 }
813 }
814
815 /* Found it! return success */
816 return 0;
817 }
818
819 node = -1;
820 list += count;
821 cur_index++;
822 }
823
824 /*
825 * Result will be one of:
826 * -ENOENT : index is for empty phandle
827 * -EINVAL : parsing error on data
828 * [1..n] : Number of phandle (count mode; when index = -1)
829 */
830 rc = index < 0 ? cur_index : -ENOENT;
831 err:
832 return rc;
833}
834
bed4d892
AS
835int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
836 u8 *array, int count)
837{
838 const u8 *cell;
839 int err;
840
841 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
842 if (!err)
843 memcpy(array, cell, count);
844 return err;
845}
846
847const u8 *fdtdec_locate_byte_array(const void *blob, int node,
848 const char *prop_name, int count)
849{
850 const u8 *cell;
851 int err;
852
853 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
854 if (err)
855 return NULL;
856 return cell;
857}
09258f1e 858
09258f1e
AK
859int fdtdec_get_config_int(const void *blob, const char *prop_name,
860 int default_val)
861{
862 int config_node;
863
864 debug("%s: %s\n", __func__, prop_name);
865 config_node = fdt_path_offset(blob, "/config");
866 if (config_node < 0)
867 return default_val;
868 return fdtdec_get_int(blob, config_node, prop_name, default_val);
869}
332ab0d5 870
79289c0b
GB
871int fdtdec_get_config_bool(const void *blob, const char *prop_name)
872{
873 int config_node;
874 const void *prop;
875
876 debug("%s: %s\n", __func__, prop_name);
877 config_node = fdt_path_offset(blob, "/config");
878 if (config_node < 0)
879 return 0;
880 prop = fdt_get_property(blob, config_node, prop_name, NULL);
881
882 return prop != NULL;
883}
884
332ab0d5
SG
885char *fdtdec_get_config_string(const void *blob, const char *prop_name)
886{
887 const char *nodep;
888 int nodeoffset;
889 int len;
890
891 debug("%s: %s\n", __func__, prop_name);
892 nodeoffset = fdt_path_offset(blob, "/config");
893 if (nodeoffset < 0)
894 return NULL;
895
896 nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
897 if (!nodep)
898 return NULL;
899
900 return (char *)nodep;
901}
f20c4619 902
76489832
SG
903int fdtdec_decode_region(const void *blob, int node, const char *prop_name,
904 fdt_addr_t *basep, fdt_size_t *sizep)
f20c4619
SG
905{
906 const fdt_addr_t *cell;
907 int len;
908
76489832
SG
909 debug("%s: %s: %s\n", __func__, fdt_get_name(blob, node, NULL),
910 prop_name);
f20c4619 911 cell = fdt_getprop(blob, node, prop_name, &len);
76489832
SG
912 if (!cell || (len < sizeof(fdt_addr_t) * 2)) {
913 debug("cell=%p, len=%d\n", cell, len);
f20c4619 914 return -1;
76489832
SG
915 }
916
917 *basep = fdt_addr_to_cpu(*cell);
918 *sizep = fdt_size_to_cpu(cell[1]);
919 debug("%s: base=%08lx, size=%lx\n", __func__, (ulong)*basep,
920 (ulong)*sizep);
f20c4619 921
f20c4619
SG
922 return 0;
923}
006e73b9
SG
924
925/**
926 * Read a flash entry from the fdt
927 *
928 * @param blob FDT blob
929 * @param node Offset of node to read
930 * @param name Name of node being read
931 * @param entry Place to put offset and size of this node
932 * @return 0 if ok, -ve on error
933 */
934int fdtdec_read_fmap_entry(const void *blob, int node, const char *name,
935 struct fmap_entry *entry)
936{
f3cc44f9 937 const char *prop;
006e73b9
SG
938 u32 reg[2];
939
940 if (fdtdec_get_int_array(blob, node, "reg", reg, 2)) {
941 debug("Node '%s' has bad/missing 'reg' property\n", name);
942 return -FDT_ERR_NOTFOUND;
943 }
944 entry->offset = reg[0];
945 entry->length = reg[1];
f3cc44f9
SG
946 entry->used = fdtdec_get_int(blob, node, "used", entry->length);
947 prop = fdt_getprop(blob, node, "compress", NULL);
948 entry->compress_algo = prop && !strcmp(prop, "lzo") ?
949 FMAP_COMPRESS_LZO : FMAP_COMPRESS_NONE;
950 prop = fdt_getprop(blob, node, "hash", &entry->hash_size);
951 entry->hash_algo = prop ? FMAP_HASH_SHA256 : FMAP_HASH_NONE;
952 entry->hash = (uint8_t *)prop;
006e73b9
SG
953
954 return 0;
955}
56f42242 956
5f7bfdd6 957u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
56f42242
TR
958{
959 u64 number = 0;
960
961 while (cells--)
962 number = (number << 32) | fdt32_to_cpu(*ptr++);
963
964 return number;
965}
966
967int fdt_get_resource(const void *fdt, int node, const char *property,
968 unsigned int index, struct fdt_resource *res)
969{
970 const fdt32_t *ptr, *end;
971 int na, ns, len, parent;
972 unsigned int i = 0;
973
974 parent = fdt_parent_offset(fdt, node);
975 if (parent < 0)
976 return parent;
977
978 na = fdt_address_cells(fdt, parent);
979 ns = fdt_size_cells(fdt, parent);
980
981 ptr = fdt_getprop(fdt, node, property, &len);
982 if (!ptr)
983 return len;
984
985 end = ptr + len / sizeof(*ptr);
986
987 while (ptr + na + ns <= end) {
988 if (i == index) {
989 res->start = res->end = fdtdec_get_number(ptr, na);
990 res->end += fdtdec_get_number(&ptr[na], ns) - 1;
991 return 0;
992 }
993
994 ptr += na + ns;
995 i++;
996 }
997
998 return -FDT_ERR_NOTFOUND;
999}
1000
1001int fdt_get_named_resource(const void *fdt, int node, const char *property,
1002 const char *prop_names, const char *name,
1003 struct fdt_resource *res)
1004{
1005 int index;
1006
1007 index = fdt_find_string(fdt, node, prop_names, name);
1008 if (index < 0)
1009 return index;
1010
1011 return fdt_get_resource(fdt, node, property, index, res);
1012}
9f85eee7 1013
26403871
SG
1014int fdtdec_decode_memory_region(const void *blob, int config_node,
1015 const char *mem_type, const char *suffix,
1016 fdt_addr_t *basep, fdt_size_t *sizep)
1017{
1018 char prop_name[50];
1019 const char *mem;
1020 fdt_size_t size, offset_size;
1021 fdt_addr_t base, offset;
1022 int node;
1023
1024 if (config_node == -1) {
1025 config_node = fdt_path_offset(blob, "/config");
1026 if (config_node < 0) {
1027 debug("%s: Cannot find /config node\n", __func__);
1028 return -ENOENT;
1029 }
1030 }
1031 if (!suffix)
1032 suffix = "";
1033
1034 snprintf(prop_name, sizeof(prop_name), "%s-memory%s", mem_type,
1035 suffix);
1036 mem = fdt_getprop(blob, config_node, prop_name, NULL);
1037 if (!mem) {
1038 debug("%s: No memory type for '%s', using /memory\n", __func__,
1039 prop_name);
1040 mem = "/memory";
1041 }
1042
1043 node = fdt_path_offset(blob, mem);
1044 if (node < 0) {
1045 debug("%s: Failed to find node '%s': %s\n", __func__, mem,
1046 fdt_strerror(node));
1047 return -ENOENT;
1048 }
1049
1050 /*
1051 * Not strictly correct - the memory may have multiple banks. We just
1052 * use the first
1053 */
1054 if (fdtdec_decode_region(blob, node, "reg", &base, &size)) {
1055 debug("%s: Failed to decode memory region %s\n", __func__,
1056 mem);
1057 return -EINVAL;
1058 }
1059
1060 snprintf(prop_name, sizeof(prop_name), "%s-offset%s", mem_type,
1061 suffix);
1062 if (fdtdec_decode_region(blob, config_node, prop_name, &offset,
1063 &offset_size)) {
1064 debug("%s: Failed to decode memory region '%s'\n", __func__,
1065 prop_name);
1066 return -EINVAL;
1067 }
1068
1069 *basep = base + offset;
1070 *sizep = offset_size;
1071
1072 return 0;
1073}
b45122fd 1074
12e67114
SG
1075static int decode_timing_property(const void *blob, int node, const char *name,
1076 struct timing_entry *result)
1077{
1078 int length, ret = 0;
1079 const u32 *prop;
1080
1081 prop = fdt_getprop(blob, node, name, &length);
1082 if (!prop) {
1083 debug("%s: could not find property %s\n",
1084 fdt_get_name(blob, node, NULL), name);
1085 return length;
1086 }
1087
1088 if (length == sizeof(u32)) {
1089 result->typ = fdtdec_get_int(blob, node, name, 0);
1090 result->min = result->typ;
1091 result->max = result->typ;
1092 } else {
1093 ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
1094 }
1095
1096 return ret;
1097}
1098
1099int fdtdec_decode_display_timing(const void *blob, int parent, int index,
1100 struct display_timing *dt)
1101{
1102 int i, node, timings_node;
1103 u32 val = 0;
1104 int ret = 0;
1105
1106 timings_node = fdt_subnode_offset(blob, parent, "display-timings");
1107 if (timings_node < 0)
1108 return timings_node;
1109
1110 for (i = 0, node = fdt_first_subnode(blob, timings_node);
1111 node > 0 && i != index;
1112 node = fdt_next_subnode(blob, node))
1113 i++;
1114
1115 if (node < 0)
1116 return node;
1117
1118 memset(dt, 0, sizeof(*dt));
1119
1120 ret |= decode_timing_property(blob, node, "hback-porch",
1121 &dt->hback_porch);
1122 ret |= decode_timing_property(blob, node, "hfront-porch",
1123 &dt->hfront_porch);
1124 ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
1125 ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
1126 ret |= decode_timing_property(blob, node, "vback-porch",
1127 &dt->vback_porch);
1128 ret |= decode_timing_property(blob, node, "vfront-porch",
1129 &dt->vfront_porch);
1130 ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
1131 ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
1132 ret |= decode_timing_property(blob, node, "clock-frequency",
1133 &dt->pixelclock);
1134
1135 dt->flags = 0;
1136 val = fdtdec_get_int(blob, node, "vsync-active", -1);
1137 if (val != -1) {
1138 dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
1139 DISPLAY_FLAGS_VSYNC_LOW;
1140 }
1141 val = fdtdec_get_int(blob, node, "hsync-active", -1);
1142 if (val != -1) {
1143 dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
1144 DISPLAY_FLAGS_HSYNC_LOW;
1145 }
1146 val = fdtdec_get_int(blob, node, "de-active", -1);
1147 if (val != -1) {
1148 dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
1149 DISPLAY_FLAGS_DE_LOW;
1150 }
1151 val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
1152 if (val != -1) {
1153 dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
1154 DISPLAY_FLAGS_PIXDATA_NEGEDGE;
1155 }
1156
1157 if (fdtdec_get_bool(blob, node, "interlaced"))
1158 dt->flags |= DISPLAY_FLAGS_INTERLACED;
1159 if (fdtdec_get_bool(blob, node, "doublescan"))
1160 dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
1161 if (fdtdec_get_bool(blob, node, "doubleclk"))
1162 dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
1163
1164 return 0;
1165}
1166
0879361f 1167int fdtdec_setup(void)
b45122fd 1168{
0f925822 1169#if CONFIG_IS_ENABLED(OF_CONTROL)
b45122fd
SG
1170# ifdef CONFIG_OF_EMBED
1171 /* Get a pointer to the FDT */
1172 gd->fdt_blob = __dtb_dt_begin;
1173# elif defined CONFIG_OF_SEPARATE
1174# ifdef CONFIG_SPL_BUILD
10172962
SG
1175 /* FDT is at end of BSS unless it is in a different memory region */
1176 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
1177 gd->fdt_blob = (ulong *)&_image_binary_end;
1178 else
1179 gd->fdt_blob = (ulong *)&__bss_end;
b45122fd
SG
1180# else
1181 /* FDT is at end of image */
1182 gd->fdt_blob = (ulong *)&_end;
3bd926cc 1183# endif
b45122fd
SG
1184# elif defined(CONFIG_OF_HOSTFILE)
1185 if (sandbox_read_fdt_from_file()) {
1186 puts("Failed to read control FDT\n");
1187 return -1;
1188 }
1189# endif
1190# ifndef CONFIG_SPL_BUILD
1191 /* Allow the early environment to override the fdt address */
1192 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
1193 (uintptr_t)gd->fdt_blob);
1194# endif
29a23f9d 1195#endif
0879361f 1196 return fdtdec_prepare_fdt();
b45122fd
SG
1197}
1198
1199#endif /* !USE_HOSTCC */