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b5220bc6
SG
1/*
2 * Copyright (c) 2011 The Chromium OS Authors.
1a459660 3 * SPDX-License-Identifier: GPL-2.0+
b5220bc6
SG
4 */
5
29a23f9d 6#ifndef USE_HOSTCC
b5220bc6 7#include <common.h>
5c33c9fd 8#include <errno.h>
b5220bc6
SG
9#include <serial.h>
10#include <libfdt.h>
11#include <fdtdec.h>
b45122fd 12#include <asm/sections.h>
5c33c9fd 13#include <linux/ctype.h>
b5220bc6
SG
14
15DECLARE_GLOBAL_DATA_PTR;
16
17/*
18 * Here are the type we know about. One day we might allow drivers to
19 * register. For now we just put them here. The COMPAT macro allows us to
20 * turn this into a sparse list later, and keeps the ID with the name.
21 */
22#define COMPAT(id, name) name
23static const char * const compat_names[COMPAT_COUNT] = {
f88fe2de 24 COMPAT(UNKNOWN, "<none>"),
0e35ad05
JZ
25 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
26 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
6642a681 27 COMPAT(NVIDIA_TEGRA20_KBC, "nvidia,tegra20-kbc"),
312693c3 28 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
e1ae0d1f 29 COMPAT(NVIDIA_TEGRA20_PWM, "nvidia,tegra20-pwm"),
00f37327
SG
30 COMPAT(NVIDIA_TEGRA124_DC, "nvidia,tegra124-dc"),
31 COMPAT(NVIDIA_TEGRA124_SOR, "nvidia,tegra124-sor"),
32 COMPAT(NVIDIA_TEGRA124_PMC, "nvidia,tegra124-pmc"),
87540de3 33 COMPAT(NVIDIA_TEGRA20_DC, "nvidia,tegra20-dc"),
7aaa5a60 34 COMPAT(NVIDIA_TEGRA210_SDMMC, "nvidia,tegra210-sdhci"),
a73ca478 35 COMPAT(NVIDIA_TEGRA124_SDMMC, "nvidia,tegra124-sdhci"),
f4e4e0b0 36 COMPAT(NVIDIA_TEGRA30_SDMMC, "nvidia,tegra30-sdhci"),
c9aa831e 37 COMPAT(NVIDIA_TEGRA20_SDMMC, "nvidia,tegra20-sdhci"),
f315828b 38 COMPAT(NVIDIA_TEGRA124_PCIE, "nvidia,tegra124-pcie"),
d9eda6c4 39 COMPAT(NVIDIA_TEGRA210_PCIE, "nvidia,tegra210-pcie"),
f315828b
TR
40 COMPAT(NVIDIA_TEGRA30_PCIE, "nvidia,tegra30-pcie"),
41 COMPAT(NVIDIA_TEGRA20_PCIE, "nvidia,tegra20-pcie"),
79c7a90f 42 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
7aaa5a60 43 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
cc9fe33a
HR
44 COMPAT(SMSC_LAN9215, "smsc,lan9215"),
45 COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
c34253d1 46 COMPAT(SAMSUNG_S3C2440_I2C, "samsung,s3c2440-i2c"),
72dbff12
RS
47 COMPAT(SAMSUNG_EXYNOS5_SOUND, "samsung,exynos-sound"),
48 COMPAT(WOLFSON_WM8994_CODEC, "wolfson,wm8994-codec"),
713cb680 49 COMPAT(GOOGLE_CROS_EC_KEYB, "google,cros-ec-keyb"),
6abd1620 50 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
108b85be 51 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
618766c0 52 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
d7377b51 53 COMPAT(SAMSUNG_EXYNOS_FIMD, "samsung,exynos-fimd"),
de461c52 54 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
1e4706a7 55 COMPAT(SAMSUNG_EXYNOS5_DP, "samsung,exynos5-dp"),
7d3ca0f8 56 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
3577fe8b 57 COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"),
ee1e3c2f 58 COMPAT(SAMSUNG_EXYNOS_SERIAL, "samsung,exynos4210-uart"),
f37df0f8 59 COMPAT(MAXIM_MAX77686_PMIC, "maxim,max77686"),
bb8215f4 60 COMPAT(GENERIC_SPI_FLASH, "spi-flash"),
7772bb78 61 COMPAT(MAXIM_98095_CODEC, "maxim,max98095-codec"),
ecbd7e1e 62 COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"),
7d95f2a3 63 COMPAT(SANDBOX_LCD_SDL, "sandbox,lcd-sdl"),
45c480c9 64 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
77f9b1fb 65 COMPAT(INTEL_MICROCODE, "intel,microcode"),
65dd74a6 66 COMPAT(MEMORY_SPD, "memory-spd"),
3ac83935 67 COMPAT(INTEL_PANTHERPOINT_AHCI, "intel,pantherpoint-ahci"),
bb80be39 68 COMPAT(INTEL_MODEL_206AX, "intel,model-206ax"),
effcf067 69 COMPAT(INTEL_GMA, "intel,gma"),
6173c45b 70 COMPAT(AMS_AS3722, "ams,as3722"),
5da38086 71 COMPAT(INTEL_ICH_SPI, "intel,ich-spi"),
c89ada01 72 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
5318f18d 73 COMPAT(INTEL_X86_PINCTRL, "intel,x86-pinctrl"),
6462cded 74 COMPAT(SOCIONEXT_XHCI, "socionext,uniphier-xhci"),
90b16d14 75 COMPAT(COMPAT_INTEL_PCH, "intel,bd82x6x"),
9c7dea60 76 COMPAT(COMPAT_INTEL_IRQ_ROUTER, "intel,irq-router"),
6ab00db2 77 COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
129adf5b 78 COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
f3b84a30
AB
79 COMPAT(COMPAT_INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
80 COMPAT(COMPAT_INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
b5220bc6
SG
81};
82
a53f4a29
SG
83const char *fdtdec_get_compatible(enum fdt_compat_id id)
84{
85 /* We allow reading of the 'unknown' ID for testing purposes */
86 assert(id >= 0 && id < COMPAT_COUNT);
87 return compat_names[id];
88}
89
02464e38
SW
90fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
91 const char *prop_name, int index, int na, int ns,
92 fdt_size_t *sizep)
b5220bc6 93{
02464e38
SW
94 const fdt32_t *prop, *prop_end;
95 const fdt32_t *prop_addr, *prop_size, *prop_after_size;
236efe36 96 int len;
02464e38 97 fdt_addr_t addr;
b5220bc6 98
1cb2323b 99 debug("%s: %s: ", __func__, prop_name);
02464e38
SW
100
101 if (na > (sizeof(fdt_addr_t) / sizeof(fdt32_t))) {
102 debug("(na too large for fdt_addr_t type)\n");
103 return FDT_ADDR_T_NONE;
104 }
105
106 if (ns > (sizeof(fdt_size_t) / sizeof(fdt32_t))) {
107 debug("(ns too large for fdt_size_t type)\n");
108 return FDT_ADDR_T_NONE;
109 }
110
111 prop = fdt_getprop(blob, node, prop_name, &len);
112 if (!prop) {
113 debug("(not found)\n");
114 return FDT_ADDR_T_NONE;
115 }
116 prop_end = prop + (len / sizeof(*prop));
117
118 prop_addr = prop + (index * (na + ns));
119 prop_size = prop_addr + na;
120 prop_after_size = prop_size + ns;
121 if (prop_after_size > prop_end) {
122 debug("(not enough data: expected >= %d cells, got %d cells)\n",
123 (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
124 return FDT_ADDR_T_NONE;
125 }
126
127 addr = fdtdec_get_number(prop_addr, na);
128
129 if (sizep) {
130 *sizep = fdtdec_get_number(prop_size, ns);
131 debug("addr=%08llx, size=%llx\n", (u64)addr, (u64)*sizep);
132 } else {
133 debug("addr=%08llx\n", (u64)addr);
134 }
135
136 return addr;
137}
138
139fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
140 int node, const char *prop_name, int index, fdt_size_t *sizep)
141{
142 int na, ns;
143
144 debug("%s: ", __func__);
145
146 na = fdt_address_cells(blob, parent);
147 if (na < 1) {
148 debug("(bad #address-cells)\n");
149 return FDT_ADDR_T_NONE;
150 }
151
152 ns = fdt_size_cells(blob, parent);
ff0a6358 153 if (ns < 0) {
02464e38
SW
154 debug("(bad #size-cells)\n");
155 return FDT_ADDR_T_NONE;
156 }
157
158 debug("na=%d, ns=%d, ", na, ns);
159
160 return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
161 ns, sizep);
162}
163
164fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
165 const char *prop_name, int index, fdt_size_t *sizep)
166{
167 int parent;
168
169 debug("%s: ", __func__);
170
171 parent = fdt_parent_offset(blob, node);
172 if (parent < 0) {
173 debug("(no parent found)\n");
174 return FDT_ADDR_T_NONE;
5b344360 175 }
02464e38
SW
176
177 return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
178 index, sizep);
179}
180
181fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
182 const char *prop_name, fdt_size_t *sizep)
183{
d93b9a07
SW
184 int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
185
02464e38
SW
186 return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
187 sizeof(fdt_addr_t) / sizeof(fdt32_t),
d93b9a07 188 ns, sizep);
b5220bc6
SG
189}
190
4397a2a8
SG
191fdt_addr_t fdtdec_get_addr(const void *blob, int node,
192 const char *prop_name)
193{
194 return fdtdec_get_addr_size(blob, node, prop_name, NULL);
195}
196
a62e84d7
BM
197#ifdef CONFIG_PCI
198int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type,
199 const char *prop_name, struct fdt_pci_addr *addr)
200{
201 const u32 *cell;
202 int len;
203 int ret = -ENOENT;
204
205 debug("%s: %s: ", __func__, prop_name);
206
207 /*
208 * If we follow the pci bus bindings strictly, we should check
209 * the value of the node's parent node's #address-cells and
210 * #size-cells. They need to be 3 and 2 accordingly. However,
211 * for simplicity we skip the check here.
212 */
213 cell = fdt_getprop(blob, node, prop_name, &len);
214 if (!cell)
215 goto fail;
216
217 if ((len % FDT_PCI_REG_SIZE) == 0) {
218 int num = len / FDT_PCI_REG_SIZE;
219 int i;
220
221 for (i = 0; i < num; i++) {
222 debug("pci address #%d: %08lx %08lx %08lx\n", i,
4ea5243a
SW
223 (ulong)fdt32_to_cpu(cell[0]),
224 (ulong)fdt32_to_cpu(cell[1]),
225 (ulong)fdt32_to_cpu(cell[2]));
226 if ((fdt32_to_cpu(*cell) & type) == type) {
227 addr->phys_hi = fdt32_to_cpu(cell[0]);
228 addr->phys_mid = fdt32_to_cpu(cell[1]);
229 addr->phys_lo = fdt32_to_cpu(cell[1]);
a62e84d7
BM
230 break;
231 } else {
232 cell += (FDT_PCI_ADDR_CELLS +
233 FDT_PCI_SIZE_CELLS);
234 }
235 }
236
106cce96
SG
237 if (i == num) {
238 ret = -ENXIO;
a62e84d7 239 goto fail;
106cce96 240 }
a62e84d7
BM
241
242 return 0;
243 } else {
244 ret = -EINVAL;
245 }
246
247fail:
248 debug("(not found)\n");
249 return ret;
250}
251
252int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
253{
254 const char *list, *end;
255 int len;
256
257 list = fdt_getprop(blob, node, "compatible", &len);
258 if (!list)
259 return -ENOENT;
260
261 end = list + len;
262 while (list < end) {
263 char *s;
264
265 len = strlen(list);
266 if (len >= strlen("pciVVVV,DDDD")) {
267 s = strstr(list, "pci");
268
269 /*
270 * check if the string is something like pciVVVV,DDDD.RR
271 * or just pciVVVV,DDDD
272 */
273 if (s && s[7] == ',' &&
274 (s[12] == '.' || s[12] == 0)) {
275 s += 3;
276 *vendor = simple_strtol(s, NULL, 16);
277
278 s += 5;
279 *device = simple_strtol(s, NULL, 16);
280
281 return 0;
282 }
a62e84d7 283 }
bc6351eb 284 list += (len + 1);
a62e84d7
BM
285 }
286
287 return -ENOENT;
288}
289
290int fdtdec_get_pci_bdf(const void *blob, int node,
291 struct fdt_pci_addr *addr, pci_dev_t *bdf)
292{
293 u16 dt_vendor, dt_device, vendor, device;
294 int ret;
295
296 /* get vendor id & device id from the compatible string */
297 ret = fdtdec_get_pci_vendev(blob, node, &dt_vendor, &dt_device);
298 if (ret)
299 return ret;
300
301 /* extract the bdf from fdt_pci_addr */
302 *bdf = addr->phys_hi & 0xffff00;
303
304 /* read vendor id & device id based on bdf */
305 pci_read_config_word(*bdf, PCI_VENDOR_ID, &vendor);
306 pci_read_config_word(*bdf, PCI_DEVICE_ID, &device);
307
308 /*
309 * Note there are two places in the device tree to fully describe
310 * a pci device: one is via compatible string with a format of
311 * "pciVVVV,DDDD" and the other one is the bdf numbers encoded in
312 * the device node's reg address property. We read the vendor id
313 * and device id based on bdf and compare the values with the
314 * "VVVV,DDDD". If they are the same, then we are good to use bdf
315 * to read device's bar. But if they are different, we have to rely
316 * on the vendor id and device id extracted from the compatible
317 * string and locate the real bdf by pci_find_device(). This is
318 * because normally we may only know device's device number and
319 * function number when writing device tree. The bus number is
320 * dynamically assigned during the pci enumeration process.
321 */
322 if ((dt_vendor != vendor) || (dt_device != device)) {
323 *bdf = pci_find_device(dt_vendor, dt_device, 0);
324 if (*bdf == -1)
325 return -ENODEV;
326 }
327
328 return 0;
329}
330
331int fdtdec_get_pci_bar32(const void *blob, int node,
332 struct fdt_pci_addr *addr, u32 *bar)
333{
334 pci_dev_t bdf;
335 int barnum;
336 int ret;
337
338 /* get pci devices's bdf */
339 ret = fdtdec_get_pci_bdf(blob, node, addr, &bdf);
340 if (ret)
341 return ret;
342
343 /* extract the bar number from fdt_pci_addr */
344 barnum = addr->phys_hi & 0xff;
345 if ((barnum < PCI_BASE_ADDRESS_0) || (barnum > PCI_CARDBUS_CIS))
346 return -EINVAL;
347
348 barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
349 *bar = pci_read_bar32(pci_bus_to_hose(PCI_BUS(bdf)), bdf, barnum);
350
351 return 0;
352}
353#endif
354
aadef0a1
CLC
355uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
356 uint64_t default_val)
357{
358 const uint64_t *cell64;
359 int length;
360
361 cell64 = fdt_getprop(blob, node, prop_name, &length);
362 if (!cell64 || length < sizeof(*cell64))
363 return default_val;
364
365 return fdt64_to_cpu(*cell64);
366}
367
f88fe2de 368int fdtdec_get_is_enabled(const void *blob, int node)
b5220bc6
SG
369{
370 const char *cell;
371
f88fe2de
SG
372 /*
373 * It should say "okay", so only allow that. Some fdts use "ok" but
374 * this is a bug. Please fix your device tree source file. See here
375 * for discussion:
376 *
377 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
378 */
b5220bc6
SG
379 cell = fdt_getprop(blob, node, "status", NULL);
380 if (cell)
f88fe2de
SG
381 return 0 == strcmp(cell, "okay");
382 return 1;
b5220bc6
SG
383}
384
7cde397b 385enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
b5220bc6
SG
386{
387 enum fdt_compat_id id;
388
389 /* Search our drivers */
390 for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
391 if (0 == fdt_node_check_compatible(blob, node,
392 compat_names[id]))
393 return id;
394 return COMPAT_UNKNOWN;
395}
396
397int fdtdec_next_compatible(const void *blob, int node,
398 enum fdt_compat_id id)
399{
400 return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
401}
402
3ddecfc7
SG
403int fdtdec_next_compatible_subnode(const void *blob, int node,
404 enum fdt_compat_id id, int *depthp)
405{
406 do {
407 node = fdt_next_node(blob, node, depthp);
408 } while (*depthp > 1);
409
410 /* If this is a direct subnode, and compatible, return it */
411 if (*depthp == 1 && 0 == fdt_node_check_compatible(
412 blob, node, compat_names[id]))
413 return node;
414
415 return -FDT_ERR_NOTFOUND;
416}
417
b5220bc6
SG
418int fdtdec_next_alias(const void *blob, const char *name,
419 enum fdt_compat_id id, int *upto)
420{
421#define MAX_STR_LEN 20
422 char str[MAX_STR_LEN + 20];
423 int node, err;
424
425 /* snprintf() is not available */
426 assert(strlen(name) < MAX_STR_LEN);
427 sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
00878476 428 node = fdt_path_offset(blob, str);
b5220bc6
SG
429 if (node < 0)
430 return node;
431 err = fdt_node_check_compatible(blob, node, compat_names[id]);
432 if (err < 0)
433 return err;
f88fe2de
SG
434 if (err)
435 return -FDT_ERR_NOTFOUND;
436 (*upto)++;
437 return node;
b5220bc6
SG
438}
439
a53f4a29
SG
440int fdtdec_find_aliases_for_id(const void *blob, const char *name,
441 enum fdt_compat_id id, int *node_list, int maxcount)
c6782270
SG
442{
443 memset(node_list, '\0', sizeof(*node_list) * maxcount);
444
445 return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
446}
447
448/* TODO: Can we tighten this code up a little? */
449int fdtdec_add_aliases_for_id(const void *blob, const char *name,
450 enum fdt_compat_id id, int *node_list, int maxcount)
a53f4a29
SG
451{
452 int name_len = strlen(name);
453 int nodes[maxcount];
454 int num_found = 0;
455 int offset, node;
456 int alias_node;
457 int count;
458 int i, j;
459
460 /* find the alias node if present */
461 alias_node = fdt_path_offset(blob, "/aliases");
462
463 /*
464 * start with nothing, and we can assume that the root node can't
465 * match
466 */
467 memset(nodes, '\0', sizeof(nodes));
468
469 /* First find all the compatible nodes */
470 for (node = count = 0; node >= 0 && count < maxcount;) {
471 node = fdtdec_next_compatible(blob, node, id);
472 if (node >= 0)
473 nodes[count++] = node;
474 }
475 if (node >= 0)
476 debug("%s: warning: maxcount exceeded with alias '%s'\n",
477 __func__, name);
478
479 /* Now find all the aliases */
a53f4a29
SG
480 for (offset = fdt_first_property_offset(blob, alias_node);
481 offset > 0;
482 offset = fdt_next_property_offset(blob, offset)) {
483 const struct fdt_property *prop;
484 const char *path;
485 int number;
486 int found;
487
488 node = 0;
489 prop = fdt_get_property_by_offset(blob, offset, NULL);
490 path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
491 if (prop->len && 0 == strncmp(path, name, name_len))
492 node = fdt_path_offset(blob, prop->data);
493 if (node <= 0)
494 continue;
495
496 /* Get the alias number */
497 number = simple_strtoul(path + name_len, NULL, 10);
498 if (number < 0 || number >= maxcount) {
499 debug("%s: warning: alias '%s' is out of range\n",
500 __func__, path);
501 continue;
502 }
503
504 /* Make sure the node we found is actually in our list! */
505 found = -1;
506 for (j = 0; j < count; j++)
507 if (nodes[j] == node) {
508 found = j;
509 break;
510 }
511
512 if (found == -1) {
513 debug("%s: warning: alias '%s' points to a node "
514 "'%s' that is missing or is not compatible "
515 " with '%s'\n", __func__, path,
516 fdt_get_name(blob, node, NULL),
517 compat_names[id]);
518 continue;
519 }
520
521 /*
522 * Add this node to our list in the right place, and mark
523 * it as done.
524 */
525 if (fdtdec_get_is_enabled(blob, node)) {
c6782270
SG
526 if (node_list[number]) {
527 debug("%s: warning: alias '%s' requires that "
528 "a node be placed in the list in a "
529 "position which is already filled by "
530 "node '%s'\n", __func__, path,
531 fdt_get_name(blob, node, NULL));
532 continue;
533 }
a53f4a29
SG
534 node_list[number] = node;
535 if (number >= num_found)
536 num_found = number + 1;
537 }
c6782270 538 nodes[found] = 0;
a53f4a29
SG
539 }
540
541 /* Add any nodes not mentioned by an alias */
542 for (i = j = 0; i < maxcount; i++) {
543 if (!node_list[i]) {
544 for (; j < maxcount; j++)
545 if (nodes[j] &&
546 fdtdec_get_is_enabled(blob, nodes[j]))
547 break;
548
549 /* Have we run out of nodes to add? */
550 if (j == maxcount)
551 break;
552
553 assert(!node_list[i]);
554 node_list[i] = nodes[j++];
555 if (i >= num_found)
556 num_found = i + 1;
557 }
558 }
559
560 return num_found;
561}
562
5c33c9fd
SG
563int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
564 int *seqp)
565{
566 int base_len = strlen(base);
567 const char *find_name;
568 int find_namelen;
569 int prop_offset;
570 int aliases;
571
572 find_name = fdt_get_name(blob, offset, &find_namelen);
573 debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
574
575 aliases = fdt_path_offset(blob, "/aliases");
576 for (prop_offset = fdt_first_property_offset(blob, aliases);
577 prop_offset > 0;
578 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
579 const char *prop;
580 const char *name;
581 const char *slash;
c4af6732 582 int len, val;
5c33c9fd
SG
583
584 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
585 debug(" - %s, %s\n", name, prop);
586 if (len < find_namelen || *prop != '/' || prop[len - 1] ||
587 strncmp(name, base, base_len))
588 continue;
589
590 slash = strrchr(prop, '/');
591 if (strcmp(slash + 1, find_name))
592 continue;
c4af6732
SG
593 val = trailing_strtol(name);
594 if (val != -1) {
595 *seqp = val;
596 debug("Found seq %d\n", *seqp);
597 return 0;
5c33c9fd
SG
598 }
599 }
600
601 debug("Not found\n");
602 return -ENOENT;
603}
604
3bc37a50 605const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
aac07d49 606{
aac07d49 607 int chosen_node;
aac07d49
SG
608
609 if (!blob)
3bc37a50 610 return NULL;
aac07d49 611 chosen_node = fdt_path_offset(blob, "/chosen");
3bc37a50
SG
612 return fdt_getprop(blob, chosen_node, name, NULL);
613}
614
615int fdtdec_get_chosen_node(const void *blob, const char *name)
616{
617 const char *prop;
618
619 prop = fdtdec_get_chosen_prop(blob, name);
aac07d49
SG
620 if (!prop)
621 return -FDT_ERR_NOTFOUND;
622 return fdt_path_offset(blob, prop);
623}
624
9a263e55
SG
625int fdtdec_check_fdt(void)
626{
627 /*
628 * We must have an FDT, but we cannot panic() yet since the console
629 * is not ready. So for now, just assert(). Boards which need an early
630 * FDT (prior to console ready) will need to make their own
631 * arrangements and do their own checks.
632 */
633 assert(!fdtdec_prepare_fdt());
634 return 0;
635}
636
b5220bc6
SG
637/*
638 * This function is a little odd in that it accesses global data. At some
639 * point if the architecture board.c files merge this will make more sense.
640 * Even now, it is common code.
641 */
9a263e55 642int fdtdec_prepare_fdt(void)
b5220bc6 643{
c309c2da
SG
644 if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
645 fdt_check_header(gd->fdt_blob)) {
66312374
SG
646#ifdef CONFIG_SPL_BUILD
647 puts("Missing DTB\n");
648#else
649 puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
cb5f97f7
SG
650# ifdef DEBUG
651 if (gd->fdt_blob) {
652 printf("fdt_blob=%p\n", gd->fdt_blob);
653 print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
654 32, 0);
655 }
656# endif
66312374 657#endif
9a263e55
SG
658 return -1;
659 }
b5220bc6
SG
660 return 0;
661}
d17da655
SG
662
663int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
664{
665 const u32 *phandle;
666 int lookup;
667
1cb2323b 668 debug("%s: %s\n", __func__, prop_name);
d17da655
SG
669 phandle = fdt_getprop(blob, node, prop_name, NULL);
670 if (!phandle)
671 return -FDT_ERR_NOTFOUND;
672
673 lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
674 return lookup;
675}
676
677/**
678 * Look up a property in a node and check that it has a minimum length.
679 *
680 * @param blob FDT blob
681 * @param node node to examine
682 * @param prop_name name of property to find
683 * @param min_len minimum property length in bytes
684 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
685 found, or -FDT_ERR_BADLAYOUT if not enough data
686 * @return pointer to cell, which is only valid if err == 0
687 */
688static const void *get_prop_check_min_len(const void *blob, int node,
689 const char *prop_name, int min_len, int *err)
690{
691 const void *cell;
692 int len;
693
694 debug("%s: %s\n", __func__, prop_name);
695 cell = fdt_getprop(blob, node, prop_name, &len);
696 if (!cell)
697 *err = -FDT_ERR_NOTFOUND;
698 else if (len < min_len)
699 *err = -FDT_ERR_BADLAYOUT;
700 else
701 *err = 0;
702 return cell;
703}
704
705int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
706 u32 *array, int count)
707{
708 const u32 *cell;
709 int i, err = 0;
710
711 debug("%s: %s\n", __func__, prop_name);
712 cell = get_prop_check_min_len(blob, node, prop_name,
713 sizeof(u32) * count, &err);
714 if (!err) {
715 for (i = 0; i < count; i++)
716 array[i] = fdt32_to_cpu(cell[i]);
717 }
718 return err;
719}
720
a9f04d49
SG
721int fdtdec_get_int_array_count(const void *blob, int node,
722 const char *prop_name, u32 *array, int count)
723{
724 const u32 *cell;
725 int len, elems;
726 int i;
727
728 debug("%s: %s\n", __func__, prop_name);
729 cell = fdt_getprop(blob, node, prop_name, &len);
730 if (!cell)
731 return -FDT_ERR_NOTFOUND;
732 elems = len / sizeof(u32);
733 if (count > elems)
734 count = elems;
735 for (i = 0; i < count; i++)
736 array[i] = fdt32_to_cpu(cell[i]);
737
738 return count;
739}
740
96875e7d
SG
741const u32 *fdtdec_locate_array(const void *blob, int node,
742 const char *prop_name, int count)
743{
744 const u32 *cell;
745 int err;
746
747 cell = get_prop_check_min_len(blob, node, prop_name,
748 sizeof(u32) * count, &err);
749 return err ? NULL : cell;
750}
751
d17da655
SG
752int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
753{
754 const s32 *cell;
755 int len;
756
757 debug("%s: %s\n", __func__, prop_name);
758 cell = fdt_getprop(blob, node, prop_name, &len);
759 return cell != NULL;
760}
ed3ee5cd 761
57068a7a
SG
762int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
763 const char *list_name,
764 const char *cells_name,
765 int cell_count, int index,
766 struct fdtdec_phandle_args *out_args)
767{
768 const __be32 *list, *list_end;
769 int rc = 0, size, cur_index = 0;
770 uint32_t count = 0;
771 int node = -1;
772 int phandle;
773
774 /* Retrieve the phandle list property */
775 list = fdt_getprop(blob, src_node, list_name, &size);
776 if (!list)
777 return -ENOENT;
778 list_end = list + size / sizeof(*list);
779
780 /* Loop over the phandles until all the requested entry is found */
781 while (list < list_end) {
782 rc = -EINVAL;
783 count = 0;
784
785 /*
786 * If phandle is 0, then it is an empty entry with no
787 * arguments. Skip forward to the next entry.
788 */
789 phandle = be32_to_cpup(list++);
790 if (phandle) {
791 /*
792 * Find the provider node and parse the #*-cells
793 * property to determine the argument length.
794 *
795 * This is not needed if the cell count is hard-coded
796 * (i.e. cells_name not set, but cell_count is set),
797 * except when we're going to return the found node
798 * below.
799 */
800 if (cells_name || cur_index == index) {
801 node = fdt_node_offset_by_phandle(blob,
802 phandle);
803 if (!node) {
804 debug("%s: could not find phandle\n",
805 fdt_get_name(blob, src_node,
806 NULL));
807 goto err;
808 }
809 }
810
811 if (cells_name) {
812 count = fdtdec_get_int(blob, node, cells_name,
813 -1);
814 if (count == -1) {
815 debug("%s: could not get %s for %s\n",
816 fdt_get_name(blob, src_node,
817 NULL),
818 cells_name,
819 fdt_get_name(blob, node,
820 NULL));
821 goto err;
822 }
823 } else {
824 count = cell_count;
825 }
826
827 /*
828 * Make sure that the arguments actually fit in the
829 * remaining property data length
830 */
831 if (list + count > list_end) {
832 debug("%s: arguments longer than property\n",
833 fdt_get_name(blob, src_node, NULL));
834 goto err;
835 }
836 }
837
838 /*
839 * All of the error cases above bail out of the loop, so at
840 * this point, the parsing is successful. If the requested
841 * index matches, then fill the out_args structure and return,
842 * or return -ENOENT for an empty entry.
843 */
844 rc = -ENOENT;
845 if (cur_index == index) {
846 if (!phandle)
847 goto err;
848
849 if (out_args) {
850 int i;
851
852 if (count > MAX_PHANDLE_ARGS) {
853 debug("%s: too many arguments %d\n",
854 fdt_get_name(blob, src_node,
855 NULL), count);
856 count = MAX_PHANDLE_ARGS;
857 }
858 out_args->node = node;
859 out_args->args_count = count;
860 for (i = 0; i < count; i++) {
861 out_args->args[i] =
862 be32_to_cpup(list++);
863 }
864 }
865
866 /* Found it! return success */
867 return 0;
868 }
869
870 node = -1;
871 list += count;
872 cur_index++;
873 }
874
875 /*
876 * Result will be one of:
877 * -ENOENT : index is for empty phandle
878 * -EINVAL : parsing error on data
879 * [1..n] : Number of phandle (count mode; when index = -1)
880 */
881 rc = index < 0 ? cur_index : -ENOENT;
882 err:
883 return rc;
884}
885
bed4d892
AS
886int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
887 u8 *array, int count)
888{
889 const u8 *cell;
890 int err;
891
892 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
893 if (!err)
894 memcpy(array, cell, count);
895 return err;
896}
897
898const u8 *fdtdec_locate_byte_array(const void *blob, int node,
899 const char *prop_name, int count)
900{
901 const u8 *cell;
902 int err;
903
904 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
905 if (err)
906 return NULL;
907 return cell;
908}
09258f1e 909
09258f1e
AK
910int fdtdec_get_config_int(const void *blob, const char *prop_name,
911 int default_val)
912{
913 int config_node;
914
915 debug("%s: %s\n", __func__, prop_name);
916 config_node = fdt_path_offset(blob, "/config");
917 if (config_node < 0)
918 return default_val;
919 return fdtdec_get_int(blob, config_node, prop_name, default_val);
920}
332ab0d5 921
79289c0b
GB
922int fdtdec_get_config_bool(const void *blob, const char *prop_name)
923{
924 int config_node;
925 const void *prop;
926
927 debug("%s: %s\n", __func__, prop_name);
928 config_node = fdt_path_offset(blob, "/config");
929 if (config_node < 0)
930 return 0;
931 prop = fdt_get_property(blob, config_node, prop_name, NULL);
932
933 return prop != NULL;
934}
935
332ab0d5
SG
936char *fdtdec_get_config_string(const void *blob, const char *prop_name)
937{
938 const char *nodep;
939 int nodeoffset;
940 int len;
941
942 debug("%s: %s\n", __func__, prop_name);
943 nodeoffset = fdt_path_offset(blob, "/config");
944 if (nodeoffset < 0)
945 return NULL;
946
947 nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
948 if (!nodep)
949 return NULL;
950
951 return (char *)nodep;
952}
f20c4619 953
76489832
SG
954int fdtdec_decode_region(const void *blob, int node, const char *prop_name,
955 fdt_addr_t *basep, fdt_size_t *sizep)
f20c4619
SG
956{
957 const fdt_addr_t *cell;
958 int len;
959
76489832
SG
960 debug("%s: %s: %s\n", __func__, fdt_get_name(blob, node, NULL),
961 prop_name);
f20c4619 962 cell = fdt_getprop(blob, node, prop_name, &len);
76489832
SG
963 if (!cell || (len < sizeof(fdt_addr_t) * 2)) {
964 debug("cell=%p, len=%d\n", cell, len);
f20c4619 965 return -1;
76489832
SG
966 }
967
968 *basep = fdt_addr_to_cpu(*cell);
969 *sizep = fdt_size_to_cpu(cell[1]);
970 debug("%s: base=%08lx, size=%lx\n", __func__, (ulong)*basep,
971 (ulong)*sizep);
f20c4619 972
f20c4619
SG
973 return 0;
974}
006e73b9
SG
975
976/**
977 * Read a flash entry from the fdt
978 *
979 * @param blob FDT blob
980 * @param node Offset of node to read
981 * @param name Name of node being read
982 * @param entry Place to put offset and size of this node
983 * @return 0 if ok, -ve on error
984 */
985int fdtdec_read_fmap_entry(const void *blob, int node, const char *name,
986 struct fmap_entry *entry)
987{
f3cc44f9 988 const char *prop;
006e73b9
SG
989 u32 reg[2];
990
991 if (fdtdec_get_int_array(blob, node, "reg", reg, 2)) {
992 debug("Node '%s' has bad/missing 'reg' property\n", name);
993 return -FDT_ERR_NOTFOUND;
994 }
995 entry->offset = reg[0];
996 entry->length = reg[1];
f3cc44f9
SG
997 entry->used = fdtdec_get_int(blob, node, "used", entry->length);
998 prop = fdt_getprop(blob, node, "compress", NULL);
999 entry->compress_algo = prop && !strcmp(prop, "lzo") ?
1000 FMAP_COMPRESS_LZO : FMAP_COMPRESS_NONE;
1001 prop = fdt_getprop(blob, node, "hash", &entry->hash_size);
1002 entry->hash_algo = prop ? FMAP_HASH_SHA256 : FMAP_HASH_NONE;
1003 entry->hash = (uint8_t *)prop;
006e73b9
SG
1004
1005 return 0;
1006}
56f42242 1007
5f7bfdd6 1008u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
56f42242
TR
1009{
1010 u64 number = 0;
1011
1012 while (cells--)
1013 number = (number << 32) | fdt32_to_cpu(*ptr++);
1014
1015 return number;
1016}
1017
1018int fdt_get_resource(const void *fdt, int node, const char *property,
1019 unsigned int index, struct fdt_resource *res)
1020{
1021 const fdt32_t *ptr, *end;
1022 int na, ns, len, parent;
1023 unsigned int i = 0;
1024
1025 parent = fdt_parent_offset(fdt, node);
1026 if (parent < 0)
1027 return parent;
1028
1029 na = fdt_address_cells(fdt, parent);
1030 ns = fdt_size_cells(fdt, parent);
1031
1032 ptr = fdt_getprop(fdt, node, property, &len);
1033 if (!ptr)
1034 return len;
1035
1036 end = ptr + len / sizeof(*ptr);
1037
1038 while (ptr + na + ns <= end) {
1039 if (i == index) {
1040 res->start = res->end = fdtdec_get_number(ptr, na);
1041 res->end += fdtdec_get_number(&ptr[na], ns) - 1;
1042 return 0;
1043 }
1044
1045 ptr += na + ns;
1046 i++;
1047 }
1048
1049 return -FDT_ERR_NOTFOUND;
1050}
1051
1052int fdt_get_named_resource(const void *fdt, int node, const char *property,
1053 const char *prop_names, const char *name,
1054 struct fdt_resource *res)
1055{
1056 int index;
1057
1058 index = fdt_find_string(fdt, node, prop_names, name);
1059 if (index < 0)
1060 return index;
1061
1062 return fdt_get_resource(fdt, node, property, index, res);
1063}
9f85eee7 1064
26403871
SG
1065int fdtdec_decode_memory_region(const void *blob, int config_node,
1066 const char *mem_type, const char *suffix,
1067 fdt_addr_t *basep, fdt_size_t *sizep)
1068{
1069 char prop_name[50];
1070 const char *mem;
1071 fdt_size_t size, offset_size;
1072 fdt_addr_t base, offset;
1073 int node;
1074
1075 if (config_node == -1) {
1076 config_node = fdt_path_offset(blob, "/config");
1077 if (config_node < 0) {
1078 debug("%s: Cannot find /config node\n", __func__);
1079 return -ENOENT;
1080 }
1081 }
1082 if (!suffix)
1083 suffix = "";
1084
1085 snprintf(prop_name, sizeof(prop_name), "%s-memory%s", mem_type,
1086 suffix);
1087 mem = fdt_getprop(blob, config_node, prop_name, NULL);
1088 if (!mem) {
1089 debug("%s: No memory type for '%s', using /memory\n", __func__,
1090 prop_name);
1091 mem = "/memory";
1092 }
1093
1094 node = fdt_path_offset(blob, mem);
1095 if (node < 0) {
1096 debug("%s: Failed to find node '%s': %s\n", __func__, mem,
1097 fdt_strerror(node));
1098 return -ENOENT;
1099 }
1100
1101 /*
1102 * Not strictly correct - the memory may have multiple banks. We just
1103 * use the first
1104 */
1105 if (fdtdec_decode_region(blob, node, "reg", &base, &size)) {
1106 debug("%s: Failed to decode memory region %s\n", __func__,
1107 mem);
1108 return -EINVAL;
1109 }
1110
1111 snprintf(prop_name, sizeof(prop_name), "%s-offset%s", mem_type,
1112 suffix);
1113 if (fdtdec_decode_region(blob, config_node, prop_name, &offset,
1114 &offset_size)) {
1115 debug("%s: Failed to decode memory region '%s'\n", __func__,
1116 prop_name);
1117 return -EINVAL;
1118 }
1119
1120 *basep = base + offset;
1121 *sizep = offset_size;
1122
1123 return 0;
1124}
b45122fd 1125
12e67114
SG
1126static int decode_timing_property(const void *blob, int node, const char *name,
1127 struct timing_entry *result)
1128{
1129 int length, ret = 0;
1130 const u32 *prop;
1131
1132 prop = fdt_getprop(blob, node, name, &length);
1133 if (!prop) {
1134 debug("%s: could not find property %s\n",
1135 fdt_get_name(blob, node, NULL), name);
1136 return length;
1137 }
1138
1139 if (length == sizeof(u32)) {
1140 result->typ = fdtdec_get_int(blob, node, name, 0);
1141 result->min = result->typ;
1142 result->max = result->typ;
1143 } else {
1144 ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
1145 }
1146
1147 return ret;
1148}
1149
1150int fdtdec_decode_display_timing(const void *blob, int parent, int index,
1151 struct display_timing *dt)
1152{
1153 int i, node, timings_node;
1154 u32 val = 0;
1155 int ret = 0;
1156
1157 timings_node = fdt_subnode_offset(blob, parent, "display-timings");
1158 if (timings_node < 0)
1159 return timings_node;
1160
1161 for (i = 0, node = fdt_first_subnode(blob, timings_node);
1162 node > 0 && i != index;
1163 node = fdt_next_subnode(blob, node))
1164 i++;
1165
1166 if (node < 0)
1167 return node;
1168
1169 memset(dt, 0, sizeof(*dt));
1170
1171 ret |= decode_timing_property(blob, node, "hback-porch",
1172 &dt->hback_porch);
1173 ret |= decode_timing_property(blob, node, "hfront-porch",
1174 &dt->hfront_porch);
1175 ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
1176 ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
1177 ret |= decode_timing_property(blob, node, "vback-porch",
1178 &dt->vback_porch);
1179 ret |= decode_timing_property(blob, node, "vfront-porch",
1180 &dt->vfront_porch);
1181 ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
1182 ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
1183 ret |= decode_timing_property(blob, node, "clock-frequency",
1184 &dt->pixelclock);
1185
1186 dt->flags = 0;
1187 val = fdtdec_get_int(blob, node, "vsync-active", -1);
1188 if (val != -1) {
1189 dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
1190 DISPLAY_FLAGS_VSYNC_LOW;
1191 }
1192 val = fdtdec_get_int(blob, node, "hsync-active", -1);
1193 if (val != -1) {
1194 dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
1195 DISPLAY_FLAGS_HSYNC_LOW;
1196 }
1197 val = fdtdec_get_int(blob, node, "de-active", -1);
1198 if (val != -1) {
1199 dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
1200 DISPLAY_FLAGS_DE_LOW;
1201 }
1202 val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
1203 if (val != -1) {
1204 dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
1205 DISPLAY_FLAGS_PIXDATA_NEGEDGE;
1206 }
1207
1208 if (fdtdec_get_bool(blob, node, "interlaced"))
1209 dt->flags |= DISPLAY_FLAGS_INTERLACED;
1210 if (fdtdec_get_bool(blob, node, "doublescan"))
1211 dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
1212 if (fdtdec_get_bool(blob, node, "doubleclk"))
1213 dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
1214
1215 return 0;
1216}
1217
0879361f 1218int fdtdec_setup(void)
b45122fd 1219{
0f925822 1220#if CONFIG_IS_ENABLED(OF_CONTROL)
b45122fd
SG
1221# ifdef CONFIG_OF_EMBED
1222 /* Get a pointer to the FDT */
1223 gd->fdt_blob = __dtb_dt_begin;
1224# elif defined CONFIG_OF_SEPARATE
1225# ifdef CONFIG_SPL_BUILD
10172962
SG
1226 /* FDT is at end of BSS unless it is in a different memory region */
1227 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
1228 gd->fdt_blob = (ulong *)&_image_binary_end;
1229 else
1230 gd->fdt_blob = (ulong *)&__bss_end;
b45122fd
SG
1231# else
1232 /* FDT is at end of image */
1233 gd->fdt_blob = (ulong *)&_end;
3bd926cc 1234# endif
b45122fd
SG
1235# elif defined(CONFIG_OF_HOSTFILE)
1236 if (sandbox_read_fdt_from_file()) {
1237 puts("Failed to read control FDT\n");
1238 return -1;
1239 }
1240# endif
1241# ifndef CONFIG_SPL_BUILD
1242 /* Allow the early environment to override the fdt address */
1243 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
1244 (uintptr_t)gd->fdt_blob);
1245# endif
29a23f9d 1246#endif
0879361f 1247 return fdtdec_prepare_fdt();
b45122fd
SG
1248}
1249
1250#endif /* !USE_HOSTCC */