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b5220bc6
SG
1/*
2 * Copyright (c) 2011 The Chromium OS Authors.
1a459660 3 * SPDX-License-Identifier: GPL-2.0+
b5220bc6
SG
4 */
5
29a23f9d 6#ifndef USE_HOSTCC
b5220bc6 7#include <common.h>
fcc0a877 8#include <dm.h>
5c33c9fd 9#include <errno.h>
b5220bc6
SG
10#include <serial.h>
11#include <libfdt.h>
6e06acb7 12#include <fdt_support.h>
b5220bc6 13#include <fdtdec.h>
b45122fd 14#include <asm/sections.h>
5c33c9fd 15#include <linux/ctype.h>
b5220bc6
SG
16
17DECLARE_GLOBAL_DATA_PTR;
18
19/*
20 * Here are the type we know about. One day we might allow drivers to
21 * register. For now we just put them here. The COMPAT macro allows us to
22 * turn this into a sparse list later, and keeps the ID with the name.
01a227df
SG
23 *
24 * NOTE: This list is basically a TODO list for things that need to be
25 * converted to driver model. So don't add new things here unless there is a
26 * good reason why driver-model conversion is infeasible. Examples include
27 * things which are used before driver model is available.
b5220bc6
SG
28 */
29#define COMPAT(id, name) name
30static const char * const compat_names[COMPAT_COUNT] = {
f88fe2de 31 COMPAT(UNKNOWN, "<none>"),
0e35ad05
JZ
32 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
33 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
312693c3 34 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
00f37327 35 COMPAT(NVIDIA_TEGRA124_PMC, "nvidia,tegra124-pmc"),
39f63332 36 COMPAT(NVIDIA_TEGRA186_SDMMC, "nvidia,tegra186-sdhci"),
7aaa5a60 37 COMPAT(NVIDIA_TEGRA210_SDMMC, "nvidia,tegra210-sdhci"),
a73ca478 38 COMPAT(NVIDIA_TEGRA124_SDMMC, "nvidia,tegra124-sdhci"),
f4e4e0b0 39 COMPAT(NVIDIA_TEGRA30_SDMMC, "nvidia,tegra30-sdhci"),
c9aa831e 40 COMPAT(NVIDIA_TEGRA20_SDMMC, "nvidia,tegra20-sdhci"),
79c7a90f 41 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
7aaa5a60 42 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
cc9fe33a
HR
43 COMPAT(SMSC_LAN9215, "smsc,lan9215"),
44 COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
c34253d1 45 COMPAT(SAMSUNG_S3C2440_I2C, "samsung,s3c2440-i2c"),
72dbff12
RS
46 COMPAT(SAMSUNG_EXYNOS5_SOUND, "samsung,exynos-sound"),
47 COMPAT(WOLFSON_WM8994_CODEC, "wolfson,wm8994-codec"),
6abd1620 48 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
108b85be 49 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
618766c0 50 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
de461c52 51 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
7d3ca0f8 52 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
3577fe8b 53 COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"),
f37df0f8 54 COMPAT(MAXIM_MAX77686_PMIC, "maxim,max77686"),
bb8215f4 55 COMPAT(GENERIC_SPI_FLASH, "spi-flash"),
7772bb78 56 COMPAT(MAXIM_98095_CODEC, "maxim,max98095-codec"),
ecbd7e1e 57 COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"),
45c480c9 58 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
77f9b1fb 59 COMPAT(INTEL_MICROCODE, "intel,microcode"),
6173c45b 60 COMPAT(AMS_AS3722, "ams,as3722"),
c89ada01 61 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
6ab00db2 62 COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
129adf5b 63 COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
ef4b01b2 64 COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
39ea0ee9
SG
65 COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
66 COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
67 COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
4ccae81c 68 COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
b5220bc6
SG
69};
70
a53f4a29
SG
71const char *fdtdec_get_compatible(enum fdt_compat_id id)
72{
73 /* We allow reading of the 'unknown' ID for testing purposes */
74 assert(id >= 0 && id < COMPAT_COUNT);
75 return compat_names[id];
76}
77
02464e38
SW
78fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
79 const char *prop_name, int index, int na, int ns,
6e06acb7 80 fdt_size_t *sizep, bool translate)
b5220bc6 81{
02464e38
SW
82 const fdt32_t *prop, *prop_end;
83 const fdt32_t *prop_addr, *prop_size, *prop_after_size;
236efe36 84 int len;
02464e38 85 fdt_addr_t addr;
b5220bc6 86
1cb2323b 87 debug("%s: %s: ", __func__, prop_name);
02464e38
SW
88
89 if (na > (sizeof(fdt_addr_t) / sizeof(fdt32_t))) {
90 debug("(na too large for fdt_addr_t type)\n");
91 return FDT_ADDR_T_NONE;
92 }
93
94 if (ns > (sizeof(fdt_size_t) / sizeof(fdt32_t))) {
95 debug("(ns too large for fdt_size_t type)\n");
96 return FDT_ADDR_T_NONE;
97 }
98
99 prop = fdt_getprop(blob, node, prop_name, &len);
100 if (!prop) {
101 debug("(not found)\n");
102 return FDT_ADDR_T_NONE;
103 }
104 prop_end = prop + (len / sizeof(*prop));
105
106 prop_addr = prop + (index * (na + ns));
107 prop_size = prop_addr + na;
108 prop_after_size = prop_size + ns;
109 if (prop_after_size > prop_end) {
110 debug("(not enough data: expected >= %d cells, got %d cells)\n",
111 (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
112 return FDT_ADDR_T_NONE;
113 }
114
6e06acb7
SW
115#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_OF_LIBFDT)
116 if (translate)
117 addr = fdt_translate_address(blob, node, prop_addr);
118 else
119#endif
120 addr = fdtdec_get_number(prop_addr, na);
02464e38
SW
121
122 if (sizep) {
123 *sizep = fdtdec_get_number(prop_size, ns);
fd30d2c6
SG
124 debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
125 (unsigned long long)*sizep);
02464e38 126 } else {
fd30d2c6 127 debug("addr=%08llx\n", (unsigned long long)addr);
02464e38
SW
128 }
129
130 return addr;
131}
132
133fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
6e06acb7
SW
134 int node, const char *prop_name, int index, fdt_size_t *sizep,
135 bool translate)
02464e38
SW
136{
137 int na, ns;
138
139 debug("%s: ", __func__);
140
141 na = fdt_address_cells(blob, parent);
142 if (na < 1) {
143 debug("(bad #address-cells)\n");
144 return FDT_ADDR_T_NONE;
145 }
146
147 ns = fdt_size_cells(blob, parent);
ff0a6358 148 if (ns < 0) {
02464e38
SW
149 debug("(bad #size-cells)\n");
150 return FDT_ADDR_T_NONE;
151 }
152
153 debug("na=%d, ns=%d, ", na, ns);
154
155 return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
6e06acb7 156 ns, sizep, translate);
02464e38
SW
157}
158
159fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
6e06acb7
SW
160 const char *prop_name, int index, fdt_size_t *sizep,
161 bool translate)
02464e38
SW
162{
163 int parent;
164
165 debug("%s: ", __func__);
166
167 parent = fdt_parent_offset(blob, node);
168 if (parent < 0) {
169 debug("(no parent found)\n");
170 return FDT_ADDR_T_NONE;
5b344360 171 }
02464e38
SW
172
173 return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
6e06acb7 174 index, sizep, translate);
02464e38
SW
175}
176
177fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
178 const char *prop_name, fdt_size_t *sizep)
179{
d93b9a07
SW
180 int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
181
02464e38
SW
182 return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
183 sizeof(fdt_addr_t) / sizeof(fdt32_t),
6e06acb7 184 ns, sizep, false);
b5220bc6
SG
185}
186
4397a2a8
SG
187fdt_addr_t fdtdec_get_addr(const void *blob, int node,
188 const char *prop_name)
189{
190 return fdtdec_get_addr_size(blob, node, prop_name, NULL);
191}
192
fcc0a877 193#if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
a62e84d7
BM
194int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type,
195 const char *prop_name, struct fdt_pci_addr *addr)
196{
197 const u32 *cell;
198 int len;
199 int ret = -ENOENT;
200
201 debug("%s: %s: ", __func__, prop_name);
202
203 /*
204 * If we follow the pci bus bindings strictly, we should check
205 * the value of the node's parent node's #address-cells and
206 * #size-cells. They need to be 3 and 2 accordingly. However,
207 * for simplicity we skip the check here.
208 */
209 cell = fdt_getprop(blob, node, prop_name, &len);
210 if (!cell)
211 goto fail;
212
213 if ((len % FDT_PCI_REG_SIZE) == 0) {
214 int num = len / FDT_PCI_REG_SIZE;
215 int i;
216
217 for (i = 0; i < num; i++) {
218 debug("pci address #%d: %08lx %08lx %08lx\n", i,
4ea5243a
SW
219 (ulong)fdt32_to_cpu(cell[0]),
220 (ulong)fdt32_to_cpu(cell[1]),
221 (ulong)fdt32_to_cpu(cell[2]));
222 if ((fdt32_to_cpu(*cell) & type) == type) {
223 addr->phys_hi = fdt32_to_cpu(cell[0]);
224 addr->phys_mid = fdt32_to_cpu(cell[1]);
225 addr->phys_lo = fdt32_to_cpu(cell[1]);
a62e84d7
BM
226 break;
227 } else {
228 cell += (FDT_PCI_ADDR_CELLS +
229 FDT_PCI_SIZE_CELLS);
230 }
231 }
232
106cce96
SG
233 if (i == num) {
234 ret = -ENXIO;
a62e84d7 235 goto fail;
106cce96 236 }
a62e84d7
BM
237
238 return 0;
239 } else {
240 ret = -EINVAL;
241 }
242
243fail:
244 debug("(not found)\n");
245 return ret;
246}
247
248int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
249{
250 const char *list, *end;
251 int len;
252
253 list = fdt_getprop(blob, node, "compatible", &len);
254 if (!list)
255 return -ENOENT;
256
257 end = list + len;
258 while (list < end) {
259 char *s;
260
261 len = strlen(list);
262 if (len >= strlen("pciVVVV,DDDD")) {
263 s = strstr(list, "pci");
264
265 /*
266 * check if the string is something like pciVVVV,DDDD.RR
267 * or just pciVVVV,DDDD
268 */
269 if (s && s[7] == ',' &&
270 (s[12] == '.' || s[12] == 0)) {
271 s += 3;
272 *vendor = simple_strtol(s, NULL, 16);
273
274 s += 5;
275 *device = simple_strtol(s, NULL, 16);
276
277 return 0;
278 }
a62e84d7 279 }
bc6351eb 280 list += (len + 1);
a62e84d7
BM
281 }
282
283 return -ENOENT;
284}
285
fcc0a877
SG
286int fdtdec_get_pci_bar32(struct udevice *dev, struct fdt_pci_addr *addr,
287 u32 *bar)
a62e84d7 288{
a62e84d7 289 int barnum;
a62e84d7
BM
290
291 /* extract the bar number from fdt_pci_addr */
292 barnum = addr->phys_hi & 0xff;
293 if ((barnum < PCI_BASE_ADDRESS_0) || (barnum > PCI_CARDBUS_CIS))
294 return -EINVAL;
295
296 barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
fcc0a877 297 *bar = dm_pci_read_bar32(dev, barnum);
a62e84d7
BM
298
299 return 0;
300}
301#endif
302
aadef0a1
CLC
303uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
304 uint64_t default_val)
305{
306 const uint64_t *cell64;
307 int length;
308
309 cell64 = fdt_getprop(blob, node, prop_name, &length);
310 if (!cell64 || length < sizeof(*cell64))
311 return default_val;
312
313 return fdt64_to_cpu(*cell64);
314}
315
f88fe2de 316int fdtdec_get_is_enabled(const void *blob, int node)
b5220bc6
SG
317{
318 const char *cell;
319
f88fe2de
SG
320 /*
321 * It should say "okay", so only allow that. Some fdts use "ok" but
322 * this is a bug. Please fix your device tree source file. See here
323 * for discussion:
324 *
325 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
326 */
b5220bc6
SG
327 cell = fdt_getprop(blob, node, "status", NULL);
328 if (cell)
f88fe2de
SG
329 return 0 == strcmp(cell, "okay");
330 return 1;
b5220bc6
SG
331}
332
7cde397b 333enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
b5220bc6
SG
334{
335 enum fdt_compat_id id;
336
337 /* Search our drivers */
338 for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
339 if (0 == fdt_node_check_compatible(blob, node,
340 compat_names[id]))
341 return id;
342 return COMPAT_UNKNOWN;
343}
344
345int fdtdec_next_compatible(const void *blob, int node,
346 enum fdt_compat_id id)
347{
348 return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
349}
350
3ddecfc7
SG
351int fdtdec_next_compatible_subnode(const void *blob, int node,
352 enum fdt_compat_id id, int *depthp)
353{
354 do {
355 node = fdt_next_node(blob, node, depthp);
356 } while (*depthp > 1);
357
358 /* If this is a direct subnode, and compatible, return it */
359 if (*depthp == 1 && 0 == fdt_node_check_compatible(
360 blob, node, compat_names[id]))
361 return node;
362
363 return -FDT_ERR_NOTFOUND;
364}
365
b5220bc6
SG
366int fdtdec_next_alias(const void *blob, const char *name,
367 enum fdt_compat_id id, int *upto)
368{
369#define MAX_STR_LEN 20
370 char str[MAX_STR_LEN + 20];
371 int node, err;
372
373 /* snprintf() is not available */
374 assert(strlen(name) < MAX_STR_LEN);
375 sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
00878476 376 node = fdt_path_offset(blob, str);
b5220bc6
SG
377 if (node < 0)
378 return node;
379 err = fdt_node_check_compatible(blob, node, compat_names[id]);
380 if (err < 0)
381 return err;
f88fe2de
SG
382 if (err)
383 return -FDT_ERR_NOTFOUND;
384 (*upto)++;
385 return node;
b5220bc6
SG
386}
387
a53f4a29
SG
388int fdtdec_find_aliases_for_id(const void *blob, const char *name,
389 enum fdt_compat_id id, int *node_list, int maxcount)
c6782270
SG
390{
391 memset(node_list, '\0', sizeof(*node_list) * maxcount);
392
393 return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
394}
395
396/* TODO: Can we tighten this code up a little? */
397int fdtdec_add_aliases_for_id(const void *blob, const char *name,
398 enum fdt_compat_id id, int *node_list, int maxcount)
a53f4a29
SG
399{
400 int name_len = strlen(name);
401 int nodes[maxcount];
402 int num_found = 0;
403 int offset, node;
404 int alias_node;
405 int count;
406 int i, j;
407
408 /* find the alias node if present */
409 alias_node = fdt_path_offset(blob, "/aliases");
410
411 /*
412 * start with nothing, and we can assume that the root node can't
413 * match
414 */
415 memset(nodes, '\0', sizeof(nodes));
416
417 /* First find all the compatible nodes */
418 for (node = count = 0; node >= 0 && count < maxcount;) {
419 node = fdtdec_next_compatible(blob, node, id);
420 if (node >= 0)
421 nodes[count++] = node;
422 }
423 if (node >= 0)
424 debug("%s: warning: maxcount exceeded with alias '%s'\n",
425 __func__, name);
426
427 /* Now find all the aliases */
a53f4a29
SG
428 for (offset = fdt_first_property_offset(blob, alias_node);
429 offset > 0;
430 offset = fdt_next_property_offset(blob, offset)) {
431 const struct fdt_property *prop;
432 const char *path;
433 int number;
434 int found;
435
436 node = 0;
437 prop = fdt_get_property_by_offset(blob, offset, NULL);
438 path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
439 if (prop->len && 0 == strncmp(path, name, name_len))
440 node = fdt_path_offset(blob, prop->data);
441 if (node <= 0)
442 continue;
443
444 /* Get the alias number */
445 number = simple_strtoul(path + name_len, NULL, 10);
446 if (number < 0 || number >= maxcount) {
447 debug("%s: warning: alias '%s' is out of range\n",
448 __func__, path);
449 continue;
450 }
451
452 /* Make sure the node we found is actually in our list! */
453 found = -1;
454 for (j = 0; j < count; j++)
455 if (nodes[j] == node) {
456 found = j;
457 break;
458 }
459
460 if (found == -1) {
461 debug("%s: warning: alias '%s' points to a node "
462 "'%s' that is missing or is not compatible "
463 " with '%s'\n", __func__, path,
464 fdt_get_name(blob, node, NULL),
465 compat_names[id]);
466 continue;
467 }
468
469 /*
470 * Add this node to our list in the right place, and mark
471 * it as done.
472 */
473 if (fdtdec_get_is_enabled(blob, node)) {
c6782270
SG
474 if (node_list[number]) {
475 debug("%s: warning: alias '%s' requires that "
476 "a node be placed in the list in a "
477 "position which is already filled by "
478 "node '%s'\n", __func__, path,
479 fdt_get_name(blob, node, NULL));
480 continue;
481 }
a53f4a29
SG
482 node_list[number] = node;
483 if (number >= num_found)
484 num_found = number + 1;
485 }
c6782270 486 nodes[found] = 0;
a53f4a29
SG
487 }
488
489 /* Add any nodes not mentioned by an alias */
490 for (i = j = 0; i < maxcount; i++) {
491 if (!node_list[i]) {
492 for (; j < maxcount; j++)
493 if (nodes[j] &&
494 fdtdec_get_is_enabled(blob, nodes[j]))
495 break;
496
497 /* Have we run out of nodes to add? */
498 if (j == maxcount)
499 break;
500
501 assert(!node_list[i]);
502 node_list[i] = nodes[j++];
503 if (i >= num_found)
504 num_found = i + 1;
505 }
506 }
507
508 return num_found;
509}
510
5c33c9fd
SG
511int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
512 int *seqp)
513{
514 int base_len = strlen(base);
515 const char *find_name;
516 int find_namelen;
517 int prop_offset;
518 int aliases;
519
520 find_name = fdt_get_name(blob, offset, &find_namelen);
521 debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
522
523 aliases = fdt_path_offset(blob, "/aliases");
524 for (prop_offset = fdt_first_property_offset(blob, aliases);
525 prop_offset > 0;
526 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
527 const char *prop;
528 const char *name;
529 const char *slash;
c4af6732 530 int len, val;
5c33c9fd
SG
531
532 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
533 debug(" - %s, %s\n", name, prop);
534 if (len < find_namelen || *prop != '/' || prop[len - 1] ||
535 strncmp(name, base, base_len))
536 continue;
537
538 slash = strrchr(prop, '/');
539 if (strcmp(slash + 1, find_name))
540 continue;
c4af6732
SG
541 val = trailing_strtol(name);
542 if (val != -1) {
543 *seqp = val;
544 debug("Found seq %d\n", *seqp);
545 return 0;
5c33c9fd
SG
546 }
547 }
548
549 debug("Not found\n");
550 return -ENOENT;
551}
552
3bc37a50 553const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
aac07d49 554{
aac07d49 555 int chosen_node;
aac07d49
SG
556
557 if (!blob)
3bc37a50 558 return NULL;
aac07d49 559 chosen_node = fdt_path_offset(blob, "/chosen");
3bc37a50
SG
560 return fdt_getprop(blob, chosen_node, name, NULL);
561}
562
563int fdtdec_get_chosen_node(const void *blob, const char *name)
564{
565 const char *prop;
566
567 prop = fdtdec_get_chosen_prop(blob, name);
aac07d49
SG
568 if (!prop)
569 return -FDT_ERR_NOTFOUND;
570 return fdt_path_offset(blob, prop);
571}
572
9a263e55
SG
573int fdtdec_check_fdt(void)
574{
575 /*
576 * We must have an FDT, but we cannot panic() yet since the console
577 * is not ready. So for now, just assert(). Boards which need an early
578 * FDT (prior to console ready) will need to make their own
579 * arrangements and do their own checks.
580 */
581 assert(!fdtdec_prepare_fdt());
582 return 0;
583}
584
b5220bc6
SG
585/*
586 * This function is a little odd in that it accesses global data. At some
587 * point if the architecture board.c files merge this will make more sense.
588 * Even now, it is common code.
589 */
9a263e55 590int fdtdec_prepare_fdt(void)
b5220bc6 591{
c309c2da
SG
592 if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
593 fdt_check_header(gd->fdt_blob)) {
66312374
SG
594#ifdef CONFIG_SPL_BUILD
595 puts("Missing DTB\n");
596#else
597 puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
cb5f97f7
SG
598# ifdef DEBUG
599 if (gd->fdt_blob) {
600 printf("fdt_blob=%p\n", gd->fdt_blob);
601 print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
602 32, 0);
603 }
604# endif
66312374 605#endif
9a263e55
SG
606 return -1;
607 }
b5220bc6
SG
608 return 0;
609}
d17da655
SG
610
611int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
612{
613 const u32 *phandle;
614 int lookup;
615
1cb2323b 616 debug("%s: %s\n", __func__, prop_name);
d17da655
SG
617 phandle = fdt_getprop(blob, node, prop_name, NULL);
618 if (!phandle)
619 return -FDT_ERR_NOTFOUND;
620
621 lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
622 return lookup;
623}
624
625/**
626 * Look up a property in a node and check that it has a minimum length.
627 *
628 * @param blob FDT blob
629 * @param node node to examine
630 * @param prop_name name of property to find
631 * @param min_len minimum property length in bytes
632 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
633 found, or -FDT_ERR_BADLAYOUT if not enough data
634 * @return pointer to cell, which is only valid if err == 0
635 */
636static const void *get_prop_check_min_len(const void *blob, int node,
637 const char *prop_name, int min_len, int *err)
638{
639 const void *cell;
640 int len;
641
642 debug("%s: %s\n", __func__, prop_name);
643 cell = fdt_getprop(blob, node, prop_name, &len);
644 if (!cell)
645 *err = -FDT_ERR_NOTFOUND;
646 else if (len < min_len)
647 *err = -FDT_ERR_BADLAYOUT;
648 else
649 *err = 0;
650 return cell;
651}
652
653int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
654 u32 *array, int count)
655{
656 const u32 *cell;
657 int i, err = 0;
658
659 debug("%s: %s\n", __func__, prop_name);
660 cell = get_prop_check_min_len(blob, node, prop_name,
661 sizeof(u32) * count, &err);
662 if (!err) {
663 for (i = 0; i < count; i++)
664 array[i] = fdt32_to_cpu(cell[i]);
665 }
666 return err;
667}
668
a9f04d49
SG
669int fdtdec_get_int_array_count(const void *blob, int node,
670 const char *prop_name, u32 *array, int count)
671{
672 const u32 *cell;
673 int len, elems;
674 int i;
675
676 debug("%s: %s\n", __func__, prop_name);
677 cell = fdt_getprop(blob, node, prop_name, &len);
678 if (!cell)
679 return -FDT_ERR_NOTFOUND;
680 elems = len / sizeof(u32);
681 if (count > elems)
682 count = elems;
683 for (i = 0; i < count; i++)
684 array[i] = fdt32_to_cpu(cell[i]);
685
686 return count;
687}
688
96875e7d
SG
689const u32 *fdtdec_locate_array(const void *blob, int node,
690 const char *prop_name, int count)
691{
692 const u32 *cell;
693 int err;
694
695 cell = get_prop_check_min_len(blob, node, prop_name,
696 sizeof(u32) * count, &err);
697 return err ? NULL : cell;
698}
699
d17da655
SG
700int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
701{
702 const s32 *cell;
703 int len;
704
705 debug("%s: %s\n", __func__, prop_name);
706 cell = fdt_getprop(blob, node, prop_name, &len);
707 return cell != NULL;
708}
ed3ee5cd 709
57068a7a
SG
710int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
711 const char *list_name,
712 const char *cells_name,
713 int cell_count, int index,
714 struct fdtdec_phandle_args *out_args)
715{
716 const __be32 *list, *list_end;
717 int rc = 0, size, cur_index = 0;
718 uint32_t count = 0;
719 int node = -1;
720 int phandle;
721
722 /* Retrieve the phandle list property */
723 list = fdt_getprop(blob, src_node, list_name, &size);
724 if (!list)
725 return -ENOENT;
726 list_end = list + size / sizeof(*list);
727
728 /* Loop over the phandles until all the requested entry is found */
729 while (list < list_end) {
730 rc = -EINVAL;
731 count = 0;
732
733 /*
734 * If phandle is 0, then it is an empty entry with no
735 * arguments. Skip forward to the next entry.
736 */
737 phandle = be32_to_cpup(list++);
738 if (phandle) {
739 /*
740 * Find the provider node and parse the #*-cells
741 * property to determine the argument length.
742 *
743 * This is not needed if the cell count is hard-coded
744 * (i.e. cells_name not set, but cell_count is set),
745 * except when we're going to return the found node
746 * below.
747 */
748 if (cells_name || cur_index == index) {
749 node = fdt_node_offset_by_phandle(blob,
750 phandle);
751 if (!node) {
752 debug("%s: could not find phandle\n",
753 fdt_get_name(blob, src_node,
754 NULL));
755 goto err;
756 }
757 }
758
759 if (cells_name) {
760 count = fdtdec_get_int(blob, node, cells_name,
761 -1);
762 if (count == -1) {
763 debug("%s: could not get %s for %s\n",
764 fdt_get_name(blob, src_node,
765 NULL),
766 cells_name,
767 fdt_get_name(blob, node,
768 NULL));
769 goto err;
770 }
771 } else {
772 count = cell_count;
773 }
774
775 /*
776 * Make sure that the arguments actually fit in the
777 * remaining property data length
778 */
779 if (list + count > list_end) {
780 debug("%s: arguments longer than property\n",
781 fdt_get_name(blob, src_node, NULL));
782 goto err;
783 }
784 }
785
786 /*
787 * All of the error cases above bail out of the loop, so at
788 * this point, the parsing is successful. If the requested
789 * index matches, then fill the out_args structure and return,
790 * or return -ENOENT for an empty entry.
791 */
792 rc = -ENOENT;
793 if (cur_index == index) {
794 if (!phandle)
795 goto err;
796
797 if (out_args) {
798 int i;
799
800 if (count > MAX_PHANDLE_ARGS) {
801 debug("%s: too many arguments %d\n",
802 fdt_get_name(blob, src_node,
803 NULL), count);
804 count = MAX_PHANDLE_ARGS;
805 }
806 out_args->node = node;
807 out_args->args_count = count;
808 for (i = 0; i < count; i++) {
809 out_args->args[i] =
810 be32_to_cpup(list++);
811 }
812 }
813
814 /* Found it! return success */
815 return 0;
816 }
817
818 node = -1;
819 list += count;
820 cur_index++;
821 }
822
823 /*
824 * Result will be one of:
825 * -ENOENT : index is for empty phandle
826 * -EINVAL : parsing error on data
827 * [1..n] : Number of phandle (count mode; when index = -1)
828 */
829 rc = index < 0 ? cur_index : -ENOENT;
830 err:
831 return rc;
832}
833
1889a7e2
PF
834int fdtdec_get_child_count(const void *blob, int node)
835{
836 int subnode;
837 int num = 0;
838
839 fdt_for_each_subnode(blob, subnode, node)
840 num++;
841
842 return num;
843}
844
bed4d892
AS
845int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
846 u8 *array, int count)
847{
848 const u8 *cell;
849 int err;
850
851 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
852 if (!err)
853 memcpy(array, cell, count);
854 return err;
855}
856
857const u8 *fdtdec_locate_byte_array(const void *blob, int node,
858 const char *prop_name, int count)
859{
860 const u8 *cell;
861 int err;
862
863 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
864 if (err)
865 return NULL;
866 return cell;
867}
09258f1e 868
09258f1e
AK
869int fdtdec_get_config_int(const void *blob, const char *prop_name,
870 int default_val)
871{
872 int config_node;
873
874 debug("%s: %s\n", __func__, prop_name);
875 config_node = fdt_path_offset(blob, "/config");
876 if (config_node < 0)
877 return default_val;
878 return fdtdec_get_int(blob, config_node, prop_name, default_val);
879}
332ab0d5 880
79289c0b
GB
881int fdtdec_get_config_bool(const void *blob, const char *prop_name)
882{
883 int config_node;
884 const void *prop;
885
886 debug("%s: %s\n", __func__, prop_name);
887 config_node = fdt_path_offset(blob, "/config");
888 if (config_node < 0)
889 return 0;
890 prop = fdt_get_property(blob, config_node, prop_name, NULL);
891
892 return prop != NULL;
893}
894
332ab0d5
SG
895char *fdtdec_get_config_string(const void *blob, const char *prop_name)
896{
897 const char *nodep;
898 int nodeoffset;
899 int len;
900
901 debug("%s: %s\n", __func__, prop_name);
902 nodeoffset = fdt_path_offset(blob, "/config");
903 if (nodeoffset < 0)
904 return NULL;
905
906 nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
907 if (!nodep)
908 return NULL;
909
910 return (char *)nodep;
911}
f20c4619 912
76489832
SG
913int fdtdec_decode_region(const void *blob, int node, const char *prop_name,
914 fdt_addr_t *basep, fdt_size_t *sizep)
f20c4619
SG
915{
916 const fdt_addr_t *cell;
917 int len;
918
76489832
SG
919 debug("%s: %s: %s\n", __func__, fdt_get_name(blob, node, NULL),
920 prop_name);
f20c4619 921 cell = fdt_getprop(blob, node, prop_name, &len);
76489832
SG
922 if (!cell || (len < sizeof(fdt_addr_t) * 2)) {
923 debug("cell=%p, len=%d\n", cell, len);
f20c4619 924 return -1;
76489832
SG
925 }
926
927 *basep = fdt_addr_to_cpu(*cell);
928 *sizep = fdt_size_to_cpu(cell[1]);
929 debug("%s: base=%08lx, size=%lx\n", __func__, (ulong)*basep,
930 (ulong)*sizep);
f20c4619 931
f20c4619
SG
932 return 0;
933}
006e73b9
SG
934
935/**
936 * Read a flash entry from the fdt
937 *
938 * @param blob FDT blob
939 * @param node Offset of node to read
940 * @param name Name of node being read
941 * @param entry Place to put offset and size of this node
942 * @return 0 if ok, -ve on error
943 */
944int fdtdec_read_fmap_entry(const void *blob, int node, const char *name,
945 struct fmap_entry *entry)
946{
f3cc44f9 947 const char *prop;
006e73b9
SG
948 u32 reg[2];
949
950 if (fdtdec_get_int_array(blob, node, "reg", reg, 2)) {
951 debug("Node '%s' has bad/missing 'reg' property\n", name);
952 return -FDT_ERR_NOTFOUND;
953 }
954 entry->offset = reg[0];
955 entry->length = reg[1];
f3cc44f9
SG
956 entry->used = fdtdec_get_int(blob, node, "used", entry->length);
957 prop = fdt_getprop(blob, node, "compress", NULL);
958 entry->compress_algo = prop && !strcmp(prop, "lzo") ?
959 FMAP_COMPRESS_LZO : FMAP_COMPRESS_NONE;
960 prop = fdt_getprop(blob, node, "hash", &entry->hash_size);
961 entry->hash_algo = prop ? FMAP_HASH_SHA256 : FMAP_HASH_NONE;
962 entry->hash = (uint8_t *)prop;
006e73b9
SG
963
964 return 0;
965}
56f42242 966
5f7bfdd6 967u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
56f42242
TR
968{
969 u64 number = 0;
970
971 while (cells--)
972 number = (number << 32) | fdt32_to_cpu(*ptr++);
973
974 return number;
975}
976
977int fdt_get_resource(const void *fdt, int node, const char *property,
978 unsigned int index, struct fdt_resource *res)
979{
980 const fdt32_t *ptr, *end;
981 int na, ns, len, parent;
982 unsigned int i = 0;
983
984 parent = fdt_parent_offset(fdt, node);
985 if (parent < 0)
986 return parent;
987
988 na = fdt_address_cells(fdt, parent);
989 ns = fdt_size_cells(fdt, parent);
990
991 ptr = fdt_getprop(fdt, node, property, &len);
992 if (!ptr)
993 return len;
994
995 end = ptr + len / sizeof(*ptr);
996
997 while (ptr + na + ns <= end) {
998 if (i == index) {
999 res->start = res->end = fdtdec_get_number(ptr, na);
1000 res->end += fdtdec_get_number(&ptr[na], ns) - 1;
1001 return 0;
1002 }
1003
1004 ptr += na + ns;
1005 i++;
1006 }
1007
1008 return -FDT_ERR_NOTFOUND;
1009}
1010
1011int fdt_get_named_resource(const void *fdt, int node, const char *property,
1012 const char *prop_names, const char *name,
1013 struct fdt_resource *res)
1014{
1015 int index;
1016
b02e4044 1017 index = fdt_stringlist_search(fdt, node, prop_names, name);
56f42242
TR
1018 if (index < 0)
1019 return index;
1020
1021 return fdt_get_resource(fdt, node, property, index, res);
1022}
9f85eee7 1023
26403871
SG
1024int fdtdec_decode_memory_region(const void *blob, int config_node,
1025 const char *mem_type, const char *suffix,
1026 fdt_addr_t *basep, fdt_size_t *sizep)
1027{
1028 char prop_name[50];
1029 const char *mem;
1030 fdt_size_t size, offset_size;
1031 fdt_addr_t base, offset;
1032 int node;
1033
1034 if (config_node == -1) {
1035 config_node = fdt_path_offset(blob, "/config");
1036 if (config_node < 0) {
1037 debug("%s: Cannot find /config node\n", __func__);
1038 return -ENOENT;
1039 }
1040 }
1041 if (!suffix)
1042 suffix = "";
1043
1044 snprintf(prop_name, sizeof(prop_name), "%s-memory%s", mem_type,
1045 suffix);
1046 mem = fdt_getprop(blob, config_node, prop_name, NULL);
1047 if (!mem) {
1048 debug("%s: No memory type for '%s', using /memory\n", __func__,
1049 prop_name);
1050 mem = "/memory";
1051 }
1052
1053 node = fdt_path_offset(blob, mem);
1054 if (node < 0) {
1055 debug("%s: Failed to find node '%s': %s\n", __func__, mem,
1056 fdt_strerror(node));
1057 return -ENOENT;
1058 }
1059
1060 /*
1061 * Not strictly correct - the memory may have multiple banks. We just
1062 * use the first
1063 */
1064 if (fdtdec_decode_region(blob, node, "reg", &base, &size)) {
1065 debug("%s: Failed to decode memory region %s\n", __func__,
1066 mem);
1067 return -EINVAL;
1068 }
1069
1070 snprintf(prop_name, sizeof(prop_name), "%s-offset%s", mem_type,
1071 suffix);
1072 if (fdtdec_decode_region(blob, config_node, prop_name, &offset,
1073 &offset_size)) {
1074 debug("%s: Failed to decode memory region '%s'\n", __func__,
1075 prop_name);
1076 return -EINVAL;
1077 }
1078
1079 *basep = base + offset;
1080 *sizep = offset_size;
1081
1082 return 0;
1083}
b45122fd 1084
12e67114
SG
1085static int decode_timing_property(const void *blob, int node, const char *name,
1086 struct timing_entry *result)
1087{
1088 int length, ret = 0;
1089 const u32 *prop;
1090
1091 prop = fdt_getprop(blob, node, name, &length);
1092 if (!prop) {
1093 debug("%s: could not find property %s\n",
1094 fdt_get_name(blob, node, NULL), name);
1095 return length;
1096 }
1097
1098 if (length == sizeof(u32)) {
1099 result->typ = fdtdec_get_int(blob, node, name, 0);
1100 result->min = result->typ;
1101 result->max = result->typ;
1102 } else {
1103 ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
1104 }
1105
1106 return ret;
1107}
1108
1109int fdtdec_decode_display_timing(const void *blob, int parent, int index,
1110 struct display_timing *dt)
1111{
1112 int i, node, timings_node;
1113 u32 val = 0;
1114 int ret = 0;
1115
1116 timings_node = fdt_subnode_offset(blob, parent, "display-timings");
1117 if (timings_node < 0)
1118 return timings_node;
1119
1120 for (i = 0, node = fdt_first_subnode(blob, timings_node);
1121 node > 0 && i != index;
1122 node = fdt_next_subnode(blob, node))
1123 i++;
1124
1125 if (node < 0)
1126 return node;
1127
1128 memset(dt, 0, sizeof(*dt));
1129
1130 ret |= decode_timing_property(blob, node, "hback-porch",
1131 &dt->hback_porch);
1132 ret |= decode_timing_property(blob, node, "hfront-porch",
1133 &dt->hfront_porch);
1134 ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
1135 ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
1136 ret |= decode_timing_property(blob, node, "vback-porch",
1137 &dt->vback_porch);
1138 ret |= decode_timing_property(blob, node, "vfront-porch",
1139 &dt->vfront_porch);
1140 ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
1141 ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
1142 ret |= decode_timing_property(blob, node, "clock-frequency",
1143 &dt->pixelclock);
1144
1145 dt->flags = 0;
1146 val = fdtdec_get_int(blob, node, "vsync-active", -1);
1147 if (val != -1) {
1148 dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
1149 DISPLAY_FLAGS_VSYNC_LOW;
1150 }
1151 val = fdtdec_get_int(blob, node, "hsync-active", -1);
1152 if (val != -1) {
1153 dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
1154 DISPLAY_FLAGS_HSYNC_LOW;
1155 }
1156 val = fdtdec_get_int(blob, node, "de-active", -1);
1157 if (val != -1) {
1158 dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
1159 DISPLAY_FLAGS_DE_LOW;
1160 }
1161 val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
1162 if (val != -1) {
1163 dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
1164 DISPLAY_FLAGS_PIXDATA_NEGEDGE;
1165 }
1166
1167 if (fdtdec_get_bool(blob, node, "interlaced"))
1168 dt->flags |= DISPLAY_FLAGS_INTERLACED;
1169 if (fdtdec_get_bool(blob, node, "doublescan"))
1170 dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
1171 if (fdtdec_get_bool(blob, node, "doubleclk"))
1172 dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
1173
04b9dd10 1174 return ret;
12e67114
SG
1175}
1176
0879361f 1177int fdtdec_setup(void)
b45122fd 1178{
0f925822 1179#if CONFIG_IS_ENABLED(OF_CONTROL)
b45122fd
SG
1180# ifdef CONFIG_OF_EMBED
1181 /* Get a pointer to the FDT */
1182 gd->fdt_blob = __dtb_dt_begin;
1183# elif defined CONFIG_OF_SEPARATE
1184# ifdef CONFIG_SPL_BUILD
10172962
SG
1185 /* FDT is at end of BSS unless it is in a different memory region */
1186 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
1187 gd->fdt_blob = (ulong *)&_image_binary_end;
1188 else
1189 gd->fdt_blob = (ulong *)&__bss_end;
b45122fd
SG
1190# else
1191 /* FDT is at end of image */
1192 gd->fdt_blob = (ulong *)&_end;
3bd926cc 1193# endif
b45122fd
SG
1194# elif defined(CONFIG_OF_HOSTFILE)
1195 if (sandbox_read_fdt_from_file()) {
1196 puts("Failed to read control FDT\n");
1197 return -1;
1198 }
1199# endif
1200# ifndef CONFIG_SPL_BUILD
1201 /* Allow the early environment to override the fdt address */
1202 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
1203 (uintptr_t)gd->fdt_blob);
1204# endif
29a23f9d 1205#endif
0879361f 1206 return fdtdec_prepare_fdt();
b45122fd
SG
1207}
1208
1209#endif /* !USE_HOSTCC */