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* Patches by Xianghua Xiao, 15 Oct 2003:
[people/ms/u-boot.git] / lib_ppc / board.c
CommitLineData
fe8c2806
WD		 1/*
2 * (C) Copyright 2000-2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <watchdog.h>
26#include <command.h>
27#include <malloc.h>
28#include <devices.h>
fe8c2806
WD		 29#ifdef CONFIG_8xx
30#include <mpc8xx.h>
31#endif
0db5bca8
WD		 32#ifdef CONFIG_5xx
33#include <mpc5xx.h>
34#endif
945af8d7
WD		 35#ifdef CONFIG_MPC5XXX
36#include <mpc5xxx.h>
37#endif
fe8c2806
WD		 38#if (CONFIG_COMMANDS & CFG_CMD_IDE)
39#include <ide.h>
40#endif
41#if (CONFIG_COMMANDS & CFG_CMD_SCSI)
42#include <scsi.h>
43#endif
44#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
45#include <kgdb.h>
46#endif
47#ifdef CONFIG_STATUS_LED
48#include <status_led.h>
49#endif
50#include <net.h>
fe8c2806 51#ifdef CFG_ALLOC_DPRAM
42d1f039 52#if !(defined(CONFIG_8260)||defined(CONFIG_MPC8560))
fe8c2806
WD		 53#include <commproc.h>
54#endif
7aa78614 55#endif
fe8c2806
WD		 56#include <version.h>
57#if defined(CONFIG_BAB7xx)
58#include <w83c553f.h>
59#endif
60#include <dtt.h>
61#if defined(CONFIG_POST)
62#include <post.h>
63#endif
56f94be3
WD		 64#if defined(CONFIG_LOGBUFFER)
65#include <logbuff.h>
66#endif
42d1f039
WD		 67#if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500)
68#include <asm/cache.h>
69#endif
fe8c2806
WD		 70
71#if (CONFIG_COMMANDS & CFG_CMD_DOC)
72void doc_init (void);
73#endif
74#if defined(CONFIG_HARD_I2C) || \
75 defined(CONFIG_SOFT_I2C)
76#include <i2c.h>
77#endif
bedc4970
SR		 78#if (CONFIG_COMMANDS & CFG_CMD_NAND)
79void nand_init (void);
80#endif
fe8c2806
WD		 81
82static char *failed = "*** failed ***\n";
83
84#if defined(CONFIG_PCU_E) || defined(CONFIG_OXC)
85extern flash_info_t flash_info[];
86#endif
87
88#include <environment.h>
89
90#if ( ((CFG_ENV_ADDR+CFG_ENV_SIZE) < CFG_MONITOR_BASE) || \
91 (CFG_ENV_ADDR >= (CFG_MONITOR_BASE + CFG_MONITOR_LEN)) ) || \
92 defined(CFG_ENV_IS_IN_NVRAM)
93#define TOTAL_MALLOC_LEN (CFG_MALLOC_LEN + CFG_ENV_SIZE)
94#else
95#define TOTAL_MALLOC_LEN CFG_MALLOC_LEN
96#endif
97
3b57fe0a
WD		 98extern ulong __init_end;
99extern ulong _end;
3b57fe0a
WD		 100ulong monitor_flash_len;
101
8bde7f77
WD		 102#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
103#include <bedbug/type.h>
104#endif
105
fe8c2806
WD		 106/*
107 * Begin and End of memory area for malloc(), and current "brk"
108 */
109static ulong mem_malloc_start = 0;
110static ulong mem_malloc_end = 0;
111static ulong mem_malloc_brk = 0;
112
113/************************************************************************
114 * Utilities *
115 ************************************************************************
116 */
117
118/*
119 * The Malloc area is immediately below the monitor copy in DRAM
120 */
121static void mem_malloc_init (void)
122{
123 DECLARE_GLOBAL_DATA_PTR;
124
125 ulong dest_addr = CFG_MONITOR_BASE + gd->reloc_off;
126
127 mem_malloc_end = dest_addr;
128 mem_malloc_start = dest_addr - TOTAL_MALLOC_LEN;
129 mem_malloc_brk = mem_malloc_start;
130
131 memset ((void *) mem_malloc_start,
132 0,
133 mem_malloc_end - mem_malloc_start);
134}
135
136void *sbrk (ptrdiff_t increment)
137{
138 ulong old = mem_malloc_brk;
139 ulong new = old + increment;
140
141 if ((new < mem_malloc_start) || (new > mem_malloc_end)) {
142 return (NULL);
143 }
144 mem_malloc_brk = new;
145 return ((void *) old);
146}
147
148char *strmhz (char *buf, long hz)
149{
150 long l, n;
151 long m;
152
153 n = hz / 1000000L;
154 l = sprintf (buf, "%ld", n);
155 m = (hz % 1000000L) / 1000L;
156 if (m != 0)
157 sprintf (buf + l, ".%03ld", m);
158 return (buf);
159}
160
fe8c2806
WD		 161/*
162 * All attempts to come up with a "common" initialization sequence
163 * that works for all boards and architectures failed: some of the
164 * requirements are just _too_ different. To get rid of the resulting
165 * mess of board dependend #ifdef'ed code we now make the whole
166 * initialization sequence configurable to the user.
167 *
168 * The requirements for any new initalization function is simple: it
169 * receives a pointer to the "global data" structure as it's only
170 * argument, and returns an integer return code, where 0 means
171 * "continue" and != 0 means "fatal error, hang the system".
172 */
173typedef int (init_fnc_t) (void);
174
175/************************************************************************
176 * Init Utilities *
177 ************************************************************************
178 * Some of this code should be moved into the core functions,
179 * but let's get it working (again) first...
180 */
181
182static int init_baudrate (void)
183{
184 DECLARE_GLOBAL_DATA_PTR;
185
186 uchar tmp[64]; /* long enough for environment variables */
187 int i = getenv_r ("baudrate", tmp, sizeof (tmp));
188
189 gd->baudrate = (i > 0)
190 ? (int) simple_strtoul (tmp, NULL, 10)
191 : CONFIG_BAUDRATE;
fe8c2806
WD		 192 return (0);
193}
194
195/***********************************************************************/
196
197static int init_func_ram (void)
198{
199 DECLARE_GLOBAL_DATA_PTR;
200
201#ifdef CONFIG_BOARD_TYPES
202 int board_type = gd->board_type;
203#else
204 int board_type = 0; /* use dummy arg */
205#endif
206 puts ("DRAM: ");
207
208 if ((gd->ram_size = initdram (board_type)) > 0) {
209 print_size (gd->ram_size, "\n");
210 return (0);
211 }
212 puts (failed);
213 return (1);
214}
215
216/***********************************************************************/
217
218#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
219static int init_func_i2c (void)
220{
221 puts ("I2C: ");
222 i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
223 puts ("ready\n");
224 return (0);
225}
226#endif
227
228/***********************************************************************/
229
230#if defined(CONFIG_WATCHDOG)
231static int init_func_watchdog_init (void)
232{
233 puts (" Watchdog enabled\n");
234 WATCHDOG_RESET ();
235 return (0);
236}
237# define INIT_FUNC_WATCHDOG_INIT init_func_watchdog_init,
238
239static int init_func_watchdog_reset (void)
240{
241 WATCHDOG_RESET ();
242 return (0);
243}
244# define INIT_FUNC_WATCHDOG_RESET init_func_watchdog_reset,
245#else
246# define INIT_FUNC_WATCHDOG_INIT /* undef */
247# define INIT_FUNC_WATCHDOG_RESET /* undef */
248#endif /* CONFIG_WATCHDOG */
249
250/************************************************************************
251 * Initialization sequence *
252 ************************************************************************
253 */
254
255init_fnc_t *init_sequence[] = {
256
257#if defined(CONFIG_BOARD_PRE_INIT)
258 board_pre_init, /* very early board init code (fpga boot, etc.) */
259#endif
260
261 get_clocks, /* get CPU and bus clocks (etc.) */
262 init_timebase,
263#ifdef CFG_ALLOC_DPRAM
42d1f039 264#if !(defined(CONFIG_8260) || defined(CONFIG_MPC8560))
fe8c2806
WD		 265 dpram_init,
266#endif
7aa78614 267#endif
fe8c2806
WD		 268#if defined(CONFIG_BOARD_POSTCLK_INIT)
269 board_postclk_init,
270#endif
271 env_init,
272 init_baudrate,
273 serial_init,
274 console_init_f,
275 display_options,
276#if defined(CONFIG_8260)
277 prt_8260_rsr,
278 prt_8260_clks,
279#endif /* CONFIG_8260 */
280 checkcpu,
945af8d7
WD		 281#if defined(CONFIG_MPC5XXX)
282 prt_mpc5xxx_clks,
283#endif /* CONFIG_MPC5XXX */
fe8c2806
WD		 284 checkboard,
285 INIT_FUNC_WATCHDOG_INIT
286#if defined(CONFIG_BMW) || \
287 defined(CONFIG_COGENT) || \
288 defined(CONFIG_HYMOD) || \
289 defined(CONFIG_RSD_PROTO) || \
290 defined(CONFIG_W7O)
291 misc_init_f,
292#endif
293 INIT_FUNC_WATCHDOG_RESET
294#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
295 init_func_i2c,
296#endif
297#if defined(CONFIG_DTT) /* Digital Thermometers and Thermostats */
298 dtt_init,
4532cb69
WD		 299#endif
300#ifdef CONFIG_POST
301 post_init_f,
fe8c2806
WD		 302#endif
303 INIT_FUNC_WATCHDOG_RESET
304 init_func_ram,
305#if defined(CFG_DRAM_TEST)
306 testdram,
307#endif /* CFG_DRAM_TEST */
308 INIT_FUNC_WATCHDOG_RESET
309
310 NULL, /* Terminate this list */
311};
312
313/************************************************************************
314 *
315 * This is the first part of the initialization sequence that is
316 * implemented in C, but still running from ROM.
317 *
318 * The main purpose is to provide a (serial) console interface as
319 * soon as possible (so we can see any error messages), and to
320 * initialize the RAM so that we can relocate the monitor code to
321 * RAM.
322 *
323 * Be aware of the restrictions: global data is read-only, BSS is not
324 * initialized, and stack space is limited to a few kB.
325 *
326 ************************************************************************
327 */
328
329void board_init_f (ulong bootflag)
330{
331 DECLARE_GLOBAL_DATA_PTR;
332
333 bd_t *bd;
334 ulong len, addr, addr_sp;
335 gd_t *id;
336 init_fnc_t **init_fnc_ptr;
337#ifdef CONFIG_PRAM
338 int i;
339 ulong reg;
340 uchar tmp[64]; /* long enough for environment variables */
341#endif
342
343 /* Pointer is writable since we allocated a register for it */
344 gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
345
42d1f039 346#if !(defined(CONFIG_8260) || defined(CONFIG_MPC8560))
fe8c2806
WD		 347 /* Clear initial global data */
348 memset ((void *) gd, 0, sizeof (gd_t));
349#endif
350
351 for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
352 if ((*init_fnc_ptr) () != 0) {
353 hang ();
354 }
355 }
356
357 /*
358 * Now that we have DRAM mapped and working, we can
359 * relocate the code and continue running from DRAM.
360 *
361 * Reserve memory at end of RAM for (top down in that order):
8bde7f77 362 * - kernel log buffer
fe8c2806
WD		 363 * - protected RAM
364 * - LCD framebuffer
365 * - monitor code
366 * - board info struct
367 */
3b57fe0a 368 len = (ulong)&_end - CFG_MONITOR_BASE;
fe8c2806
WD		 369
370#ifndef CONFIG_VERY_BIG_RAM
371 addr = CFG_SDRAM_BASE + gd->ram_size;
372#else
373 /* only allow stack below 256M */
374 addr = CFG_SDRAM_BASE +
375 (gd->ram_size > 256 << 20) ? 256 << 20 : gd->ram_size;
376#endif
377
228f29ac
WD		 378#ifdef CONFIG_LOGBUFFER
379 /* reserve kernel log buffer */
380 addr -= (LOGBUFF_RESERVE);
9d2b18a0 381 debug ("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, addr);
228f29ac
WD		 382#endif
383
fe8c2806
WD		 384#ifdef CONFIG_PRAM
385 /*
386 * reserve protected RAM
387 */
388 i = getenv_r ("pram", tmp, sizeof (tmp));
389 reg = (i > 0) ? simple_strtoul (tmp, NULL, 10) : CONFIG_PRAM;
390 addr -= (reg << 10); /* size is in kB */
9d2b18a0 391 debug ("Reserving %ldk for protected RAM at %08lx\n", reg, addr);
fe8c2806
WD		 392#endif /* CONFIG_PRAM */
393
394 /* round down to next 4 kB limit */
395 addr &= ~(4096 - 1);
9d2b18a0 396 debug ("Top of RAM usable for U-Boot at: %08lx\n", addr);
fe8c2806
WD		 397
398#ifdef CONFIG_LCD
399 /* reserve memory for LCD display (always full pages) */
400 addr = lcd_setmem (addr);
401 gd->fb_base = addr;
402#endif /* CONFIG_LCD */
403
404#if defined(CONFIG_VIDEO) && defined(CONFIG_8xx)
405 /* reserve memory for video display (always full pages) */
406 addr = video_setmem (addr);
407 gd->fb_base = addr;
408#endif /* CONFIG_VIDEO */
409
410 /*
411 * reserve memory for U-Boot code, data & bss
682011ff 412 * round down to next 4 kB limit
fe8c2806
WD		 413 */
414 addr -= len;
682011ff 415 addr &= ~(4096 - 1);
fe8c2806 416
9d2b18a0 417 debug ("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr);
fe8c2806 418
c7de829c
WD		 419#ifdef CONFIG_AMIGAONEG3SE
420 gd->relocaddr = addr;
421#endif
422
fe8c2806
WD		 423 /*
424 * reserve memory for malloc() arena
425 */
426 addr_sp = addr - TOTAL_MALLOC_LEN;
9d2b18a0 427 debug ("Reserving %dk for malloc() at: %08lx\n",
fe8c2806 428 TOTAL_MALLOC_LEN >> 10, addr_sp);
fe8c2806
WD		 429
430 /*
431 * (permanently) allocate a Board Info struct
432 * and a permanent copy of the "global" data
433 */
434 addr_sp -= sizeof (bd_t);
435 bd = (bd_t *) addr_sp;
436 gd->bd = bd;
9d2b18a0 437 debug ("Reserving %d Bytes for Board Info at: %08lx\n",
fe8c2806 438 sizeof (bd_t), addr_sp);
fe8c2806
WD		 439 addr_sp -= sizeof (gd_t);
440 id = (gd_t *) addr_sp;
9d2b18a0 441 debug ("Reserving %d Bytes for Global Data at: %08lx\n",
fe8c2806 442 sizeof (gd_t), addr_sp);
fe8c2806
WD		 443
444 /*
445 * Finally, we set up a new (bigger) stack.
446 *
447 * Leave some safety gap for SP, force alignment on 16 byte boundary
448 * Clear initial stack frame
449 */
450 addr_sp -= 16;
451 addr_sp &= ~0xF;
452 *((ulong *) addr_sp)-- = 0;
453 *((ulong *) addr_sp)-- = 0;
9d2b18a0 454 debug ("Stack Pointer at: %08lx\n", addr_sp);
fe8c2806
WD		 455
456 /*
457 * Save local variables to board info struct
458 */
459
460 bd->bi_memstart = CFG_SDRAM_BASE; /* start of DRAM memory */
461 bd->bi_memsize = gd->ram_size; /* size of DRAM memory in bytes */
462
463#ifdef CONFIG_IP860
464 bd->bi_sramstart = SRAM_BASE; /* start of SRAM memory */
465 bd->bi_sramsize = SRAM_SIZE; /* size of SRAM memory */
466#else
467 bd->bi_sramstart = 0; /* FIXME */ /* start of SRAM memory */
468 bd->bi_sramsize = 0; /* FIXME */ /* size of SRAM memory */
469#endif
470
42d1f039
WD		 471#if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
472 defined(CONFIG_E500)
fe8c2806
WD		 473 bd->bi_immr_base = CFG_IMMR; /* base of IMMR register */
474#endif
945af8d7
WD		 475#if defined(CONFIG_MPC5XXX)
476 bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */
477#endif
fe8c2806
WD		 478
479 bd->bi_bootflags = bootflag; /* boot / reboot flag (for LynxOS) */
480
481 WATCHDOG_RESET ();
482 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
483 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
42d1f039 484#if defined(CONFIG_8260) || defined(CONFIG_MPC8560)
fe8c2806
WD		 485 bd->bi_cpmfreq = gd->cpm_clk;
486 bd->bi_brgfreq = gd->brg_clk;
487 bd->bi_sccfreq = gd->scc_clk;
488 bd->bi_vco = gd->vco_out;
489#endif /* CONFIG_8260 */
945af8d7
WD		 490#if defined(CONFIG_MPC5XXX)
491 bd->bi_ipbfreq = gd->ipb_clk;
492 bd->bi_pcifreq = gd->pci_clk;
493#endif /* CONFIG_MPC5XXX */
fe8c2806
WD		 494 bd->bi_baudrate = gd->baudrate; /* Console Baudrate */
495
496#ifdef CFG_EXTBDINFO
497 strncpy (bd->bi_s_version, "1.2", sizeof (bd->bi_s_version));
498 strncpy (bd->bi_r_version, U_BOOT_VERSION, sizeof (bd->bi_r_version));
499
500 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
501 bd->bi_plb_busfreq = gd->bus_clk;
bedc4970 502#if defined(CONFIG_405GP) || defined(CONFIG_405EP)
fe8c2806
WD		 503 bd->bi_pci_busfreq = get_PCI_freq ();
504#endif
505#endif
506
9d2b18a0 507 debug ("New Stack Pointer is: %08lx\n", addr_sp);
fe8c2806
WD		 508
509 WATCHDOG_RESET ();
510
511#ifdef CONFIG_POST
512 post_bootmode_init();
6dff5529 513 post_run (NULL, POST_ROM | post_bootmode_get(0));
fe8c2806
WD		 514#endif
515
516 WATCHDOG_RESET();
517
27b207fd 518 memcpy (id, (void *)gd, sizeof (gd_t));
fe8c2806
WD		 519
520 relocate_code (addr_sp, id, addr);
521
522 /* NOTREACHED - relocate_code() does not return */
523}
524
525
526/************************************************************************
527 *
528 * This is the next part if the initialization sequence: we are now
529 * running from RAM and have a "normal" C environment, i. e. global
530 * data can be written, BSS has been cleared, the stack size in not
531 * that critical any more, etc.
532 *
533 ************************************************************************
534 */
535
536void board_init_r (gd_t *id, ulong dest_addr)
537{
538 DECLARE_GLOBAL_DATA_PTR;
fe8c2806
WD		 539 cmd_tbl_t *cmdtp;
540 char *s, *e;
541 bd_t *bd;
542 int i;
543 extern void malloc_bin_reloc (void);
544#ifndef CFG_ENV_IS_NOWHERE
545 extern char * env_name_spec;
546#endif
547
548#ifndef CFG_NO_FLASH
549 ulong flash_size;
550#endif
551
552 gd = id; /* initialize RAM version of global data */
553 bd = gd->bd;
554
555 gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
556
9d2b18a0 557 debug ("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
fe8c2806
WD		 558
559 WATCHDOG_RESET ();
560
561 gd->reloc_off = dest_addr - CFG_MONITOR_BASE;
8bde7f77 562
3b57fe0a 563 monitor_flash_len = (ulong)&__init_end - dest_addr;
fe8c2806
WD		 564
565 /*
566 * We have to relocate the command table manually
567 */
8bde7f77 568 for (cmdtp = &__u_boot_cmd_start; cmdtp != &__u_boot_cmd_end; cmdtp++) {
fe8c2806 569 ulong addr;
fe8c2806
WD		 570 addr = (ulong) (cmdtp->cmd) + gd->reloc_off;
571#if 0
572 printf ("Command \"%s\": 0x%08lx => 0x%08lx\n",
573 cmdtp->name, (ulong) (cmdtp->cmd), addr);
574#endif
575 cmdtp->cmd =
576 (int (*)(struct cmd_tbl_s *, int, int, char *[]))addr;
577
578 addr = (ulong)(cmdtp->name) + gd->reloc_off;
579 cmdtp->name = (char *)addr;
580
581 if (cmdtp->usage) {
582 addr = (ulong)(cmdtp->usage) + gd->reloc_off;
583 cmdtp->usage = (char *)addr;
584 }
585#ifdef CFG_LONGHELP
586 if (cmdtp->help) {
587 addr = (ulong)(cmdtp->help) + gd->reloc_off;
588 cmdtp->help = (char *)addr;
589 }
590#endif
591 }
592 /* there are some other pointer constants we must deal with */
593#ifndef CFG_ENV_IS_NOWHERE
594 env_name_spec += gd->reloc_off;
595#endif
596
597 WATCHDOG_RESET ();
598
56f94be3 599#ifdef CONFIG_LOGBUFFER
228f29ac 600 logbuff_init_ptrs ();
56f94be3 601#endif
fe8c2806 602#ifdef CONFIG_POST
228f29ac 603 post_output_backlog ();
fe8c2806
WD		 604 post_reloc ();
605#endif
606
607 WATCHDOG_RESET();
608
609#if defined(CONFIG_IP860) || defined(CONFIG_PCU_E) || defined (CONFIG_FLAGADM)
610 icache_enable (); /* it's time to enable the instruction cache */
611#endif
612
42d1f039
WD		 613#if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500)
614 unlock_ram_in_cache(); /* it's time to unlock D-cache in e500 */
615#endif
616
3bac3513 617#if defined(CONFIG_BAB7xx) || defined(CONFIG_CPC45)
fe8c2806 618 /*
3bac3513
WD		 619 * Do PCI configuration on BAB7xx and CPC45 _before_ the flash
620 * gets initialised, because we need the ISA resp. PCI_to_LOCAL bus
621 * bridge there.
fe8c2806
WD		 622 */
623 pci_init ();
3bac3513
WD		 624#endif
625#if defined(CONFIG_BAB7xx)
fe8c2806
WD		 626 /*
627 * Initialise the ISA bridge
628 */
629 initialise_w83c553f ();
630#endif
631
632 asm ("sync ; isync");
633
634 /*
635 * Setup trap handlers
636 */
637 trap_init (dest_addr);
638
639#if !defined(CFG_NO_FLASH)
640 puts ("FLASH: ");
641
642 if ((flash_size = flash_init ()) > 0) {
0cb61d7d 643# ifdef CFG_FLASH_CHECKSUM
fe8c2806
WD		 644 print_size (flash_size, "");
645 /*
646 * Compute and print flash CRC if flashchecksum is set to 'y'
647 *
648 * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
649 */
650 s = getenv ("flashchecksum");
651 if (s && (*s == 'y')) {
652 printf (" CRC: %08lX",
653 crc32 (0,
654 (const unsigned char *) CFG_FLASH_BASE,
655 flash_size)
656 );
657 }
658 putc ('\n');
0cb61d7d 659# else /* !CFG_FLASH_CHECKSUM */
fe8c2806 660 print_size (flash_size, "\n");
0cb61d7d 661# endif /* CFG_FLASH_CHECKSUM */
fe8c2806
WD		 662 } else {
663 puts (failed);
664 hang ();
665 }
666
667 bd->bi_flashstart = CFG_FLASH_BASE; /* update start of FLASH memory */
668 bd->bi_flashsize = flash_size; /* size of FLASH memory (final value) */
0cb61d7d 669# if defined(CONFIG_PCU_E) || defined(CONFIG_OXC)
fe8c2806 670 bd->bi_flashoffset = 0;
0cb61d7d 671# elif CFG_MONITOR_BASE == CFG_FLASH_BASE
3b57fe0a 672 bd->bi_flashoffset = monitor_flash_len; /* reserved area for startup monitor */
0cb61d7d 673# else
fe8c2806 674 bd->bi_flashoffset = 0;
0cb61d7d
WD		 675# endif
676#else /* CFG_NO_FLASH */
fe8c2806
WD		 677
678 bd->bi_flashsize = 0;
679 bd->bi_flashstart = 0;
680 bd->bi_flashoffset = 0;
681#endif /* !CFG_NO_FLASH */
682
683 WATCHDOG_RESET ();
684
685 /* initialize higher level parts of CPU like time base and timers */
686 cpu_init_r ();
687
688 WATCHDOG_RESET ();
689
690 /* initialize malloc() area */
691 mem_malloc_init ();
692 malloc_bin_reloc ();
693
694#ifdef CONFIG_SPI
695# if !defined(CFG_ENV_IS_IN_EEPROM)
696 spi_init_f ();
697# endif
698 spi_init_r ();
699#endif
700
701 /* relocate environment function pointers etc. */
702 env_relocate ();
703
704 /*
705 * Fill in missing fields of bd_info.
8bde7f77
WD		 706 * We do this here, where we have "normal" access to the
707 * environment; we used to do this still running from ROM,
708 * where had to use getenv_r(), which can be pretty slow when
709 * the environment is in EEPROM.
fe8c2806
WD		 710 */
711 s = getenv ("ethaddr");
712#if defined (CONFIG_MBX) || defined (CONFIG_RPXCLASSIC) || defined(CONFIG_IAD210)
713 if (s == NULL)
714 board_get_enetaddr (bd->bi_enetaddr);
715 else
716#endif
717 for (i = 0; i < 6; ++i) {
718 bd->bi_enetaddr[i] = s ? simple_strtoul (s, &e, 16) : 0;
719 if (s)
720 s = (*e) ? e + 1 : e;
721 }
722#ifdef CONFIG_HERMES
723 if ((gd->board_type >> 16) == 2)
724 bd->bi_ethspeed = gd->board_type & 0xFFFF;
725 else
726 bd->bi_ethspeed = 0xFFFF;
727#endif
728
729#ifdef CONFIG_NX823
730 load_sernum_ethaddr ();
731#endif
732
42d1f039
WD		 733#if defined(CFG_GT_6426x) || defined(CONFIG_PN62) || defined(CONFIG_PPCHAMELEONEVB) || \
734 defined(CONFIG_MPC8540ADS) || defined(CONFIG_MPC8560ADS)
fe8c2806
WD		 735 /* handle the 2nd ethernet address */
736
737 s = getenv ("eth1addr");
738
739 for (i = 0; i < 6; ++i) {
740 bd->bi_enet1addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
741 if (s)
742 s = (*e) ? e + 1 : e;
743 }
744#endif
42d1f039 745#if defined(CFG_GT_6426x) || defined(CONFIG_MPC8540ADS) || defined(CONFIG_MPC8560ADS)
fe8c2806
WD		 746 /* handle the 3rd ethernet address */
747
748 s = getenv ("eth2addr");
749
750 for (i = 0; i < 6; ++i) {
751 bd->bi_enet2addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
752 if (s)
753 s = (*e) ? e + 1 : e;
754 }
755#endif
756
757
758#if defined(CONFIG_TQM8xxL) || defined(CONFIG_TQM8260) || \
759 defined(CONFIG_CCM)
760 load_sernum_ethaddr ();
761#endif
762 /* IP Address */
763 bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
764
765 WATCHDOG_RESET ();
766
767#if defined(CONFIG_PCI) && !defined(CONFIG_BAB7xx)
768 /*
769 * Do pci configuration
770 */
771 pci_init ();
772#endif
773
774/** leave this here (after malloc(), environment and PCI are working) **/
775 /* Initialize devices */
776 devices_init ();
777
27b207fd
WD		 778 /* Initialize the jump table for applications */
779 jumptable_init ();
fe8c2806
WD		 780
781 /* Initialize the console (after the relocation and devices init) */
782 console_init_r ();
fe8c2806
WD		 783
784#if defined(CONFIG_CCM) || \
785 defined(CONFIG_COGENT) || \
786 defined(CONFIG_CPCI405) || \
787 defined(CONFIG_EVB64260) || \
56f94be3 788 defined(CONFIG_KUP4K) || \
fe8c2806
WD		 789 defined(CONFIG_LWMON) || \
790 defined(CONFIG_PCU_E) || \
791 defined(CONFIG_W7O) || \
792 defined(CONFIG_MISC_INIT_R)
793 /* miscellaneous platform dependent initialisations */
794 misc_init_r ();
795#endif
796
797#ifdef CONFIG_HERMES
798 if (bd->bi_ethspeed != 0xFFFF)
799 hermes_start_lxt980 ((int) bd->bi_ethspeed);
800#endif
801
802#if (CONFIG_COMMANDS & CFG_CMD_NET) && ( \
803 defined(CONFIG_CCM) || \
3bac3513 804 defined(CONFIG_ELPT860) || \
fe8c2806
WD		 805 defined(CONFIG_EP8260) || \
806 defined(CONFIG_IP860) || \
807 defined(CONFIG_IVML24) || \
808 defined(CONFIG_IVMS8) || \
809 defined(CONFIG_LWMON) || \
810 defined(CONFIG_MPC8260ADS) || \
5d232d0e 811 defined(CONFIG_MPC8266ADS) || \
42d1f039 812 defined(CONFIG_MPC8560ADS) || \
fe8c2806
WD		 813 defined(CONFIG_PCU_E) || \
814 defined(CONFIG_RPXSUPER) || \
815 defined(CONFIG_SPD823TS) )
816
817 WATCHDOG_RESET ();
9d2b18a0 818 debug ("Reset Ethernet PHY\n");
fe8c2806
WD		 819 reset_phy ();
820#endif
821
822#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
823 WATCHDOG_RESET ();
824 puts ("KGDB: ");
825 kgdb_init ();
826#endif
827
9d2b18a0 828 debug ("U-Boot relocated to %08lx\n", dest_addr);
fe8c2806
WD		 829
830 /*
831 * Enable Interrupts
832 */
833 interrupt_init ();
834
835 /* Must happen after interrupts are initialized since
836 * an irq handler gets installed
837 */
838#ifdef CONFIG_SERIAL_SOFTWARE_FIFO
839 serial_buffered_init();
840#endif
841
842#ifdef CONFIG_STATUS_LED
843 status_led_set (STATUS_LED_BOOT, STATUS_LED_BLINKING);
844#endif
845
846 udelay (20);
847
848 set_timer (0);
849
850 /* Insert function pointers now that we have relocated the code */
851
852 /* Initialize from environment */
853 if ((s = getenv ("loadaddr")) != NULL) {
854 load_addr = simple_strtoul (s, NULL, 16);
855 }
856#if (CONFIG_COMMANDS & CFG_CMD_NET)
857 if ((s = getenv ("bootfile")) != NULL) {
858 copy_filename (BootFile, s, sizeof (BootFile));
859 }
860#endif /* CFG_CMD_NET */
861
862 WATCHDOG_RESET ();
863
864#if (CONFIG_COMMANDS & CFG_CMD_SCSI)
865 WATCHDOG_RESET ();
866 puts ("SCSI: ");
867 scsi_init ();
868#endif
869
870#if (CONFIG_COMMANDS & CFG_CMD_DOC)
871 WATCHDOG_RESET ();
872 puts ("DOC: ");
873 doc_init ();
874#endif
875
bedc4970
SR		 876#if (CONFIG_COMMANDS & CFG_CMD_NAND)
877 WATCHDOG_RESET ();
a43278a4 878 puts ("NAND:");
bedc4970
SR		 879 nand_init(); /* go init the NAND */
880#endif
881
fe8c2806
WD		 882#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI)
883 WATCHDOG_RESET ();
884 puts ("Net: ");
885 eth_initialize (bd);
886#endif
887
888#ifdef CONFIG_POST
6dff5529 889 post_run (NULL, POST_RAM | post_bootmode_get(0));
fe8c2806
WD		 890#endif
891
892#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) && !(CONFIG_COMMANDS & CFG_CMD_IDE)
893 WATCHDOG_RESET ();
894 puts ("PCMCIA:");
895 pcmcia_init ();
896#endif
897
898#if (CONFIG_COMMANDS & CFG_CMD_IDE)
899 WATCHDOG_RESET ();
900# ifdef CONFIG_IDE_8xx_PCCARD
901 puts ("PCMCIA:");
902# else
903 puts ("IDE: ");
904#endif
905 ide_init ();
906#endif /* CFG_CMD_IDE */
907
908#ifdef CONFIG_LAST_STAGE_INIT
909 WATCHDOG_RESET ();
910 /*
911 * Some parts can be only initialized if all others (like
912 * Interrupts) are up and running (i.e. the PC-style ISA
913 * keyboard).
914 */
915 last_stage_init ();
916#endif
917
918#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
919 WATCHDOG_RESET ();
920 bedbug_init ();
921#endif
922
228f29ac 923#if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER)
fe8c2806
WD		 924 /*
925 * Export available size of memory for Linux,
926 * taking into account the protected RAM at top of memory
927 */
928 {
929 ulong pram;
fe8c2806 930 uchar memsz[32];
228f29ac
WD		 931#ifdef CONFIG_PRAM
932 char *s;
fe8c2806
WD		 933
934 if ((s = getenv ("pram")) != NULL) {
935 pram = simple_strtoul (s, NULL, 10);
936 } else {
937 pram = CONFIG_PRAM;
938 }
228f29ac
WD		 939#else
940 pram=0;
941#endif
942#ifdef CONFIG_LOGBUFFER
943 /* Also take the logbuffer into account (pram is in kB) */
944 pram += (LOGBUFF_LEN+LOGBUFF_OVERHEAD)/1024;
945#endif
fe8c2806
WD		 946 sprintf (memsz, "%ldk", (bd->bi_memsize / 1024) - pram);
947 setenv ("mem", memsz);
948 }
949#endif
950
4532cb69
WD		 951#ifdef CONFIG_MODEM_SUPPORT
952 {
953 extern int do_mdm_init;
954 do_mdm_init = gd->do_mdm_init;
955 }
956#endif
957
fe8c2806
WD		 958 /* Initialization complete - start the monitor */
959
960 /* main_loop() can return to retry autoboot, if so just run it again. */
961 for (;;) {
962 WATCHDOG_RESET ();
963 main_loop ();
964 }
965
966 /* NOTREACHED - no way out of command loop except booting */
967}
968
969void hang (void)
970{
971 puts ("### ERROR ### Please RESET the board ###\n");
972 for (;;);
973}
974
4532cb69
WD		 975#ifdef CONFIG_MODEM_SUPPORT
976/* called from main loop (common/main.c) */
977extern void dbg(const char *fmt, ...);
978int mdm_init (void)
979{
980 char env_str[16];
981 char *init_str;
982 int i;
983 extern char console_buffer[];
984 static inline void mdm_readline(char *buf, int bufsiz);
985 extern void enable_putc(void);
986 extern int hwflow_onoff(int);
987
988 enable_putc(); /* enable serial_putc() */
989
990#ifdef CONFIG_HWFLOW
991 init_str = getenv("mdm_flow_control");
992 if (init_str && (strcmp(init_str, "rts/cts") == 0))
993 hwflow_onoff (1);
994 else
995 hwflow_onoff(-1);
996#endif
997
998 for (i = 1;;i++) {
999 sprintf(env_str, "mdm_init%d", i);
1000 if ((init_str = getenv(env_str)) != NULL) {
1001 serial_puts(init_str);
1002 serial_puts("\n");
1003 for(;;) {
1004 mdm_readline(console_buffer, CFG_CBSIZE);
1005 dbg("ini%d: [%s]", i, console_buffer);
1006
1007 if ((strcmp(console_buffer, "OK") == 0) ||
1008 (strcmp(console_buffer, "ERROR") == 0)) {
1009 dbg("ini%d: cmd done", i);
1010 break;
1011 } else /* in case we are originating call ... */
1012 if (strncmp(console_buffer, "CONNECT", 7) == 0) {
1013 dbg("ini%d: connect", i);
1014 return 0;
1015 }
1016 }
1017 } else
1018 break; /* no init string - stop modem init */
1019
1020 udelay(100000);
1021 }
1022
1023 udelay(100000);
1024
1025 /* final stage - wait for connect */
1026 for(;i > 1;) { /* if 'i' > 1 - wait for connection
1027 message from modem */
1028 mdm_readline(console_buffer, CFG_CBSIZE);
1029 dbg("ini_f: [%s]", console_buffer);
1030 if (strncmp(console_buffer, "CONNECT", 7) == 0) {
1031 dbg("ini_f: connected");
1032 return 0;
1033 }
1034 }
1035
1036 return 0;
1037}
1038
1039/* 'inline' - We have to do it fast */
1040static inline void mdm_readline(char *buf, int bufsiz)
1041{
1042 char c;
1043 char *p;
1044 int n;
1045
1046 n = 0;
1047 p = buf;
1048 for(;;) {
1049 c = serial_getc();
1050
1051 /* dbg("(%c)", c); */
1052
1053 switch(c) {
1054 case '\r':
1055 break;
1056 case '\n':
1057 *p = '\0';
1058 return;
1059
1060 default:
1061 if(n++ > bufsiz) {
1062 *p = '\0';
1063 return; /* sanity check */
1064 }
1065 *p = c;
1066 p++;
1067 break;
1068 }
1069 }
1070}
1071#endif
1072
fe8c2806
WD		 1073#if 0 /* We could use plain global data, but the resulting code is bigger */
1074/*
1075 * Pointer to initial global data area
1076 *
1077 * Here we initialize it.
1078 */
1079#undef XTRN_DECLARE_GLOBAL_DATA_PTR
1080#define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
1081DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
1082#endif /* 0 */
1083
1084/************************************************************************/
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