]> git.ipfire.org Git - people/ms/u-boot.git/blame - lib_ppc/board.c
* Patch by Eran Liberty
[people/ms/u-boot.git] / lib_ppc / board.c
CommitLineData
fe8c2806 1/*
d4ca31c4 2 * (C) Copyright 2000-2004
fe8c2806
WD
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <watchdog.h>
26#include <command.h>
27#include <malloc.h>
28#include <devices.h>
fe8c2806
WD
29#ifdef CONFIG_8xx
30#include <mpc8xx.h>
31#endif
0db5bca8
WD
32#ifdef CONFIG_5xx
33#include <mpc5xx.h>
34#endif
cbd8a35c 35#ifdef CONFIG_MPC5xxx
945af8d7
WD
36#include <mpc5xxx.h>
37#endif
fe8c2806
WD
38#if (CONFIG_COMMANDS & CFG_CMD_IDE)
39#include <ide.h>
40#endif
41#if (CONFIG_COMMANDS & CFG_CMD_SCSI)
42#include <scsi.h>
43#endif
44#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
45#include <kgdb.h>
46#endif
47#ifdef CONFIG_STATUS_LED
48#include <status_led.h>
49#endif
50#include <net.h>
281e00a3 51#include <serial.h>
fe8c2806 52#ifdef CFG_ALLOC_DPRAM
9c4c5ae3 53#if !defined(CONFIG_CPM2)
fe8c2806
WD
54#include <commproc.h>
55#endif
7aa78614 56#endif
fe8c2806
WD
57#include <version.h>
58#if defined(CONFIG_BAB7xx)
59#include <w83c553f.h>
60#endif
61#include <dtt.h>
62#if defined(CONFIG_POST)
63#include <post.h>
64#endif
56f94be3
WD
65#if defined(CONFIG_LOGBUFFER)
66#include <logbuff.h>
67#endif
42d1f039
WD
68#if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500)
69#include <asm/cache.h>
70#endif
1c43771b
WD
71#ifdef CONFIG_PS2KBD
72#include <keyboard.h>
73#endif
fe8c2806
WD
74
75#if (CONFIG_COMMANDS & CFG_CMD_DOC)
76void doc_init (void);
77#endif
78#if defined(CONFIG_HARD_I2C) || \
79 defined(CONFIG_SOFT_I2C)
80#include <i2c.h>
81#endif
bedc4970
SR
82#if (CONFIG_COMMANDS & CFG_CMD_NAND)
83void nand_init (void);
84#endif
fe8c2806
WD
85
86static char *failed = "*** failed ***\n";
87
17d704eb 88#if defined(CONFIG_OXC) || defined(CONFIG_PCU_E) || defined(CONFIG_RMU)
fe8c2806 89extern flash_info_t flash_info[];
17d704eb 90#endif
fe8c2806
WD
91
92#include <environment.h>
93
7e780369
WD
94#if defined(CFG_ENV_IS_EMBEDDED)
95#define TOTAL_MALLOC_LEN CFG_MALLOC_LEN
96#elif ( ((CFG_ENV_ADDR+CFG_ENV_SIZE) < CFG_MONITOR_BASE) || \
04a85b3b 97 (CFG_ENV_ADDR >= (CFG_MONITOR_BASE + CFG_MONITOR_LEN)) ) || \
7e780369 98 defined(CFG_ENV_IS_IN_NVRAM)
fe8c2806
WD
99#define TOTAL_MALLOC_LEN (CFG_MALLOC_LEN + CFG_ENV_SIZE)
100#else
101#define TOTAL_MALLOC_LEN CFG_MALLOC_LEN
102#endif
103
3b57fe0a
WD
104extern ulong __init_end;
105extern ulong _end;
3b57fe0a
WD
106ulong monitor_flash_len;
107
8bde7f77
WD
108#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
109#include <bedbug/type.h>
110#endif
111
fe8c2806
WD
112/*
113 * Begin and End of memory area for malloc(), and current "brk"
114 */
115static ulong mem_malloc_start = 0;
116static ulong mem_malloc_end = 0;
117static ulong mem_malloc_brk = 0;
118
119/************************************************************************
120 * Utilities *
121 ************************************************************************
122 */
123
124/*
125 * The Malloc area is immediately below the monitor copy in DRAM
126 */
127static void mem_malloc_init (void)
128{
129 DECLARE_GLOBAL_DATA_PTR;
130
131 ulong dest_addr = CFG_MONITOR_BASE + gd->reloc_off;
132
133 mem_malloc_end = dest_addr;
134 mem_malloc_start = dest_addr - TOTAL_MALLOC_LEN;
135 mem_malloc_brk = mem_malloc_start;
136
137 memset ((void *) mem_malloc_start,
138 0,
139 mem_malloc_end - mem_malloc_start);
140}
141
142void *sbrk (ptrdiff_t increment)
143{
144 ulong old = mem_malloc_brk;
145 ulong new = old + increment;
146
147 if ((new < mem_malloc_start) || (new > mem_malloc_end)) {
148 return (NULL);
149 }
150 mem_malloc_brk = new;
151 return ((void *) old);
152}
153
154char *strmhz (char *buf, long hz)
155{
156 long l, n;
157 long m;
158
159 n = hz / 1000000L;
160 l = sprintf (buf, "%ld", n);
161 m = (hz % 1000000L) / 1000L;
162 if (m != 0)
163 sprintf (buf + l, ".%03ld", m);
164 return (buf);
165}
166
fe8c2806
WD
167/*
168 * All attempts to come up with a "common" initialization sequence
169 * that works for all boards and architectures failed: some of the
170 * requirements are just _too_ different. To get rid of the resulting
171 * mess of board dependend #ifdef'ed code we now make the whole
172 * initialization sequence configurable to the user.
173 *
174 * The requirements for any new initalization function is simple: it
175 * receives a pointer to the "global data" structure as it's only
176 * argument, and returns an integer return code, where 0 means
177 * "continue" and != 0 means "fatal error, hang the system".
178 */
179typedef int (init_fnc_t) (void);
180
181/************************************************************************
182 * Init Utilities *
183 ************************************************************************
184 * Some of this code should be moved into the core functions,
185 * but let's get it working (again) first...
186 */
187
188static int init_baudrate (void)
189{
190 DECLARE_GLOBAL_DATA_PTR;
191
192 uchar tmp[64]; /* long enough for environment variables */
193 int i = getenv_r ("baudrate", tmp, sizeof (tmp));
194
195 gd->baudrate = (i > 0)
196 ? (int) simple_strtoul (tmp, NULL, 10)
197 : CONFIG_BAUDRATE;
fe8c2806
WD
198 return (0);
199}
200
201/***********************************************************************/
202
203static int init_func_ram (void)
204{
205 DECLARE_GLOBAL_DATA_PTR;
206
207#ifdef CONFIG_BOARD_TYPES
208 int board_type = gd->board_type;
209#else
210 int board_type = 0; /* use dummy arg */
211#endif
212 puts ("DRAM: ");
213
214 if ((gd->ram_size = initdram (board_type)) > 0) {
215 print_size (gd->ram_size, "\n");
216 return (0);
217 }
218 puts (failed);
219 return (1);
220}
221
222/***********************************************************************/
223
224#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
225static int init_func_i2c (void)
226{
227 puts ("I2C: ");
228 i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
229 puts ("ready\n");
230 return (0);
231}
232#endif
233
234/***********************************************************************/
235
236#if defined(CONFIG_WATCHDOG)
237static int init_func_watchdog_init (void)
238{
239 puts (" Watchdog enabled\n");
240 WATCHDOG_RESET ();
241 return (0);
242}
243# define INIT_FUNC_WATCHDOG_INIT init_func_watchdog_init,
244
245static int init_func_watchdog_reset (void)
246{
247 WATCHDOG_RESET ();
248 return (0);
249}
250# define INIT_FUNC_WATCHDOG_RESET init_func_watchdog_reset,
251#else
252# define INIT_FUNC_WATCHDOG_INIT /* undef */
253# define INIT_FUNC_WATCHDOG_RESET /* undef */
254#endif /* CONFIG_WATCHDOG */
255
256/************************************************************************
257 * Initialization sequence *
258 ************************************************************************
259 */
260
261init_fnc_t *init_sequence[] = {
262
c837dcb1
WD
263#if defined(CONFIG_BOARD_EARLY_INIT_F)
264 board_early_init_f,
fe8c2806 265#endif
c178d3da 266
66ca92a5 267#if !defined(CONFIG_8xx_CPUCLK_DEFAULT)
fe8c2806 268 get_clocks, /* get CPU and bus clocks (etc.) */
e9132ea9
WD
269#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M)
270 adjust_sdram_tbs_8xx,
271#endif
fe8c2806 272 init_timebase,
c178d3da 273#endif
fe8c2806 274#ifdef CFG_ALLOC_DPRAM
9c4c5ae3 275#if !defined(CONFIG_CPM2)
fe8c2806
WD
276 dpram_init,
277#endif
7aa78614 278#endif
fe8c2806
WD
279#if defined(CONFIG_BOARD_POSTCLK_INIT)
280 board_postclk_init,
281#endif
282 env_init,
66ca92a5 283#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
c178d3da
WD
284 get_clocks_866, /* get CPU and bus clocks according to the environment variable */
285 sdram_adjust_866, /* adjust sdram refresh rate according to the new clock */
286 init_timebase,
287#endif
fe8c2806
WD
288 init_baudrate,
289 serial_init,
290 console_init_f,
291 display_options,
292#if defined(CONFIG_8260)
293 prt_8260_rsr,
294 prt_8260_clks,
295#endif /* CONFIG_8260 */
f046ccd1
EL
296
297#if defined(CONFIG_MPC83XX)
298 print_clock_conf,
299#endif
300
fe8c2806 301 checkcpu,
cbd8a35c 302#if defined(CONFIG_MPC5xxx)
945af8d7 303 prt_mpc5xxx_clks,
cbd8a35c 304#endif /* CONFIG_MPC5xxx */
983fda83
WD
305#if defined(CONFIG_MPC8220)
306 prt_mpc8220_clks,
307#endif
fe8c2806
WD
308 checkboard,
309 INIT_FUNC_WATCHDOG_INIT
c837dcb1 310#if defined(CONFIG_MISC_INIT_F)
fe8c2806
WD
311 misc_init_f,
312#endif
313 INIT_FUNC_WATCHDOG_RESET
314#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
315 init_func_i2c,
316#endif
317#if defined(CONFIG_DTT) /* Digital Thermometers and Thermostats */
318 dtt_init,
4532cb69
WD
319#endif
320#ifdef CONFIG_POST
321 post_init_f,
fe8c2806
WD
322#endif
323 INIT_FUNC_WATCHDOG_RESET
324 init_func_ram,
325#if defined(CFG_DRAM_TEST)
326 testdram,
327#endif /* CFG_DRAM_TEST */
328 INIT_FUNC_WATCHDOG_RESET
329
330 NULL, /* Terminate this list */
331};
332
333/************************************************************************
334 *
335 * This is the first part of the initialization sequence that is
336 * implemented in C, but still running from ROM.
337 *
338 * The main purpose is to provide a (serial) console interface as
339 * soon as possible (so we can see any error messages), and to
340 * initialize the RAM so that we can relocate the monitor code to
341 * RAM.
342 *
343 * Be aware of the restrictions: global data is read-only, BSS is not
344 * initialized, and stack space is limited to a few kB.
345 *
346 ************************************************************************
347 */
348
349void board_init_f (ulong bootflag)
350{
351 DECLARE_GLOBAL_DATA_PTR;
352
353 bd_t *bd;
354 ulong len, addr, addr_sp;
355 gd_t *id;
356 init_fnc_t **init_fnc_ptr;
357#ifdef CONFIG_PRAM
358 int i;
359 ulong reg;
360 uchar tmp[64]; /* long enough for environment variables */
361#endif
362
363 /* Pointer is writable since we allocated a register for it */
364 gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
93f6a677
WD
365 /* compiler optimization barrier needed for GCC >= 3.4 */
366 __asm__ __volatile__("": : :"memory");
fe8c2806 367
9c4c5ae3 368#if !defined(CONFIG_CPM2)
fe8c2806
WD
369 /* Clear initial global data */
370 memset ((void *) gd, 0, sizeof (gd_t));
371#endif
372
373 for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
374 if ((*init_fnc_ptr) () != 0) {
375 hang ();
376 }
377 }
378
379 /*
380 * Now that we have DRAM mapped and working, we can
381 * relocate the code and continue running from DRAM.
382 *
383 * Reserve memory at end of RAM for (top down in that order):
8bde7f77 384 * - kernel log buffer
fe8c2806
WD
385 * - protected RAM
386 * - LCD framebuffer
387 * - monitor code
388 * - board info struct
389 */
3b57fe0a 390 len = (ulong)&_end - CFG_MONITOR_BASE;
fe8c2806
WD
391
392#ifndef CONFIG_VERY_BIG_RAM
393 addr = CFG_SDRAM_BASE + gd->ram_size;
394#else
395 /* only allow stack below 256M */
396 addr = CFG_SDRAM_BASE +
397 (gd->ram_size > 256 << 20) ? 256 << 20 : gd->ram_size;
398#endif
399
228f29ac
WD
400#ifdef CONFIG_LOGBUFFER
401 /* reserve kernel log buffer */
402 addr -= (LOGBUFF_RESERVE);
9d2b18a0 403 debug ("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, addr);
228f29ac
WD
404#endif
405
fe8c2806
WD
406#ifdef CONFIG_PRAM
407 /*
408 * reserve protected RAM
409 */
410 i = getenv_r ("pram", tmp, sizeof (tmp));
411 reg = (i > 0) ? simple_strtoul (tmp, NULL, 10) : CONFIG_PRAM;
412 addr -= (reg << 10); /* size is in kB */
9d2b18a0 413 debug ("Reserving %ldk for protected RAM at %08lx\n", reg, addr);
fe8c2806
WD
414#endif /* CONFIG_PRAM */
415
416 /* round down to next 4 kB limit */
417 addr &= ~(4096 - 1);
9d2b18a0 418 debug ("Top of RAM usable for U-Boot at: %08lx\n", addr);
fe8c2806
WD
419
420#ifdef CONFIG_LCD
421 /* reserve memory for LCD display (always full pages) */
422 addr = lcd_setmem (addr);
423 gd->fb_base = addr;
424#endif /* CONFIG_LCD */
425
426#if defined(CONFIG_VIDEO) && defined(CONFIG_8xx)
427 /* reserve memory for video display (always full pages) */
428 addr = video_setmem (addr);
429 gd->fb_base = addr;
430#endif /* CONFIG_VIDEO */
431
432 /*
433 * reserve memory for U-Boot code, data & bss
682011ff 434 * round down to next 4 kB limit
fe8c2806
WD
435 */
436 addr -= len;
682011ff 437 addr &= ~(4096 - 1);
fe8c2806 438
9d2b18a0 439 debug ("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr);
fe8c2806 440
c7de829c
WD
441#ifdef CONFIG_AMIGAONEG3SE
442 gd->relocaddr = addr;
443#endif
444
fe8c2806
WD
445 /*
446 * reserve memory for malloc() arena
447 */
448 addr_sp = addr - TOTAL_MALLOC_LEN;
9d2b18a0 449 debug ("Reserving %dk for malloc() at: %08lx\n",
fe8c2806 450 TOTAL_MALLOC_LEN >> 10, addr_sp);
fe8c2806
WD
451
452 /*
453 * (permanently) allocate a Board Info struct
454 * and a permanent copy of the "global" data
455 */
456 addr_sp -= sizeof (bd_t);
457 bd = (bd_t *) addr_sp;
458 gd->bd = bd;
9d2b18a0 459 debug ("Reserving %d Bytes for Board Info at: %08lx\n",
fe8c2806 460 sizeof (bd_t), addr_sp);
fe8c2806
WD
461 addr_sp -= sizeof (gd_t);
462 id = (gd_t *) addr_sp;
9d2b18a0 463 debug ("Reserving %d Bytes for Global Data at: %08lx\n",
fe8c2806 464 sizeof (gd_t), addr_sp);
fe8c2806
WD
465
466 /*
467 * Finally, we set up a new (bigger) stack.
468 *
469 * Leave some safety gap for SP, force alignment on 16 byte boundary
470 * Clear initial stack frame
471 */
472 addr_sp -= 16;
473 addr_sp &= ~0xF;
474 *((ulong *) addr_sp)-- = 0;
475 *((ulong *) addr_sp)-- = 0;
9d2b18a0 476 debug ("Stack Pointer at: %08lx\n", addr_sp);
fe8c2806
WD
477
478 /*
479 * Save local variables to board info struct
480 */
481
c837dcb1 482 bd->bi_memstart = CFG_SDRAM_BASE; /* start of DRAM memory */
fe8c2806
WD
483 bd->bi_memsize = gd->ram_size; /* size of DRAM memory in bytes */
484
485#ifdef CONFIG_IP860
c837dcb1
WD
486 bd->bi_sramstart = SRAM_BASE; /* start of SRAM memory */
487 bd->bi_sramsize = SRAM_SIZE; /* size of SRAM memory */
983fda83
WD
488#elif defined CONFIG_MPC8220
489 bd->bi_sramstart = CFG_SRAM_BASE; /* start of SRAM memory */
490 bd->bi_sramsize = CFG_SRAM_SIZE; /* size of SRAM memory */
fe8c2806 491#else
c837dcb1
WD
492 bd->bi_sramstart = 0; /* FIXME */ /* start of SRAM memory */
493 bd->bi_sramsize = 0; /* FIXME */ /* size of SRAM memory */
fe8c2806
WD
494#endif
495
42d1f039
WD
496#if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
497 defined(CONFIG_E500)
fe8c2806
WD
498 bd->bi_immr_base = CFG_IMMR; /* base of IMMR register */
499#endif
cbd8a35c 500#if defined(CONFIG_MPC5xxx)
945af8d7
WD
501 bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */
502#endif
f046ccd1
EL
503#if defined(CONFIG_MPC83XX)
504 bd->bi_immrbar = CFG_IMMRBAR;
505#endif
983fda83
WD
506#if defined(CONFIG_MPC8220)
507 bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */
508 bd->bi_inpfreq = gd->inp_clk;
509 bd->bi_pcifreq = gd->pci_clk;
510 bd->bi_vcofreq = gd->vco_clk;
511 bd->bi_pevfreq = gd->pev_clk;
512 bd->bi_flbfreq = gd->flb_clk;
513
514 /* store bootparam to sram (backward compatible), here? */
515 {
9d5028c2
WD
516 u32 *sram = (u32 *)CFG_SRAM_BASE;
517 *sram++ = gd->ram_size;
518 *sram++ = gd->bus_clk;
519 *sram++ = gd->inp_clk;
520 *sram++ = gd->cpu_clk;
521 *sram++ = gd->vco_clk;
522 *sram++ = gd->flb_clk;
523 *sram++ = 0xb8c3ba11; /* boot signature */
983fda83
WD
524 }
525#endif
fe8c2806
WD
526
527 bd->bi_bootflags = bootflag; /* boot / reboot flag (for LynxOS) */
528
529 WATCHDOG_RESET ();
530 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
531 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
9c4c5ae3 532#if defined(CONFIG_CPM2)
fe8c2806
WD
533 bd->bi_cpmfreq = gd->cpm_clk;
534 bd->bi_brgfreq = gd->brg_clk;
535 bd->bi_sccfreq = gd->scc_clk;
536 bd->bi_vco = gd->vco_out;
9c4c5ae3 537#endif /* CONFIG_CPM2 */
cbd8a35c 538#if defined(CONFIG_MPC5xxx)
945af8d7
WD
539 bd->bi_ipbfreq = gd->ipb_clk;
540 bd->bi_pcifreq = gd->pci_clk;
cbd8a35c 541#endif /* CONFIG_MPC5xxx */
fe8c2806
WD
542 bd->bi_baudrate = gd->baudrate; /* Console Baudrate */
543
544#ifdef CFG_EXTBDINFO
545 strncpy (bd->bi_s_version, "1.2", sizeof (bd->bi_s_version));
546 strncpy (bd->bi_r_version, U_BOOT_VERSION, sizeof (bd->bi_r_version));
547
548 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
549 bd->bi_plb_busfreq = gd->bus_clk;
bedc4970 550#if defined(CONFIG_405GP) || defined(CONFIG_405EP)
fe8c2806 551 bd->bi_pci_busfreq = get_PCI_freq ();
109c0e3a 552 bd->bi_opbfreq = get_OPB_freq ();
028ab6b5
WD
553#elif defined(CONFIG_XILINX_ML300)
554 bd->bi_pci_busfreq = get_PCI_freq ();
fe8c2806
WD
555#endif
556#endif
557
9d2b18a0 558 debug ("New Stack Pointer is: %08lx\n", addr_sp);
fe8c2806
WD
559
560 WATCHDOG_RESET ();
561
562#ifdef CONFIG_POST
563 post_bootmode_init();
6dff5529 564 post_run (NULL, POST_ROM | post_bootmode_get(0));
fe8c2806
WD
565#endif
566
567 WATCHDOG_RESET();
568
27b207fd 569 memcpy (id, (void *)gd, sizeof (gd_t));
fe8c2806
WD
570
571 relocate_code (addr_sp, id, addr);
572
573 /* NOTREACHED - relocate_code() does not return */
574}
575
576
577/************************************************************************
578 *
579 * This is the next part if the initialization sequence: we are now
580 * running from RAM and have a "normal" C environment, i. e. global
581 * data can be written, BSS has been cleared, the stack size in not
582 * that critical any more, etc.
583 *
584 ************************************************************************
585 */
586
587void board_init_r (gd_t *id, ulong dest_addr)
588{
589 DECLARE_GLOBAL_DATA_PTR;
fe8c2806
WD
590 cmd_tbl_t *cmdtp;
591 char *s, *e;
592 bd_t *bd;
593 int i;
594 extern void malloc_bin_reloc (void);
595#ifndef CFG_ENV_IS_NOWHERE
596 extern char * env_name_spec;
597#endif
598
599#ifndef CFG_NO_FLASH
600 ulong flash_size;
601#endif
602
603 gd = id; /* initialize RAM version of global data */
604 bd = gd->bd;
605
606 gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
607
9d2b18a0 608 debug ("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
fe8c2806
WD
609
610 WATCHDOG_RESET ();
611
c837dcb1
WD
612#if defined(CONFIG_BOARD_EARLY_INIT_R)
613 board_early_init_r ();
614#endif
615
fe8c2806 616 gd->reloc_off = dest_addr - CFG_MONITOR_BASE;
8bde7f77 617
3b57fe0a 618 monitor_flash_len = (ulong)&__init_end - dest_addr;
fe8c2806 619
281e00a3
WD
620#ifdef CONFIG_SERIAL_MULTI
621 serial_initialize();
622#endif
623
fe8c2806
WD
624 /*
625 * We have to relocate the command table manually
626 */
8bde7f77 627 for (cmdtp = &__u_boot_cmd_start; cmdtp != &__u_boot_cmd_end; cmdtp++) {
fe8c2806 628 ulong addr;
fe8c2806
WD
629 addr = (ulong) (cmdtp->cmd) + gd->reloc_off;
630#if 0
631 printf ("Command \"%s\": 0x%08lx => 0x%08lx\n",
632 cmdtp->name, (ulong) (cmdtp->cmd), addr);
633#endif
634 cmdtp->cmd =
635 (int (*)(struct cmd_tbl_s *, int, int, char *[]))addr;
636
637 addr = (ulong)(cmdtp->name) + gd->reloc_off;
638 cmdtp->name = (char *)addr;
639
640 if (cmdtp->usage) {
641 addr = (ulong)(cmdtp->usage) + gd->reloc_off;
642 cmdtp->usage = (char *)addr;
643 }
644#ifdef CFG_LONGHELP
645 if (cmdtp->help) {
646 addr = (ulong)(cmdtp->help) + gd->reloc_off;
647 cmdtp->help = (char *)addr;
648 }
649#endif
650 }
651 /* there are some other pointer constants we must deal with */
652#ifndef CFG_ENV_IS_NOWHERE
653 env_name_spec += gd->reloc_off;
654#endif
655
656 WATCHDOG_RESET ();
657
56f94be3 658#ifdef CONFIG_LOGBUFFER
228f29ac 659 logbuff_init_ptrs ();
56f94be3 660#endif
fe8c2806 661#ifdef CONFIG_POST
228f29ac 662 post_output_backlog ();
fe8c2806
WD
663 post_reloc ();
664#endif
665
666 WATCHDOG_RESET();
667
668#if defined(CONFIG_IP860) || defined(CONFIG_PCU_E) || defined (CONFIG_FLAGADM)
669 icache_enable (); /* it's time to enable the instruction cache */
670#endif
671
42d1f039 672#if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500)
c837dcb1 673 unlock_ram_in_cache(); /* it's time to unlock D-cache in e500 */
42d1f039
WD
674#endif
675
3bac3513 676#if defined(CONFIG_BAB7xx) || defined(CONFIG_CPC45)
fe8c2806 677 /*
3bac3513
WD
678 * Do PCI configuration on BAB7xx and CPC45 _before_ the flash
679 * gets initialised, because we need the ISA resp. PCI_to_LOCAL bus
680 * bridge there.
fe8c2806
WD
681 */
682 pci_init ();
3bac3513
WD
683#endif
684#if defined(CONFIG_BAB7xx)
fe8c2806
WD
685 /*
686 * Initialise the ISA bridge
687 */
688 initialise_w83c553f ();
689#endif
690
691 asm ("sync ; isync");
692
693 /*
694 * Setup trap handlers
695 */
696 trap_init (dest_addr);
697
698#if !defined(CFG_NO_FLASH)
699 puts ("FLASH: ");
700
701 if ((flash_size = flash_init ()) > 0) {
0cb61d7d 702# ifdef CFG_FLASH_CHECKSUM
fe8c2806
WD
703 print_size (flash_size, "");
704 /*
705 * Compute and print flash CRC if flashchecksum is set to 'y'
706 *
707 * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
708 */
709 s = getenv ("flashchecksum");
710 if (s && (*s == 'y')) {
711 printf (" CRC: %08lX",
7e780369
WD
712 crc32 (0, (const unsigned char *) CFG_FLASH_BASE, flash_size)
713 );
fe8c2806
WD
714 }
715 putc ('\n');
0cb61d7d 716# else /* !CFG_FLASH_CHECKSUM */
fe8c2806 717 print_size (flash_size, "\n");
0cb61d7d 718# endif /* CFG_FLASH_CHECKSUM */
fe8c2806
WD
719 } else {
720 puts (failed);
721 hang ();
722 }
723
724 bd->bi_flashstart = CFG_FLASH_BASE; /* update start of FLASH memory */
725 bd->bi_flashsize = flash_size; /* size of FLASH memory (final value) */
7e780369
WD
726# if defined(CONFIG_PCU_E) || defined(CONFIG_OXC) || defined(CONFIG_RMU)
727 /* flash mapped at end of memory map */
728 bd->bi_flashoffset = TEXT_BASE + flash_size;
0cb61d7d 729# elif CFG_MONITOR_BASE == CFG_FLASH_BASE
3b57fe0a 730 bd->bi_flashoffset = monitor_flash_len; /* reserved area for startup monitor */
0cb61d7d 731# else
fe8c2806 732 bd->bi_flashoffset = 0;
0cb61d7d
WD
733# endif
734#else /* CFG_NO_FLASH */
fe8c2806
WD
735
736 bd->bi_flashsize = 0;
737 bd->bi_flashstart = 0;
738 bd->bi_flashoffset = 0;
739#endif /* !CFG_NO_FLASH */
740
741 WATCHDOG_RESET ();
742
743 /* initialize higher level parts of CPU like time base and timers */
744 cpu_init_r ();
745
746 WATCHDOG_RESET ();
747
748 /* initialize malloc() area */
749 mem_malloc_init ();
750 malloc_bin_reloc ();
751
752#ifdef CONFIG_SPI
753# if !defined(CFG_ENV_IS_IN_EEPROM)
754 spi_init_f ();
755# endif
756 spi_init_r ();
757#endif
758
759 /* relocate environment function pointers etc. */
760 env_relocate ();
761
762 /*
763 * Fill in missing fields of bd_info.
8bde7f77
WD
764 * We do this here, where we have "normal" access to the
765 * environment; we used to do this still running from ROM,
766 * where had to use getenv_r(), which can be pretty slow when
767 * the environment is in EEPROM.
fe8c2806 768 */
7abf0c58
WD
769
770#if defined(CFG_EXTBDINFO)
771#if defined(CONFIG_405GP) || defined(CONFIG_405EP)
772#if defined(CONFIG_I2CFAST)
773 /*
774 * set bi_iic_fast for linux taking environment variable
775 * "i2cfast" into account
776 */
777 {
778 char *s = getenv ("i2cfast");
779 if (s && ((*s == 'y') || (*s == 'Y'))) {
780 bd->bi_iic_fast[0] = 1;
781 bd->bi_iic_fast[1] = 1;
782 } else {
783 bd->bi_iic_fast[0] = 0;
784 bd->bi_iic_fast[1] = 0;
785 }
786 }
787#else
788 bd->bi_iic_fast[0] = 0;
789 bd->bi_iic_fast[1] = 0;
790#endif /* CONFIG_I2CFAST */
791#endif /* CONFIG_405GP, CONFIG_405EP */
792#endif /* CFG_EXTBDINFO */
793
fe8c2806
WD
794 s = getenv ("ethaddr");
795#if defined (CONFIG_MBX) || defined (CONFIG_RPXCLASSIC) || defined(CONFIG_IAD210)
796 if (s == NULL)
797 board_get_enetaddr (bd->bi_enetaddr);
798 else
799#endif
800 for (i = 0; i < 6; ++i) {
801 bd->bi_enetaddr[i] = s ? simple_strtoul (s, &e, 16) : 0;
802 if (s)
803 s = (*e) ? e + 1 : e;
804 }
805#ifdef CONFIG_HERMES
806 if ((gd->board_type >> 16) == 2)
807 bd->bi_ethspeed = gd->board_type & 0xFFFF;
808 else
809 bd->bi_ethspeed = 0xFFFF;
810#endif
811
812#ifdef CONFIG_NX823
813 load_sernum_ethaddr ();
814#endif
815
e2ffd59b 816#ifdef CONFIG_HAS_ETH1
fe8c2806
WD
817 /* handle the 2nd ethernet address */
818
819 s = getenv ("eth1addr");
820
821 for (i = 0; i < 6; ++i) {
822 bd->bi_enet1addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
823 if (s)
824 s = (*e) ? e + 1 : e;
825 }
826#endif
e2ffd59b 827#ifdef CONFIG_HAS_ETH2
fe8c2806
WD
828 /* handle the 3rd ethernet address */
829
830 s = getenv ("eth2addr");
ba56f625
WD
831#if defined(CONFIG_XPEDITE1K)
832 if (s == NULL)
833 board_get_enetaddr(bd->bi_enet2addr);
834 else
835#endif
fe8c2806
WD
836 for (i = 0; i < 6; ++i) {
837 bd->bi_enet2addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
838 if (s)
839 s = (*e) ? e + 1 : e;
840 }
841#endif
842
e2ffd59b 843#ifdef CONFIG_HAS_ETH3
ba56f625
WD
844 /* handle 4th ethernet address */
845 s = getenv("eth3addr");
846#if defined(CONFIG_XPEDITE1K)
847 if (s == NULL)
848 board_get_enetaddr(bd->bi_enet3addr);
849 else
850#endif
851 for (i = 0; i < 6; ++i) {
852 bd->bi_enet3addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
853 if (s)
854 s = (*e) ? e + 1 : e;
855 }
856#endif
fe8c2806
WD
857
858#if defined(CONFIG_TQM8xxL) || defined(CONFIG_TQM8260) || \
02b11f8e 859 defined(CONFIG_CCM) || defined(CONFIG_KUP4K) || defined(CONFIG_KUP4X)
fe8c2806
WD
860 load_sernum_ethaddr ();
861#endif
862 /* IP Address */
863 bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
864
865 WATCHDOG_RESET ();
866
979bdbc7 867#if defined(CONFIG_PCI) && !defined(CONFIG_BAB7xx) && !defined(CONFIG_CPC45)
fe8c2806
WD
868 /*
869 * Do pci configuration
870 */
871 pci_init ();
872#endif
873
874/** leave this here (after malloc(), environment and PCI are working) **/
875 /* Initialize devices */
876 devices_init ();
877
27b207fd
WD
878 /* Initialize the jump table for applications */
879 jumptable_init ();
fe8c2806
WD
880
881 /* Initialize the console (after the relocation and devices init) */
882 console_init_r ();
fe8c2806
WD
883
884#if defined(CONFIG_CCM) || \
885 defined(CONFIG_COGENT) || \
886 defined(CONFIG_CPCI405) || \
887 defined(CONFIG_EVB64260) || \
56f94be3 888 defined(CONFIG_KUP4K) || \
0608e04d 889 defined(CONFIG_KUP4X) || \
fe8c2806
WD
890 defined(CONFIG_LWMON) || \
891 defined(CONFIG_PCU_E) || \
892 defined(CONFIG_W7O) || \
893 defined(CONFIG_MISC_INIT_R)
894 /* miscellaneous platform dependent initialisations */
895 misc_init_r ();
896#endif
897
898#ifdef CONFIG_HERMES
899 if (bd->bi_ethspeed != 0xFFFF)
900 hermes_start_lxt980 ((int) bd->bi_ethspeed);
901#endif
902
903#if (CONFIG_COMMANDS & CFG_CMD_NET) && ( \
904 defined(CONFIG_CCM) || \
3bac3513 905 defined(CONFIG_ELPT860) || \
fe8c2806
WD
906 defined(CONFIG_EP8260) || \
907 defined(CONFIG_IP860) || \
908 defined(CONFIG_IVML24) || \
909 defined(CONFIG_IVMS8) || \
fe8c2806 910 defined(CONFIG_MPC8260ADS) || \
5d232d0e 911 defined(CONFIG_MPC8266ADS) || \
42d1f039 912 defined(CONFIG_MPC8560ADS) || \
fe8c2806
WD
913 defined(CONFIG_PCU_E) || \
914 defined(CONFIG_RPXSUPER) || \
7abf0c58 915 defined(CONFIG_STXGP3) || \
ba91e26a
WD
916 defined(CONFIG_SPD823TS) || \
917 defined(CONFIG_RESET_PHY_R) )
fe8c2806
WD
918
919 WATCHDOG_RESET ();
9d2b18a0 920 debug ("Reset Ethernet PHY\n");
fe8c2806
WD
921 reset_phy ();
922#endif
923
924#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
925 WATCHDOG_RESET ();
926 puts ("KGDB: ");
927 kgdb_init ();
928#endif
929
9d2b18a0 930 debug ("U-Boot relocated to %08lx\n", dest_addr);
fe8c2806
WD
931
932 /*
933 * Enable Interrupts
934 */
935 interrupt_init ();
936
937 /* Must happen after interrupts are initialized since
938 * an irq handler gets installed
939 */
42dfe7a1 940#ifdef CONFIG_SERIAL_SOFTWARE_FIFO
fe8c2806
WD
941 serial_buffered_init();
942#endif
943
944#ifdef CONFIG_STATUS_LED
945 status_led_set (STATUS_LED_BOOT, STATUS_LED_BLINKING);
946#endif
947
948 udelay (20);
949
950 set_timer (0);
951
fe8c2806
WD
952 /* Initialize from environment */
953 if ((s = getenv ("loadaddr")) != NULL) {
954 load_addr = simple_strtoul (s, NULL, 16);
955 }
956#if (CONFIG_COMMANDS & CFG_CMD_NET)
957 if ((s = getenv ("bootfile")) != NULL) {
958 copy_filename (BootFile, s, sizeof (BootFile));
959 }
960#endif /* CFG_CMD_NET */
961
962 WATCHDOG_RESET ();
963
964#if (CONFIG_COMMANDS & CFG_CMD_SCSI)
965 WATCHDOG_RESET ();
966 puts ("SCSI: ");
967 scsi_init ();
968#endif
969
970#if (CONFIG_COMMANDS & CFG_CMD_DOC)
971 WATCHDOG_RESET ();
972 puts ("DOC: ");
973 doc_init ();
974#endif
975
bedc4970
SR
976#if (CONFIG_COMMANDS & CFG_CMD_NAND)
977 WATCHDOG_RESET ();
b7eaad81 978 puts ("NAND: ");
bedc4970
SR
979 nand_init(); /* go init the NAND */
980#endif
981
fe8c2806
WD
982#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI)
983 WATCHDOG_RESET ();
984 puts ("Net: ");
985 eth_initialize (bd);
986#endif
987
988#ifdef CONFIG_POST
6dff5529 989 post_run (NULL, POST_RAM | post_bootmode_get(0));
fe8c2806
WD
990#endif
991
992#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) && !(CONFIG_COMMANDS & CFG_CMD_IDE)
993 WATCHDOG_RESET ();
994 puts ("PCMCIA:");
995 pcmcia_init ();
996#endif
997
998#if (CONFIG_COMMANDS & CFG_CMD_IDE)
999 WATCHDOG_RESET ();
1000# ifdef CONFIG_IDE_8xx_PCCARD
1001 puts ("PCMCIA:");
1002# else
1003 puts ("IDE: ");
1004#endif
1005 ide_init ();
1006#endif /* CFG_CMD_IDE */
1007
1008#ifdef CONFIG_LAST_STAGE_INIT
1009 WATCHDOG_RESET ();
1010 /*
1011 * Some parts can be only initialized if all others (like
1012 * Interrupts) are up and running (i.e. the PC-style ISA
1013 * keyboard).
1014 */
1015 last_stage_init ();
1016#endif
1017
1018#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
1019 WATCHDOG_RESET ();
1020 bedbug_init ();
1021#endif
1022
228f29ac 1023#if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER)
fe8c2806
WD
1024 /*
1025 * Export available size of memory for Linux,
1026 * taking into account the protected RAM at top of memory
1027 */
1028 {
1029 ulong pram;
fe8c2806 1030 uchar memsz[32];
228f29ac
WD
1031#ifdef CONFIG_PRAM
1032 char *s;
fe8c2806
WD
1033
1034 if ((s = getenv ("pram")) != NULL) {
1035 pram = simple_strtoul (s, NULL, 10);
1036 } else {
1037 pram = CONFIG_PRAM;
1038 }
228f29ac
WD
1039#else
1040 pram=0;
1041#endif
1042#ifdef CONFIG_LOGBUFFER
1043 /* Also take the logbuffer into account (pram is in kB) */
1044 pram += (LOGBUFF_LEN+LOGBUFF_OVERHEAD)/1024;
1045#endif
fe8c2806
WD
1046 sprintf (memsz, "%ldk", (bd->bi_memsize / 1024) - pram);
1047 setenv ("mem", memsz);
1048 }
1049#endif
1050
1c43771b
WD
1051#ifdef CONFIG_PS2KBD
1052 puts ("PS/2: ");
1053 kbd_init();
1054#endif
1055
4532cb69
WD
1056#ifdef CONFIG_MODEM_SUPPORT
1057 {
1058 extern int do_mdm_init;
1059 do_mdm_init = gd->do_mdm_init;
1060 }
1061#endif
1062
fe8c2806
WD
1063 /* Initialization complete - start the monitor */
1064
1065 /* main_loop() can return to retry autoboot, if so just run it again. */
1066 for (;;) {
1067 WATCHDOG_RESET ();
1068 main_loop ();
1069 }
1070
1071 /* NOTREACHED - no way out of command loop except booting */
1072}
1073
1074void hang (void)
1075{
1076 puts ("### ERROR ### Please RESET the board ###\n");
63e73c9a
WD
1077#ifdef CONFIG_SHOW_BOOT_PROGRESS
1078 show_boot_progress(-30);
1079#endif
fe8c2806
WD
1080 for (;;);
1081}
1082
4532cb69
WD
1083#ifdef CONFIG_MODEM_SUPPORT
1084/* called from main loop (common/main.c) */
1085extern void dbg(const char *fmt, ...);
1086int mdm_init (void)
1087{
1088 char env_str[16];
1089 char *init_str;
1090 int i;
1091 extern char console_buffer[];
1092 static inline void mdm_readline(char *buf, int bufsiz);
1093 extern void enable_putc(void);
1094 extern int hwflow_onoff(int);
1095
1096 enable_putc(); /* enable serial_putc() */
1097
1098#ifdef CONFIG_HWFLOW
1099 init_str = getenv("mdm_flow_control");
1100 if (init_str && (strcmp(init_str, "rts/cts") == 0))
1101 hwflow_onoff (1);
1102 else
1103 hwflow_onoff(-1);
1104#endif
1105
1106 for (i = 1;;i++) {
1107 sprintf(env_str, "mdm_init%d", i);
1108 if ((init_str = getenv(env_str)) != NULL) {
1109 serial_puts(init_str);
1110 serial_puts("\n");
1111 for(;;) {
1112 mdm_readline(console_buffer, CFG_CBSIZE);
1113 dbg("ini%d: [%s]", i, console_buffer);
1114
1115 if ((strcmp(console_buffer, "OK") == 0) ||
1116 (strcmp(console_buffer, "ERROR") == 0)) {
1117 dbg("ini%d: cmd done", i);
1118 break;
1119 } else /* in case we are originating call ... */
1120 if (strncmp(console_buffer, "CONNECT", 7) == 0) {
1121 dbg("ini%d: connect", i);
1122 return 0;
1123 }
1124 }
1125 } else
1126 break; /* no init string - stop modem init */
1127
1128 udelay(100000);
1129 }
1130
1131 udelay(100000);
1132
1133 /* final stage - wait for connect */
1134 for(;i > 1;) { /* if 'i' > 1 - wait for connection
1135 message from modem */
1136 mdm_readline(console_buffer, CFG_CBSIZE);
1137 dbg("ini_f: [%s]", console_buffer);
1138 if (strncmp(console_buffer, "CONNECT", 7) == 0) {
1139 dbg("ini_f: connected");
1140 return 0;
1141 }
1142 }
1143
1144 return 0;
1145}
1146
1147/* 'inline' - We have to do it fast */
1148static inline void mdm_readline(char *buf, int bufsiz)
1149{
1150 char c;
1151 char *p;
1152 int n;
1153
1154 n = 0;
1155 p = buf;
1156 for(;;) {
1157 c = serial_getc();
1158
1159 /* dbg("(%c)", c); */
1160
1161 switch(c) {
1162 case '\r':
1163 break;
1164 case '\n':
1165 *p = '\0';
1166 return;
1167
1168 default:
1169 if(n++ > bufsiz) {
1170 *p = '\0';
1171 return; /* sanity check */
1172 }
1173 *p = c;
1174 p++;
1175 break;
1176 }
1177 }
1178}
1179#endif
1180
fe8c2806
WD
1181#if 0 /* We could use plain global data, but the resulting code is bigger */
1182/*
1183 * Pointer to initial global data area
1184 *
1185 * Here we initialize it.
1186 */
1187#undef XTRN_DECLARE_GLOBAL_DATA_PTR
1188#define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
1189DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
1190#endif /* 0 */
1191
1192/************************************************************************/