projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| ad5bb451 WD |
1 | /* |
| 2 | * (C) Copyright 2002 | |
| 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
| 4 | * | |
| 5 | * See file CREDITS for list of people who contributed to this | |
| 6 | * project. | |
| 7 | * | |
| 8 | * This program is free software; you can redistribute it and/or | |
| 9 | * modify it under the terms of the GNU General Public License as | |
| 10 | * published by the Free Software Foundation; either version 2 of | |
| 11 | * the License, or (at your option) any later version. | |
| 12 | * | |
| 13 | * This program is distributed in the hope that it will be useful, | |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 16 | * GNU General Public License for more details. | |
| 17 | * | |
| 18 | * You should have received a copy of the GNU General Public License | |
| 19 | * along with this program; if not, write to the Free Software | |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
| 21 | * MA 02111-1307 USA | |
| 22 | */ | |
| 23 | ||
| 24 | #include <common.h> | |
| 25 | ||
| 26 | /* Cache test | |
| 27 | * | |
| 28 | * This test verifies the CPU data and instruction cache using | |
| 29 | * several test scenarios. | |
| 30 | */ | |
| 31 | ||
| ad5bb451 WD |
32 | #include <post.h> |
| 33 | #include <watchdog.h> | |
| 34 | ||
| 6d0f6bcf | 35 | #if CONFIG_POST & CONFIG_SYS_POST_CACHE |
| ad5bb451 WD |
36 | |
| 37 | #define CACHE_POST_SIZE 1024 | |
| 38 | ||
| 39 | extern int cache_post_test1 (char *, unsigned int); | |
| 40 | extern int cache_post_test2 (char *, unsigned int); | |
| 41 | extern int cache_post_test3 (char *, unsigned int); | |
| 42 | extern int cache_post_test4 (char *, unsigned int); | |
| 43 | extern int cache_post_test5 (void); | |
| 44 | extern int cache_post_test6 (void); | |
| 45 | ||
| 46 | int cache_post_test (int flags) | |
| 47 | { | |
| 48 | int ints = disable_interrupts (); | |
| 49 | int res = 0; | |
| 50 | static char ta[CACHE_POST_SIZE + 0xf]; | |
| 51 | char *testarea = (char *) (((unsigned long) ta + 0xf) & ~0xf); | |
| 52 | ||
| 53 | WATCHDOG_RESET (); | |
| 54 | if (res == 0) | |
| 55 | res = cache_post_test1 (testarea, CACHE_POST_SIZE); | |
| 56 | WATCHDOG_RESET (); | |
| 57 | if (res == 0) | |
| 58 | res = cache_post_test2 (testarea, CACHE_POST_SIZE); | |
| 59 | WATCHDOG_RESET (); | |
| 60 | if (res == 0) | |
| 61 | res = cache_post_test3 (testarea, CACHE_POST_SIZE); | |
| 62 | WATCHDOG_RESET (); | |
| 63 | if (res == 0) | |
| 64 | res = cache_post_test4 (testarea, CACHE_POST_SIZE); | |
| 65 | WATCHDOG_RESET (); | |
| 66 | if (res == 0) | |
| 67 | res = cache_post_test5 (); | |
| 68 | WATCHDOG_RESET (); | |
| 69 | if (res == 0) | |
| 70 | res = cache_post_test6 (); | |
| 71 | ||
| 72 | WATCHDOG_RESET (); | |
| 73 | if (ints) | |
| 74 | enable_interrupts (); | |
| 75 | return res; | |
| 76 | } | |
| 77 | ||
| 6d0f6bcf | 78 | #endif /* CONFIG_POST & CONFIG_SYS_POST_CACHE */ |