[people/ms/u-boot.git] / post / tests.c

/*
 * (C) Copyright 2002
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <common.h>

#include <post.h>

extern int ocm_post_test (int flags);
extern int cache_post_test (int flags);
extern int watchdog_post_test (int flags);
extern int i2c_post_test (int flags);
extern int rtc_post_test (int flags);
extern int memory_post_test (int flags);
extern int cpu_post_test (int flags);
extern int fpu_post_test (int flags);
extern int uart_post_test (int flags);
extern int ether_post_test (int flags);
extern int spi_post_test (int flags);
extern int usb_post_test (int flags);
extern int spr_post_test (int flags);
extern int sysmon_post_test (int flags);
extern int dsp_post_test (int flags);
extern int codec_post_test (int flags);
extern int ecc_post_test (int flags);
extern int flash_post_test(int flags);

extern int dspic_init_post_test (int flags);
extern int dspic_post_test (int flags);
extern int gdc_post_test (int flags);
extern int fpga_post_test (int flags);
extern int lwmon5_watchdog_post_test(int flags);
extern int sysmon1_post_test(int flags);
extern int coprocessor_post_test(int flags);
extern int led_post_test(int flags);
extern int button_post_test(int flags);
extern int memory_regions_post_test(int flags);

extern int sysmon_init_f (void);

extern void sysmon_reloc (void);


struct post_test post_list[] =
{
#if CONFIG_POST & CONFIG_SYS_POST_OCM
    {
	"OCM test",
	"ocm",
	"This test checks on chip memory (OCM).",
	POST_ROM | POST_ALWAYS | POST_PREREL | POST_CRITICAL | POST_STOP,
	&ocm_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_OCM
    },
#endif
#if CONFIG_POST & CONFIG_SYS_POST_CACHE
    {
	"Cache test",
	"cache",
	"This test verifies the CPU cache operation.",
	POST_RAM | POST_ALWAYS,
	&cache_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_CACHE
    },
#endif
#if CONFIG_POST & CONFIG_SYS_POST_WATCHDOG
#if defined(CONFIG_POST_WATCHDOG)
	CONFIG_POST_WATCHDOG,
#else
    {
	"Watchdog timer test",
	"watchdog",
	"This test checks the watchdog timer.",
	POST_RAM | POST_POWERON | POST_SLOWTEST | POST_MANUAL | POST_REBOOT,
	&watchdog_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_WATCHDOG
    },
#endif
#endif
#if CONFIG_POST & CONFIG_SYS_POST_I2C
    {
	"I2C test",
	"i2c",
	"This test verifies the I2C operation.",
	POST_RAM | POST_ALWAYS,
	&i2c_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_I2C
    },
#endif
#if CONFIG_POST & CONFIG_SYS_POST_RTC
    {
	"RTC test",
	"rtc",
	"This test verifies the RTC operation.",
	POST_RAM | POST_SLOWTEST | POST_MANUAL,
	&rtc_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_RTC
    },
#endif
#if CONFIG_POST & CONFIG_SYS_POST_MEMORY
    {
	"Memory test",
	"memory",
	"This test checks RAM.",
	POST_ROM | POST_POWERON | POST_SLOWTEST | POST_PREREL,
	&memory_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_MEMORY
    },
#endif
#if CONFIG_POST & CONFIG_SYS_POST_CPU
    {
	"CPU test",
	"cpu",
	"This test verifies the arithmetic logic unit of"
	" CPU.",
	POST_RAM | POST_ALWAYS,
	&cpu_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_CPU
    },
#endif
#if CONFIG_POST & CONFIG_SYS_POST_FPU
    {
	"FPU test",
	"fpu",
	"This test verifies the arithmetic logic unit of"
	" FPU.",
	POST_RAM | POST_ALWAYS,
	&fpu_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_FPU
    },
#endif
#if CONFIG_POST & CONFIG_SYS_POST_UART
#if defined(CONFIG_POST_UART)
	CONFIG_POST_UART,
#else
    {
	"UART test",
	"uart",
	"This test verifies the UART operation.",
	POST_RAM | POST_SLOWTEST | POST_MANUAL,
	&uart_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_UART
    },
#endif /* CONFIG_POST_UART */
#endif
#if CONFIG_POST & CONFIG_SYS_POST_ETHER
    {
	"ETHERNET test",
	"ethernet",
	"This test verifies the ETHERNET operation.",
	POST_RAM | POST_ALWAYS,
	&ether_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_ETHER
    },
#endif
#if CONFIG_POST & CONFIG_SYS_POST_USB
    {
	"USB test",
	"usb",
	"This test verifies the USB operation.",
	POST_RAM | POST_ALWAYS,
	&usb_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_USB
    },
#endif
#if CONFIG_POST & CONFIG_SYS_POST_SPR
    {
	"SPR test",
	"spr",
	"This test checks SPR contents.",
	POST_RAM | POST_ALWAYS,
	&spr_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_SPR
    },
#endif
#if CONFIG_POST & CONFIG_SYS_POST_SYSMON
    {
	"SYSMON test",
	"sysmon",
	"This test monitors system hardware.",
	POST_RAM | POST_ALWAYS,
	&sysmon_post_test,
	&sysmon_init_f,
	&sysmon_reloc,
	CONFIG_SYS_POST_SYSMON
    },
#endif
#if CONFIG_POST & CONFIG_SYS_POST_DSP
    {
	"DSP test",
	"dsp",
	"This test checks any connected DSP(s).",
	POST_RAM | POST_ALWAYS,
	&dsp_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_DSP
    },
#endif
#if CONFIG_POST & CONFIG_SYS_POST_CODEC
    {
	"CODEC test",
	"codec",
	"This test checks any connected codec(s).",
	POST_RAM | POST_MANUAL,
	&codec_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_CODEC
    },
#endif
#if CONFIG_POST & CONFIG_SYS_POST_ECC
    {
	"ECC test",
	"ecc",
	"This test checks the ECC facility of memory.",
	POST_ROM | POST_ALWAYS | POST_PREREL,
	&ecc_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_ECC
    },
#endif
#if CONFIG_POST & CONFIG_SYS_POST_BSPEC1
	CONFIG_POST_BSPEC1,
#endif
#if CONFIG_POST & CONFIG_SYS_POST_BSPEC2
	CONFIG_POST_BSPEC2,
#endif
#if CONFIG_POST & CONFIG_SYS_POST_BSPEC3
	CONFIG_POST_BSPEC3,
#endif
#if CONFIG_POST & CONFIG_SYS_POST_BSPEC4
	CONFIG_POST_BSPEC4,
#endif
#if CONFIG_POST & CONFIG_SYS_POST_BSPEC5
	CONFIG_POST_BSPEC5,
#endif
#if CONFIG_POST & CONFIG_SYS_POST_COPROC
    {
	"Coprocessors communication test",
	"coproc_com",
	"This test checks communication with coprocessors.",
	POST_RAM | POST_ALWAYS | POST_CRITICAL,
	&coprocessor_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_COPROC
    },
#endif
#if CONFIG_POST & CONFIG_SYS_POST_FLASH
    {
	"Parallel NOR flash test",
	"flash",
	"This test verifies parallel flash operations.",
	POST_RAM | POST_SLOWTEST | POST_MANUAL,
	&flash_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_FLASH
    },
#endif
#if CONFIG_POST & CONFIG_SYS_POST_MEM_REGIONS
    {
	"Memory regions test",
	"mem_regions",
	"This test checks regularly placed regions of the RAM.",
	POST_ROM | POST_SLOWTEST | POST_PREREL,
	&memory_regions_post_test,
	NULL,
	NULL,
	CONFIG_SYS_POST_MEM_REGIONS
    },
#endif
};

unsigned int post_list_size = ARRAY_SIZE(post_list);
Commit	Line	Data
324f6cfd WD	1	/*
	2	* (C) Copyright 2002
	3	* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
	4	*
1a459660	5	* SPDX-License-Identifier: GPL-2.0+
324f6cfd WD	6	*/
	7
	8	#include <common.h>
	9
324f6cfd WD	10	#include <post.h>
324f6cfd WD	11
6e8ec682	12	extern int ocm_post_test (int flags);
324f6cfd WD	13	extern int cache_post_test (int flags);
	14	extern int watchdog_post_test (int flags);
	15	extern int i2c_post_test (int flags);
	16	extern int rtc_post_test (int flags);
	17	extern int memory_post_test (int flags);
	18	extern int cpu_post_test (int flags);
a11e0696	19	extern int fpu_post_test (int flags);
324f6cfd WD	20	extern int uart_post_test (int flags);
	21	extern int ether_post_test (int flags);
	22	extern int spi_post_test (int flags);
	23	extern int usb_post_test (int flags);
	24	extern int spr_post_test (int flags);
4532cb69	25	extern int sysmon_post_test (int flags);
5a8c51cd	26	extern int dsp_post_test (int flags);
79fa88f3	27	extern int codec_post_test (int flags);
531e3e8b	28	extern int ecc_post_test (int flags);
f6f7395e	29	extern int flash_post_test(int flags);
4532cb69	30
65b20dce YT	31	extern int dspic_init_post_test (int flags);
	32	extern int dspic_post_test (int flags);
	33	extern int gdc_post_test (int flags);
	34	extern int fpga_post_test (int flags);
	35	extern int lwmon5_watchdog_post_test(int flags);
	36	extern int sysmon1_post_test(int flags);
29fd7ceb	37	extern int coprocessor_post_test(int flags);
2151374f MF	38	extern int led_post_test(int flags);
2151374f MF	39	extern int button_post_test(int flags);
8d3fcb5e	40	extern int memory_regions_post_test(int flags);
65b20dce	41
4532cb69 WD	42	extern int sysmon_init_f (void);
	43
	44	extern void sysmon_reloc (void);
	45
324f6cfd WD	46
	47	struct post_test post_list[] =
	48	{
6d0f6bcf	49	#if CONFIG_POST & CONFIG_SYS_POST_OCM
6e8ec682 YT	50	{
	51	"OCM test",
	52	"ocm",
	53	"This test checks on chip memory (OCM).",
7845d490	54	POST_ROM \| POST_ALWAYS \| POST_PREREL \| POST_CRITICAL \| POST_STOP,
6e8ec682 YT	55	&ocm_post_test,
	56	NULL,
	57	NULL,
6d0f6bcf	58	CONFIG_SYS_POST_OCM
6e8ec682 YT	59	},
6e8ec682 YT	60	#endif
6d0f6bcf	61	#if CONFIG_POST & CONFIG_SYS_POST_CACHE
324f6cfd	62	{
8bde7f77 WD	63	"Cache test",
	64	"cache",
	65	"This test verifies the CPU cache operation.",
	66	POST_RAM \| POST_ALWAYS,
	67	&cache_post_test,
	68	NULL,
	69	NULL,
6d0f6bcf	70	CONFIG_SYS_POST_CACHE
324f6cfd WD	71	},
324f6cfd WD	72	#endif
6d0f6bcf	73	#if CONFIG_POST & CONFIG_SYS_POST_WATCHDOG
65b20dce YT	74	#if defined(CONFIG_POST_WATCHDOG)
	75	CONFIG_POST_WATCHDOG,
	76	#else
324f6cfd	77	{
8bde7f77 WD	78	"Watchdog timer test",
	79	"watchdog",
	80	"This test checks the watchdog timer.",
8564acf9	81	POST_RAM \| POST_POWERON \| POST_SLOWTEST \| POST_MANUAL \| POST_REBOOT,
8bde7f77 WD	82	&watchdog_post_test,
	83	NULL,
	84	NULL,
6d0f6bcf	85	CONFIG_SYS_POST_WATCHDOG
324f6cfd WD	86	},
324f6cfd WD	87	#endif
65b20dce	88	#endif
6d0f6bcf	89	#if CONFIG_POST & CONFIG_SYS_POST_I2C
324f6cfd	90	{
8bde7f77 WD	91	"I2C test",
	92	"i2c",
	93	"This test verifies the I2C operation.",
	94	POST_RAM \| POST_ALWAYS,
	95	&i2c_post_test,
	96	NULL,
	97	NULL,
6d0f6bcf	98	CONFIG_SYS_POST_I2C
324f6cfd WD	99	},
324f6cfd WD	100	#endif
6d0f6bcf	101	#if CONFIG_POST & CONFIG_SYS_POST_RTC
324f6cfd	102	{
8bde7f77 WD	103	"RTC test",
	104	"rtc",
	105	"This test verifies the RTC operation.",
8564acf9	106	POST_RAM \| POST_SLOWTEST \| POST_MANUAL,
8bde7f77 WD	107	&rtc_post_test,
	108	NULL,
	109	NULL,
6d0f6bcf	110	CONFIG_SYS_POST_RTC
324f6cfd WD	111	},
324f6cfd WD	112	#endif
6d0f6bcf	113	#if CONFIG_POST & CONFIG_SYS_POST_MEMORY
324f6cfd	114	{
8bde7f77 WD	115	"Memory test",
	116	"memory",
	117	"This test checks RAM.",
8564acf9	118	POST_ROM \| POST_POWERON \| POST_SLOWTEST \| POST_PREREL,
8bde7f77 WD	119	&memory_post_test,
	120	NULL,
	121	NULL,
6d0f6bcf	122	CONFIG_SYS_POST_MEMORY
324f6cfd WD	123	},
324f6cfd WD	124	#endif
6d0f6bcf	125	#if CONFIG_POST & CONFIG_SYS_POST_CPU
324f6cfd	126	{
8bde7f77 WD	127	"CPU test",
	128	"cpu",
	129	"This test verifies the arithmetic logic unit of"
	130	" CPU.",
	131	POST_RAM \| POST_ALWAYS,
	132	&cpu_post_test,
	133	NULL,
	134	NULL,
6d0f6bcf	135	CONFIG_SYS_POST_CPU
324f6cfd WD	136	},
324f6cfd WD	137	#endif
6d0f6bcf	138	#if CONFIG_POST & CONFIG_SYS_POST_FPU
a11e0696 IL	139	{
	140	"FPU test",
	141	"fpu",
	142	"This test verifies the arithmetic logic unit of"
	143	" FPU.",
	144	POST_RAM \| POST_ALWAYS,
	145	&fpu_post_test,
	146	NULL,
	147	NULL,
6d0f6bcf	148	CONFIG_SYS_POST_FPU
a11e0696 IL	149	},
a11e0696 IL	150	#endif
6d0f6bcf	151	#if CONFIG_POST & CONFIG_SYS_POST_UART
834a45d7 SR	152	#if defined(CONFIG_POST_UART)
	153	CONFIG_POST_UART,
	154	#else
324f6cfd	155	{
8bde7f77 WD	156	"UART test",
	157	"uart",
	158	"This test verifies the UART operation.",
8564acf9	159	POST_RAM \| POST_SLOWTEST \| POST_MANUAL,
8bde7f77 WD	160	&uart_post_test,
	161	NULL,
	162	NULL,
6d0f6bcf	163	CONFIG_SYS_POST_UART
324f6cfd	164	},
834a45d7	165	#endif /* CONFIG_POST_UART */
324f6cfd	166	#endif
6d0f6bcf	167	#if CONFIG_POST & CONFIG_SYS_POST_ETHER
324f6cfd	168	{
8bde7f77 WD	169	"ETHERNET test",
	170	"ethernet",
	171	"This test verifies the ETHERNET operation.",
5735bca5	172	POST_RAM \| POST_ALWAYS,
8bde7f77 WD	173	&ether_post_test,
	174	NULL,
	175	NULL,
6d0f6bcf	176	CONFIG_SYS_POST_ETHER
324f6cfd WD	177	},
324f6cfd WD	178	#endif
6d0f6bcf	179	#if CONFIG_POST & CONFIG_SYS_POST_USB
324f6cfd	180	{
8bde7f77 WD	181	"USB test",
	182	"usb",
	183	"This test verifies the USB operation.",
5735bca5	184	POST_RAM \| POST_ALWAYS,
8bde7f77 WD	185	&usb_post_test,
	186	NULL,
	187	NULL,
6d0f6bcf	188	CONFIG_SYS_POST_USB
324f6cfd WD	189	},
324f6cfd WD	190	#endif
6d0f6bcf	191	#if CONFIG_POST & CONFIG_SYS_POST_SPR
324f6cfd	192	{
8bde7f77 WD	193	"SPR test",
	194	"spr",
	195	"This test checks SPR contents.",
b2e2142c	196	POST_RAM \| POST_ALWAYS,
8bde7f77 WD	197	&spr_post_test,
	198	NULL,
	199	NULL,
6d0f6bcf	200	CONFIG_SYS_POST_SPR
324f6cfd WD	201	},
324f6cfd WD	202	#endif
6d0f6bcf	203	#if CONFIG_POST & CONFIG_SYS_POST_SYSMON
4532cb69	204	{
8bde7f77 WD	205	"SYSMON test",
	206	"sysmon",
	207	"This test monitors system hardware.",
	208	POST_RAM \| POST_ALWAYS,
	209	&sysmon_post_test,
	210	&sysmon_init_f,
	211	&sysmon_reloc,
6d0f6bcf	212	CONFIG_SYS_POST_SYSMON
4532cb69 WD	213	},
4532cb69 WD	214	#endif
6d0f6bcf	215	#if CONFIG_POST & CONFIG_SYS_POST_DSP
5a8c51cd WD	216	{
	217	"DSP test",
	218	"dsp",
	219	"This test checks any connected DSP(s).",
5735bca5	220	POST_RAM \| POST_ALWAYS,
5a8c51cd WD	221	&dsp_post_test,
	222	NULL,
	223	NULL,
6d0f6bcf	224	CONFIG_SYS_POST_DSP
5a8c51cd WD	225	},
5a8c51cd WD	226	#endif
6d0f6bcf	227	#if CONFIG_POST & CONFIG_SYS_POST_CODEC
79fa88f3 WD	228	{
	229	"CODEC test",
	230	"codec",
	231	"This test checks any connected codec(s).",
	232	POST_RAM \| POST_MANUAL,
	233	&codec_post_test,
	234	NULL,
	235	NULL,
6d0f6bcf	236	CONFIG_SYS_POST_CODEC
79fa88f3 WD	237	},
79fa88f3 WD	238	#endif
6d0f6bcf	239	#if CONFIG_POST & CONFIG_SYS_POST_ECC
531e3e8b PK	240	{
	241	"ECC test",
	242	"ecc",
8dafa874 LJ	243	"This test checks the ECC facility of memory.",
8dafa874 LJ	244	POST_ROM \| POST_ALWAYS \| POST_PREREL,
531e3e8b PK	245	&ecc_post_test,
	246	NULL,
	247	NULL,
6d0f6bcf	248	CONFIG_SYS_POST_ECC
531e3e8b PK	249	},
531e3e8b PK	250	#endif
6d0f6bcf	251	#if CONFIG_POST & CONFIG_SYS_POST_BSPEC1
65b20dce YT	252	CONFIG_POST_BSPEC1,
65b20dce YT	253	#endif
6d0f6bcf	254	#if CONFIG_POST & CONFIG_SYS_POST_BSPEC2
65b20dce YT	255	CONFIG_POST_BSPEC2,
65b20dce YT	256	#endif
6d0f6bcf	257	#if CONFIG_POST & CONFIG_SYS_POST_BSPEC3
65b20dce YT	258	CONFIG_POST_BSPEC3,
65b20dce YT	259	#endif
6d0f6bcf	260	#if CONFIG_POST & CONFIG_SYS_POST_BSPEC4
65b20dce YT	261	CONFIG_POST_BSPEC4,
65b20dce YT	262	#endif
6d0f6bcf	263	#if CONFIG_POST & CONFIG_SYS_POST_BSPEC5
65b20dce YT	264	CONFIG_POST_BSPEC5,
65b20dce YT	265	#endif
29fd7ceb AG	266	#if CONFIG_POST & CONFIG_SYS_POST_COPROC
	267	{
	268	"Coprocessors communication test",
	269	"coproc_com",
	270	"This test checks communication with coprocessors.",
	271	POST_RAM \| POST_ALWAYS \| POST_CRITICAL,
	272	&coprocessor_post_test,
	273	NULL,
	274	NULL,
	275	CONFIG_SYS_POST_COPROC
f6f7395e MF	276	},
	277	#endif
	278	#if CONFIG_POST & CONFIG_SYS_POST_FLASH
	279	{
	280	"Parallel NOR flash test",
	281	"flash",
	282	"This test verifies parallel flash operations.",
	283	POST_RAM \| POST_SLOWTEST \| POST_MANUAL,
	284	&flash_post_test,
	285	NULL,
	286	NULL,
	287	CONFIG_SYS_POST_FLASH
	288	},
29fd7ceb	289	#endif
8d3fcb5e VL	290	#if CONFIG_POST & CONFIG_SYS_POST_MEM_REGIONS
	291	{
	292	"Memory regions test",
	293	"mem_regions",
	294	"This test checks regularly placed regions of the RAM.",
	295	POST_ROM \| POST_SLOWTEST \| POST_PREREL,
	296	&memory_regions_post_test,
	297	NULL,
	298	NULL,
	299	CONFIG_SYS_POST_MEM_REGIONS
	300	},
	301	#endif
324f6cfd WD	302	};
324f6cfd WD	303
d2397817	304	unsigned int post_list_size = ARRAY_SIZE(post_list);