[people/ms/u-boot.git] / tools / ifdtool.h

/*
 * ifdtool - Manage Intel Firmware Descriptor information
 *
 * Copyright (C) 2011 The ChromiumOS Authors.
 *
 * SPDX-License-Identifier:	GPL-2.0
 *
 * From Coreboot project
 */

#include <stdint.h>

#define __packed	__attribute__((packed))

#define IFDTOOL_VERSION "1.1-U-Boot"

enum spi_frequency {
	SPI_FREQUENCY_20MHZ = 0,
	SPI_FREQUENCY_33MHZ = 1,
	SPI_FREQUENCY_50MHZ = 4,
};

enum component_density {
	COMPONENT_DENSITY_512KB = 0,
	COMPONENT_DENSITY_1MB   = 1,
	COMPONENT_DENSITY_2MB   = 2,
	COMPONENT_DENSITY_4MB   = 3,
	COMPONENT_DENSITY_8MB   = 4,
	COMPONENT_DENSITY_16MB  = 5,
};

/* flash descriptor */
struct __packed fdbar_t {
	uint32_t flvalsig;
	uint32_t flmap0;
	uint32_t flmap1;
	uint32_t flmap2;
	uint8_t  reserved[0xefc - 0x20];
	uint32_t flumap1;
};

#define MAX_REGIONS	5

/* regions */
struct __packed frba_t {
	uint32_t flreg[MAX_REGIONS];
};

/* component section */
struct __packed fcba_t {
	uint32_t flcomp;
	uint32_t flill;
	uint32_t flpb;
};

#define MAX_STRAPS	18

/* pch strap */
struct __packed fpsba_t {
	uint32_t pchstrp[MAX_STRAPS];
};

/* master */
struct __packed fmba_t {
	uint32_t flmstr1;
	uint32_t flmstr2;
	uint32_t flmstr3;
};

/* processor strap */
struct __packed fmsba_t {
	uint32_t data[8];
};

/* ME VSCC */
struct vscc_t {
	uint32_t jid;
	uint32_t vscc;
};

struct vtba_t {
	/* Actual number of entries specified in vtl */
	struct vscc_t entry[8];
};

struct region_t {
	int base, limit, size;
};
Commit	Line	Data
cd392fe8 SG	1	/*
	2	* ifdtool - Manage Intel Firmware Descriptor information
	3	*
	4	* Copyright (C) 2011 The ChromiumOS Authors.
	5	*
	6	* SPDX-License-Identifier: GPL-2.0
	7	*
	8	* From Coreboot project
	9	*/
	10
	11	#include <stdint.h>
	12
	13	#define __packed __attribute__((packed))
	14
	15	#define IFDTOOL_VERSION "1.1-U-Boot"
	16
	17	enum spi_frequency {
	18	SPI_FREQUENCY_20MHZ = 0,
	19	SPI_FREQUENCY_33MHZ = 1,
	20	SPI_FREQUENCY_50MHZ = 4,
	21	};
	22
	23	enum component_density {
	24	COMPONENT_DENSITY_512KB = 0,
	25	COMPONENT_DENSITY_1MB = 1,
	26	COMPONENT_DENSITY_2MB = 2,
	27	COMPONENT_DENSITY_4MB = 3,
	28	COMPONENT_DENSITY_8MB = 4,
	29	COMPONENT_DENSITY_16MB = 5,
	30	};
	31
	32	/* flash descriptor */
	33	struct __packed fdbar_t {
	34	uint32_t flvalsig;
	35	uint32_t flmap0;
	36	uint32_t flmap1;
	37	uint32_t flmap2;
	38	uint8_t reserved[0xefc - 0x20];
	39	uint32_t flumap1;
	40	};
	41
	42	#define MAX_REGIONS 5
	43
	44	/* regions */
	45	struct __packed frba_t {
	46	uint32_t flreg[MAX_REGIONS];
	47	};
	48
	49	/* component section */
	50	struct __packed fcba_t {
	51	uint32_t flcomp;
	52	uint32_t flill;
	53	uint32_t flpb;
	54	};
	55
	56	#define MAX_STRAPS 18
	57
	58	/* pch strap */
	59	struct __packed fpsba_t {
	60	uint32_t pchstrp[MAX_STRAPS];
	61	};
	62
	63	/* master */
	64	struct __packed fmba_t {
65	uint32_t flmstr1;
66	uint32_t flmstr2;
67	uint32_t flmstr3;
68	};
69
70	/* processor strap */
71	struct __packed fmsba_t {
72	uint32_t data[8];
73	};
74
75	/* ME VSCC */
76	struct vscc_t {
77	uint32_t jid;
78	uint32_t vscc;
79	};
80
81	struct vtba_t {
82	/* Actual number of entries specified in vtl */
83	struct vscc_t entry[8];
84	};
85
86	struct region_t {
87	int base, limit, size;
88	};