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8edcde5e SB |
1 | /* |
2 | * (C) Copyright 2009 | |
3 | * Stefano Babic, DENX Software Engineering, sbabic@denx.de. | |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | #ifndef _IMXIMAGE_H_ | |
25 | #define _IMXIMAGE_H_ | |
26 | ||
8a1edd7d LHR |
27 | #define MAX_HW_CFG_SIZE_V2 121 /* Max number of registers imx can set for v2 */ |
28 | #define MAX_HW_CFG_SIZE_V1 60 /* Max number of registers imx can set for v1 */ | |
8edcde5e SB |
29 | #define APP_CODE_BARKER 0xB1 |
30 | #define DCD_BARKER 0xB17219E9 | |
8edcde5e | 31 | |
8a1edd7d | 32 | #define HEADER_OFFSET 0x400 |
8edcde5e SB |
33 | |
34 | #define CMD_DATA_STR "DATA" | |
35 | #define FLASH_OFFSET_STANDARD 0x400 | |
36 | #define FLASH_OFFSET_NAND FLASH_OFFSET_STANDARD | |
37 | #define FLASH_OFFSET_SD FLASH_OFFSET_STANDARD | |
38 | #define FLASH_OFFSET_SPI FLASH_OFFSET_STANDARD | |
39 | #define FLASH_OFFSET_ONENAND 0x100 | |
40 | ||
8a1edd7d LHR |
41 | #define IVT_HEADER_TAG 0xD1 |
42 | #define IVT_VERSION 0x40 | |
43 | #define DCD_HEADER_TAG 0xD2 | |
44 | #define DCD_COMMAND_TAG 0xCC | |
45 | #define DCD_VERSION 0x40 | |
46 | #define DCD_COMMAND_PARAM 0x4 | |
47 | ||
8edcde5e SB |
48 | enum imximage_cmd { |
49 | CMD_INVALID, | |
8a1edd7d | 50 | CMD_IMAGE_VERSION, |
8edcde5e SB |
51 | CMD_BOOT_FROM, |
52 | CMD_DATA | |
53 | }; | |
54 | ||
55 | enum imximage_fld_types { | |
56 | CFG_INVALID = -1, | |
57 | CFG_COMMAND, | |
58 | CFG_REG_SIZE, | |
59 | CFG_REG_ADDRESS, | |
60 | CFG_REG_VALUE | |
61 | }; | |
62 | ||
8a1edd7d LHR |
63 | enum imximage_version { |
64 | IMXIMAGE_VER_INVALID = -1, | |
65 | IMXIMAGE_V1 = 1, | |
66 | IMXIMAGE_V2 | |
67 | }; | |
8edcde5e SB |
68 | |
69 | typedef struct { | |
70 | uint32_t type; /* Type of pointer (byte, halfword, word, wait/read) */ | |
71 | uint32_t addr; /* Address to write to */ | |
72 | uint32_t value; /* Data to write */ | |
73 | } dcd_type_addr_data_t; | |
74 | ||
75 | typedef struct { | |
76 | uint32_t barker; /* Barker for sanity check */ | |
77 | uint32_t length; /* Device configuration length (without preamble) */ | |
78 | } dcd_preamble_t; | |
79 | ||
80 | typedef struct { | |
81 | dcd_preamble_t preamble; | |
8a1edd7d LHR |
82 | dcd_type_addr_data_t addr_data[MAX_HW_CFG_SIZE_V1]; |
83 | } dcd_v1_t; | |
8edcde5e SB |
84 | |
85 | typedef struct { | |
86 | uint32_t app_code_jump_vector; | |
87 | uint32_t app_code_barker; | |
88 | uint32_t app_code_csf; | |
89 | uint32_t dcd_ptr_ptr; | |
5b28e913 | 90 | uint32_t super_root_key; |
8edcde5e SB |
91 | uint32_t dcd_ptr; |
92 | uint32_t app_dest_ptr; | |
8a1edd7d | 93 | } flash_header_v1_t; |
8edcde5e SB |
94 | |
95 | typedef struct { | |
96 | uint32_t length; /* Length of data to be read from flash */ | |
97 | } flash_cfg_parms_t; | |
98 | ||
8a1edd7d LHR |
99 | typedef struct { |
100 | flash_header_v1_t fhdr; | |
101 | dcd_v1_t dcd_table; | |
8edcde5e | 102 | flash_cfg_parms_t ext_header; |
8a1edd7d LHR |
103 | } imx_header_v1_t; |
104 | ||
105 | typedef struct { | |
106 | uint32_t addr; | |
107 | uint32_t value; | |
108 | } dcd_addr_data_t; | |
109 | ||
110 | typedef struct { | |
111 | uint8_t tag; | |
112 | uint16_t length; | |
113 | uint8_t version; | |
114 | } __attribute__((packed)) ivt_header_t; | |
115 | ||
116 | typedef struct { | |
117 | uint8_t tag; | |
118 | uint16_t length; | |
119 | uint8_t param; | |
120 | } __attribute__((packed)) write_dcd_command_t; | |
121 | ||
122 | typedef struct { | |
123 | ivt_header_t header; | |
124 | write_dcd_command_t write_dcd_command; | |
125 | dcd_addr_data_t addr_data[MAX_HW_CFG_SIZE_V2]; | |
126 | } dcd_v2_t; | |
127 | ||
128 | typedef struct { | |
129 | uint32_t start; | |
130 | uint32_t size; | |
131 | uint32_t plugin; | |
132 | } boot_data_t; | |
133 | ||
134 | typedef struct { | |
135 | ivt_header_t header; | |
136 | uint32_t entry; | |
137 | uint32_t reserved1; | |
138 | uint32_t dcd_ptr; | |
139 | uint32_t boot_data_ptr; | |
140 | uint32_t self; | |
141 | uint32_t csf; | |
142 | uint32_t reserved2; | |
143 | } flash_header_v2_t; | |
144 | ||
145 | typedef struct { | |
146 | flash_header_v2_t fhdr; | |
147 | boot_data_t boot_data; | |
148 | dcd_v2_t dcd_table; | |
149 | } imx_header_v2_t; | |
150 | ||
151 | struct imx_header { | |
152 | union { | |
153 | imx_header_v1_t hdr_v1; | |
154 | imx_header_v2_t hdr_v2; | |
155 | } header; | |
8edcde5e SB |
156 | uint32_t flash_offset; |
157 | }; | |
158 | ||
8a1edd7d LHR |
159 | typedef void (*set_dcd_val_t)(struct imx_header *imxhdr, |
160 | char *name, int lineno, | |
161 | int fld, uint32_t value, | |
162 | uint32_t off); | |
163 | ||
164 | typedef void (*set_dcd_rst_t)(struct imx_header *imxhdr, | |
165 | uint32_t dcd_len, | |
166 | char *name, int lineno); | |
167 | ||
168 | typedef void (*set_imx_hdr_t)(struct imx_header *imxhdr, | |
169 | uint32_t dcd_len, | |
170 | struct stat *sbuf, | |
171 | struct mkimage_params *params); | |
8edcde5e SB |
172 | |
173 | #endif /* _IMXIMAGE_H_ */ |