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mmc: Continue polling MMC card for OCR only if it is still not ready
[people/ms/u-boot.git] / drivers / mmc / mmc.c
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1/*
2 * Copyright 2008, Freescale Semiconductor, Inc
3 * Andy Fleming
4 *
5 * Based vaguely on the Linux code
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10#include <config.h>
11#include <common.h>
12#include <command.h>
13#include <errno.h>
14#include <mmc.h>
15#include <part.h>
16#include <malloc.h>
17#include <linux/list.h>
18#include <div64.h>
19#include "mmc_private.h"
20
21static struct list_head mmc_devices;
22static int cur_dev_num = -1;
23
24__weak int board_mmc_getwp(struct mmc *mmc)
25{
26 return -1;
27}
28
29int mmc_getwp(struct mmc *mmc)
30{
31 int wp;
32
33 wp = board_mmc_getwp(mmc);
34
35 if (wp < 0) {
36 if (mmc->cfg->ops->getwp)
37 wp = mmc->cfg->ops->getwp(mmc);
38 else
39 wp = 0;
40 }
41
42 return wp;
43}
44
45__weak int board_mmc_getcd(struct mmc *mmc)
46{
47 return -1;
48}
49
50int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
51{
52 int ret;
53
54#ifdef CONFIG_MMC_TRACE
55 int i;
56 u8 *ptr;
57
58 printf("CMD_SEND:%d\n", cmd->cmdidx);
59 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
60 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
61 switch (cmd->resp_type) {
62 case MMC_RSP_NONE:
63 printf("\t\tMMC_RSP_NONE\n");
64 break;
65 case MMC_RSP_R1:
66 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
67 cmd->response[0]);
68 break;
69 case MMC_RSP_R1b:
70 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
71 cmd->response[0]);
72 break;
73 case MMC_RSP_R2:
74 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
75 cmd->response[0]);
76 printf("\t\t \t\t 0x%08X \n",
77 cmd->response[1]);
78 printf("\t\t \t\t 0x%08X \n",
79 cmd->response[2]);
80 printf("\t\t \t\t 0x%08X \n",
81 cmd->response[3]);
82 printf("\n");
83 printf("\t\t\t\t\tDUMPING DATA\n");
84 for (i = 0; i < 4; i++) {
85 int j;
86 printf("\t\t\t\t\t%03d - ", i*4);
87 ptr = (u8 *)&cmd->response[i];
88 ptr += 3;
89 for (j = 0; j < 4; j++)
90 printf("%02X ", *ptr--);
91 printf("\n");
92 }
93 break;
94 case MMC_RSP_R3:
95 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
96 cmd->response[0]);
97 break;
98 default:
99 printf("\t\tERROR MMC rsp not supported\n");
100 break;
101 }
102#else
103 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
104#endif
105 return ret;
106}
107
108int mmc_send_status(struct mmc *mmc, int timeout)
109{
110 struct mmc_cmd cmd;
111 int err, retries = 5;
112#ifdef CONFIG_MMC_TRACE
113 int status;
114#endif
115
116 cmd.cmdidx = MMC_CMD_SEND_STATUS;
117 cmd.resp_type = MMC_RSP_R1;
118 if (!mmc_host_is_spi(mmc))
119 cmd.cmdarg = mmc->rca << 16;
120
121 do {
122 err = mmc_send_cmd(mmc, &cmd, NULL);
123 if (!err) {
124 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
125 (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
126 MMC_STATE_PRG)
127 break;
128 else if (cmd.response[0] & MMC_STATUS_MASK) {
129#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
130 printf("Status Error: 0x%08X\n",
131 cmd.response[0]);
132#endif
133 return COMM_ERR;
134 }
135 } else if (--retries < 0)
136 return err;
137
138 udelay(1000);
139
140 } while (timeout--);
141
142#ifdef CONFIG_MMC_TRACE
143 status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
144 printf("CURR STATE:%d\n", status);
145#endif
146 if (timeout <= 0) {
147#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
148 printf("Timeout waiting card ready\n");
149#endif
150 return TIMEOUT;
151 }
152 if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR)
153 return SWITCH_ERR;
154
155 return 0;
156}
157
158int mmc_set_blocklen(struct mmc *mmc, int len)
159{
160 struct mmc_cmd cmd;
161
162 if (mmc->ddr_mode)
163 return 0;
164
165 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
166 cmd.resp_type = MMC_RSP_R1;
167 cmd.cmdarg = len;
168
169 return mmc_send_cmd(mmc, &cmd, NULL);
170}
171
172struct mmc *find_mmc_device(int dev_num)
173{
174 struct mmc *m;
175 struct list_head *entry;
176
177 list_for_each(entry, &mmc_devices) {
178 m = list_entry(entry, struct mmc, link);
179
180 if (m->block_dev.dev == dev_num)
181 return m;
182 }
183
184#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
185 printf("MMC Device %d not found\n", dev_num);
186#endif
187
188 return NULL;
189}
190
191static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
192 lbaint_t blkcnt)
193{
194 struct mmc_cmd cmd;
195 struct mmc_data data;
196
197 if (blkcnt > 1)
198 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
199 else
200 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
201
202 if (mmc->high_capacity)
203 cmd.cmdarg = start;
204 else
205 cmd.cmdarg = start * mmc->read_bl_len;
206
207 cmd.resp_type = MMC_RSP_R1;
208
209 data.dest = dst;
210 data.blocks = blkcnt;
211 data.blocksize = mmc->read_bl_len;
212 data.flags = MMC_DATA_READ;
213
214 if (mmc_send_cmd(mmc, &cmd, &data))
215 return 0;
216
217 if (blkcnt > 1) {
218 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
219 cmd.cmdarg = 0;
220 cmd.resp_type = MMC_RSP_R1b;
221 if (mmc_send_cmd(mmc, &cmd, NULL)) {
222#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
223 printf("mmc fail to send stop cmd\n");
224#endif
225 return 0;
226 }
227 }
228
229 return blkcnt;
230}
231
232static ulong mmc_bread(int dev_num, lbaint_t start, lbaint_t blkcnt, void *dst)
233{
234 lbaint_t cur, blocks_todo = blkcnt;
235
236 if (blkcnt == 0)
237 return 0;
238
239 struct mmc *mmc = find_mmc_device(dev_num);
240 if (!mmc)
241 return 0;
242
243 if ((start + blkcnt) > mmc->block_dev.lba) {
244#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
245 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
246 start + blkcnt, mmc->block_dev.lba);
247#endif
248 return 0;
249 }
250
251 if (mmc_set_blocklen(mmc, mmc->read_bl_len))
252 return 0;
253
254 do {
255 cur = (blocks_todo > mmc->cfg->b_max) ?
256 mmc->cfg->b_max : blocks_todo;
257 if(mmc_read_blocks(mmc, dst, start, cur) != cur)
258 return 0;
259 blocks_todo -= cur;
260 start += cur;
261 dst += cur * mmc->read_bl_len;
262 } while (blocks_todo > 0);
263
264 return blkcnt;
265}
266
267static int mmc_go_idle(struct mmc *mmc)
268{
269 struct mmc_cmd cmd;
270 int err;
271
272 udelay(1000);
273
274 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
275 cmd.cmdarg = 0;
276 cmd.resp_type = MMC_RSP_NONE;
277
278 err = mmc_send_cmd(mmc, &cmd, NULL);
279
280 if (err)
281 return err;
282
283 udelay(2000);
284
285 return 0;
286}
287
288static int sd_send_op_cond(struct mmc *mmc)
289{
290 int timeout = 1000;
291 int err;
292 struct mmc_cmd cmd;
293
294 do {
295 cmd.cmdidx = MMC_CMD_APP_CMD;
296 cmd.resp_type = MMC_RSP_R1;
297 cmd.cmdarg = 0;
298
299 err = mmc_send_cmd(mmc, &cmd, NULL);
300
301 if (err)
302 return err;
303
304 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
305 cmd.resp_type = MMC_RSP_R3;
306
307 /*
308 * Most cards do not answer if some reserved bits
309 * in the ocr are set. However, Some controller
310 * can set bit 7 (reserved for low voltages), but
311 * how to manage low voltages SD card is not yet
312 * specified.
313 */
314 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
315 (mmc->cfg->voltages & 0xff8000);
316
317 if (mmc->version == SD_VERSION_2)
318 cmd.cmdarg |= OCR_HCS;
319
320 err = mmc_send_cmd(mmc, &cmd, NULL);
321
322 if (err)
323 return err;
324
325 udelay(1000);
326 } while ((!(cmd.response[0] & OCR_BUSY)) && timeout--);
327
328 if (timeout <= 0)
329 return UNUSABLE_ERR;
330
331 if (mmc->version != SD_VERSION_2)
332 mmc->version = SD_VERSION_1_0;
333
334 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
335 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
336 cmd.resp_type = MMC_RSP_R3;
337 cmd.cmdarg = 0;
338
339 err = mmc_send_cmd(mmc, &cmd, NULL);
340
341 if (err)
342 return err;
343 }
344
345 mmc->ocr = cmd.response[0];
346
347 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
348 mmc->rca = 0;
349
350 return 0;
351}
352
353static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg)
354{
355 struct mmc_cmd cmd;
356 int err;
357
358 cmd.cmdidx = MMC_CMD_SEND_OP_COND;
359 cmd.resp_type = MMC_RSP_R3;
360 cmd.cmdarg = 0;
361 if (use_arg && !mmc_host_is_spi(mmc)) {
362 cmd.cmdarg =
363 (mmc->cfg->voltages &
364 (mmc->ocr & OCR_VOLTAGE_MASK)) |
365 (mmc->ocr & OCR_ACCESS_MODE);
366
367 if (mmc->cfg->host_caps & MMC_MODE_HC)
368 cmd.cmdarg |= OCR_HCS;
369 }
370 err = mmc_send_cmd(mmc, &cmd, NULL);
371 if (err)
372 return err;
373 mmc->ocr = cmd.response[0];
374 return 0;
375}
376
377static int mmc_send_op_cond(struct mmc *mmc)
378{
379 int err, i;
380
381 /* Some cards seem to need this */
382 mmc_go_idle(mmc);
383
384 /* Asking to the card its capabilities */
385 mmc->op_cond_pending = 1;
386 for (i = 0; i < 2; i++) {
387 err = mmc_send_op_cond_iter(mmc, i != 0);
388 if (err)
389 return err;
390
391 /* exit if not busy (flag seems to be inverted) */
392 if (mmc->ocr & OCR_BUSY)
393 return 0;
394 }
395 return IN_PROGRESS;
396}
397
398static int mmc_complete_op_cond(struct mmc *mmc)
399{
400 struct mmc_cmd cmd;
401 int timeout = 1000;
402 uint start;
403 int err;
404
405 mmc->op_cond_pending = 0;
406 if (!(mmc->ocr & OCR_BUSY)) {
407 start = get_timer(0);
408 do {
409 err = mmc_send_op_cond_iter(mmc, 1);
410 if (err)
411 return err;
412 if (get_timer(start) > timeout)
413 return UNUSABLE_ERR;
414 udelay(100);
415 } while (!(mmc->ocr & OCR_BUSY));
416 }
417
418 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
419 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
420 cmd.resp_type = MMC_RSP_R3;
421 cmd.cmdarg = 0;
422
423 err = mmc_send_cmd(mmc, &cmd, NULL);
424
425 if (err)
426 return err;
427
428 mmc->ocr = cmd.response[0];
429 }
430
431 mmc->version = MMC_VERSION_UNKNOWN;
432
433 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
434 mmc->rca = 1;
435
436 return 0;
437}
438
439
440static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
441{
442 struct mmc_cmd cmd;
443 struct mmc_data data;
444 int err;
445
446 /* Get the Card Status Register */
447 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
448 cmd.resp_type = MMC_RSP_R1;
449 cmd.cmdarg = 0;
450
451 data.dest = (char *)ext_csd;
452 data.blocks = 1;
453 data.blocksize = MMC_MAX_BLOCK_LEN;
454 data.flags = MMC_DATA_READ;
455
456 err = mmc_send_cmd(mmc, &cmd, &data);
457
458 return err;
459}
460
461
462static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
463{
464 struct mmc_cmd cmd;
465 int timeout = 1000;
466 int ret;
467
468 cmd.cmdidx = MMC_CMD_SWITCH;
469 cmd.resp_type = MMC_RSP_R1b;
470 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
471 (index << 16) |
472 (value << 8);
473
474 ret = mmc_send_cmd(mmc, &cmd, NULL);
475
476 /* Waiting for the ready status */
477 if (!ret)
478 ret = mmc_send_status(mmc, timeout);
479
480 return ret;
481
482}
483
484static int mmc_change_freq(struct mmc *mmc)
485{
486 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
487 char cardtype;
488 int err;
489
490 mmc->card_caps = 0;
491
492 if (mmc_host_is_spi(mmc))
493 return 0;
494
495 /* Only version 4 supports high-speed */
496 if (mmc->version < MMC_VERSION_4)
497 return 0;
498
499 mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
500
501 err = mmc_send_ext_csd(mmc, ext_csd);
502
503 if (err)
504 return err;
505
506 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
507
508 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
509
510 if (err)
511 return err == SWITCH_ERR ? 0 : err;
512
513 /* Now check to see that it worked */
514 err = mmc_send_ext_csd(mmc, ext_csd);
515
516 if (err)
517 return err;
518
519 /* No high-speed support */
520 if (!ext_csd[EXT_CSD_HS_TIMING])
521 return 0;
522
523 /* High Speed is set, there are two types: 52MHz and 26MHz */
524 if (cardtype & EXT_CSD_CARD_TYPE_52) {
525 if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
526 mmc->card_caps |= MMC_MODE_DDR_52MHz;
527 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
528 } else {
529 mmc->card_caps |= MMC_MODE_HS;
530 }
531
532 return 0;
533}
534
535static int mmc_set_capacity(struct mmc *mmc, int part_num)
536{
537 switch (part_num) {
538 case 0:
539 mmc->capacity = mmc->capacity_user;
540 break;
541 case 1:
542 case 2:
543 mmc->capacity = mmc->capacity_boot;
544 break;
545 case 3:
546 mmc->capacity = mmc->capacity_rpmb;
547 break;
548 case 4:
549 case 5:
550 case 6:
551 case 7:
552 mmc->capacity = mmc->capacity_gp[part_num - 4];
553 break;
554 default:
555 return -1;
556 }
557
558 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
559
560 return 0;
561}
562
563int mmc_select_hwpart(int dev_num, int hwpart)
564{
565 struct mmc *mmc = find_mmc_device(dev_num);
566 int ret;
567
568 if (!mmc)
569 return -ENODEV;
570
571 if (mmc->part_num == hwpart)
572 return 0;
573
574 if (mmc->part_config == MMCPART_NOAVAILABLE) {
575 printf("Card doesn't support part_switch\n");
576 return -EMEDIUMTYPE;
577 }
578
579 ret = mmc_switch_part(dev_num, hwpart);
580 if (ret)
581 return ret;
582
583 mmc->part_num = hwpart;
584
585 return 0;
586}
587
588
589int mmc_switch_part(int dev_num, unsigned int part_num)
590{
591 struct mmc *mmc = find_mmc_device(dev_num);
592 int ret;
593
594 if (!mmc)
595 return -1;
596
597 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
598 (mmc->part_config & ~PART_ACCESS_MASK)
599 | (part_num & PART_ACCESS_MASK));
600
601 /*
602 * Set the capacity if the switch succeeded or was intended
603 * to return to representing the raw device.
604 */
605 if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0)))
606 ret = mmc_set_capacity(mmc, part_num);
607
608 return ret;
609}
610
611int mmc_hwpart_config(struct mmc *mmc,
612 const struct mmc_hwpart_conf *conf,
613 enum mmc_hwpart_conf_mode mode)
614{
615 u8 part_attrs = 0;
616 u32 enh_size_mult;
617 u32 enh_start_addr;
618 u32 gp_size_mult[4];
619 u32 max_enh_size_mult;
620 u32 tot_enh_size_mult = 0;
621 u8 wr_rel_set;
622 int i, pidx, err;
623 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
624
625 if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE)
626 return -EINVAL;
627
628 if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) {
629 printf("eMMC >= 4.4 required for enhanced user data area\n");
630 return -EMEDIUMTYPE;
631 }
632
633 if (!(mmc->part_support & PART_SUPPORT)) {
634 printf("Card does not support partitioning\n");
635 return -EMEDIUMTYPE;
636 }
637
638 if (!mmc->hc_wp_grp_size) {
639 printf("Card does not define HC WP group size\n");
640 return -EMEDIUMTYPE;
641 }
642
643 /* check partition alignment and total enhanced size */
644 if (conf->user.enh_size) {
645 if (conf->user.enh_size % mmc->hc_wp_grp_size ||
646 conf->user.enh_start % mmc->hc_wp_grp_size) {
647 printf("User data enhanced area not HC WP group "
648 "size aligned\n");
649 return -EINVAL;
650 }
651 part_attrs |= EXT_CSD_ENH_USR;
652 enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size;
653 if (mmc->high_capacity) {
654 enh_start_addr = conf->user.enh_start;
655 } else {
656 enh_start_addr = (conf->user.enh_start << 9);
657 }
658 } else {
659 enh_size_mult = 0;
660 enh_start_addr = 0;
661 }
662 tot_enh_size_mult += enh_size_mult;
663
664 for (pidx = 0; pidx < 4; pidx++) {
665 if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) {
666 printf("GP%i partition not HC WP group size "
667 "aligned\n", pidx+1);
668 return -EINVAL;
669 }
670 gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size;
671 if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) {
672 part_attrs |= EXT_CSD_ENH_GP(pidx);
673 tot_enh_size_mult += gp_size_mult[pidx];
674 }
675 }
676
677 if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) {
678 printf("Card does not support enhanced attribute\n");
679 return -EMEDIUMTYPE;
680 }
681
682 err = mmc_send_ext_csd(mmc, ext_csd);
683 if (err)
684 return err;
685
686 max_enh_size_mult =
687 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) +
688 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) +
689 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT];
690 if (tot_enh_size_mult > max_enh_size_mult) {
691 printf("Total enhanced size exceeds maximum (%u > %u)\n",
692 tot_enh_size_mult, max_enh_size_mult);
693 return -EMEDIUMTYPE;
694 }
695
696 /* The default value of EXT_CSD_WR_REL_SET is device
697 * dependent, the values can only be changed if the
698 * EXT_CSD_HS_CTRL_REL bit is set. The values can be
699 * changed only once and before partitioning is completed. */
700 wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
701 if (conf->user.wr_rel_change) {
702 if (conf->user.wr_rel_set)
703 wr_rel_set |= EXT_CSD_WR_DATA_REL_USR;
704 else
705 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR;
706 }
707 for (pidx = 0; pidx < 4; pidx++) {
708 if (conf->gp_part[pidx].wr_rel_change) {
709 if (conf->gp_part[pidx].wr_rel_set)
710 wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx);
711 else
712 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx);
713 }
714 }
715
716 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] &&
717 !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) {
718 puts("Card does not support host controlled partition write "
719 "reliability settings\n");
720 return -EMEDIUMTYPE;
721 }
722
723 if (ext_csd[EXT_CSD_PARTITION_SETTING] &
724 EXT_CSD_PARTITION_SETTING_COMPLETED) {
725 printf("Card already partitioned\n");
726 return -EPERM;
727 }
728
729 if (mode == MMC_HWPART_CONF_CHECK)
730 return 0;
731
732 /* Partitioning requires high-capacity size definitions */
733 if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) {
734 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
735 EXT_CSD_ERASE_GROUP_DEF, 1);
736
737 if (err)
738 return err;
739
740 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
741
742 /* update erase group size to be high-capacity */
743 mmc->erase_grp_size =
744 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
745
746 }
747
748 /* all OK, write the configuration */
749 for (i = 0; i < 4; i++) {
750 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
751 EXT_CSD_ENH_START_ADDR+i,
752 (enh_start_addr >> (i*8)) & 0xFF);
753 if (err)
754 return err;
755 }
756 for (i = 0; i < 3; i++) {
757 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
758 EXT_CSD_ENH_SIZE_MULT+i,
759 (enh_size_mult >> (i*8)) & 0xFF);
760 if (err)
761 return err;
762 }
763 for (pidx = 0; pidx < 4; pidx++) {
764 for (i = 0; i < 3; i++) {
765 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
766 EXT_CSD_GP_SIZE_MULT+pidx*3+i,
767 (gp_size_mult[pidx] >> (i*8)) & 0xFF);
768 if (err)
769 return err;
770 }
771 }
772 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
773 EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs);
774 if (err)
775 return err;
776
777 if (mode == MMC_HWPART_CONF_SET)
778 return 0;
779
780 /* The WR_REL_SET is a write-once register but shall be
781 * written before setting PART_SETTING_COMPLETED. As it is
782 * write-once we can only write it when completing the
783 * partitioning. */
784 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) {
785 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
786 EXT_CSD_WR_REL_SET, wr_rel_set);
787 if (err)
788 return err;
789 }
790
791 /* Setting PART_SETTING_COMPLETED confirms the partition
792 * configuration but it only becomes effective after power
793 * cycle, so we do not adjust the partition related settings
794 * in the mmc struct. */
795
796 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
797 EXT_CSD_PARTITION_SETTING,
798 EXT_CSD_PARTITION_SETTING_COMPLETED);
799 if (err)
800 return err;
801
802 return 0;
803}
804
805int mmc_getcd(struct mmc *mmc)
806{
807 int cd;
808
809 cd = board_mmc_getcd(mmc);
810
811 if (cd < 0) {
812 if (mmc->cfg->ops->getcd)
813 cd = mmc->cfg->ops->getcd(mmc);
814 else
815 cd = 1;
816 }
817
818 return cd;
819}
820
821static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
822{
823 struct mmc_cmd cmd;
824 struct mmc_data data;
825
826 /* Switch the frequency */
827 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
828 cmd.resp_type = MMC_RSP_R1;
829 cmd.cmdarg = (mode << 31) | 0xffffff;
830 cmd.cmdarg &= ~(0xf << (group * 4));
831 cmd.cmdarg |= value << (group * 4);
832
833 data.dest = (char *)resp;
834 data.blocksize = 64;
835 data.blocks = 1;
836 data.flags = MMC_DATA_READ;
837
838 return mmc_send_cmd(mmc, &cmd, &data);
839}
840
841
842static int sd_change_freq(struct mmc *mmc)
843{
844 int err;
845 struct mmc_cmd cmd;
846 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
847 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
848 struct mmc_data data;
849 int timeout;
850
851 mmc->card_caps = 0;
852
853 if (mmc_host_is_spi(mmc))
854 return 0;
855
856 /* Read the SCR to find out if this card supports higher speeds */
857 cmd.cmdidx = MMC_CMD_APP_CMD;
858 cmd.resp_type = MMC_RSP_R1;
859 cmd.cmdarg = mmc->rca << 16;
860
861 err = mmc_send_cmd(mmc, &cmd, NULL);
862
863 if (err)
864 return err;
865
866 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
867 cmd.resp_type = MMC_RSP_R1;
868 cmd.cmdarg = 0;
869
870 timeout = 3;
871
872retry_scr:
873 data.dest = (char *)scr;
874 data.blocksize = 8;
875 data.blocks = 1;
876 data.flags = MMC_DATA_READ;
877
878 err = mmc_send_cmd(mmc, &cmd, &data);
879
880 if (err) {
881 if (timeout--)
882 goto retry_scr;
883
884 return err;
885 }
886
887 mmc->scr[0] = __be32_to_cpu(scr[0]);
888 mmc->scr[1] = __be32_to_cpu(scr[1]);
889
890 switch ((mmc->scr[0] >> 24) & 0xf) {
891 case 0:
892 mmc->version = SD_VERSION_1_0;
893 break;
894 case 1:
895 mmc->version = SD_VERSION_1_10;
896 break;
897 case 2:
898 mmc->version = SD_VERSION_2;
899 if ((mmc->scr[0] >> 15) & 0x1)
900 mmc->version = SD_VERSION_3;
901 break;
902 default:
903 mmc->version = SD_VERSION_1_0;
904 break;
905 }
906
907 if (mmc->scr[0] & SD_DATA_4BIT)
908 mmc->card_caps |= MMC_MODE_4BIT;
909
910 /* Version 1.0 doesn't support switching */
911 if (mmc->version == SD_VERSION_1_0)
912 return 0;
913
914 timeout = 4;
915 while (timeout--) {
916 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
917 (u8 *)switch_status);
918
919 if (err)
920 return err;
921
922 /* The high-speed function is busy. Try again */
923 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
924 break;
925 }
926
927 /* If high-speed isn't supported, we return */
928 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
929 return 0;
930
931 /*
932 * If the host doesn't support SD_HIGHSPEED, do not switch card to
933 * HIGHSPEED mode even if the card support SD_HIGHSPPED.
934 * This can avoid furthur problem when the card runs in different
935 * mode between the host.
936 */
937 if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) &&
938 (mmc->cfg->host_caps & MMC_MODE_HS)))
939 return 0;
940
941 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
942
943 if (err)
944 return err;
945
946 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
947 mmc->card_caps |= MMC_MODE_HS;
948
949 return 0;
950}
951
952/* frequency bases */
953/* divided by 10 to be nice to platforms without floating point */
954static const int fbase[] = {
955 10000,
956 100000,
957 1000000,
958 10000000,
959};
960
961/* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
962 * to platforms without floating point.
963 */
964static const int multipliers[] = {
965 0, /* reserved */
966 10,
967 12,
968 13,
969 15,
970 20,
971 25,
972 30,
973 35,
974 40,
975 45,
976 50,
977 55,
978 60,
979 70,
980 80,
981};
982
983static void mmc_set_ios(struct mmc *mmc)
984{
985 if (mmc->cfg->ops->set_ios)
986 mmc->cfg->ops->set_ios(mmc);
987}
988
989void mmc_set_clock(struct mmc *mmc, uint clock)
990{
991 if (clock > mmc->cfg->f_max)
992 clock = mmc->cfg->f_max;
993
994 if (clock < mmc->cfg->f_min)
995 clock = mmc->cfg->f_min;
996
997 mmc->clock = clock;
998
999 mmc_set_ios(mmc);
1000}
1001
1002static void mmc_set_bus_width(struct mmc *mmc, uint width)
1003{
1004 mmc->bus_width = width;
1005
1006 mmc_set_ios(mmc);
1007}
1008
1009static int mmc_startup(struct mmc *mmc)
1010{
1011 int err, i;
1012 uint mult, freq;
1013 u64 cmult, csize, capacity;
1014 struct mmc_cmd cmd;
1015 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
1016 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
1017 int timeout = 1000;
1018 bool has_parts = false;
1019 bool part_completed;
1020
1021#ifdef CONFIG_MMC_SPI_CRC_ON
1022 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
1023 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
1024 cmd.resp_type = MMC_RSP_R1;
1025 cmd.cmdarg = 1;
1026 err = mmc_send_cmd(mmc, &cmd, NULL);
1027
1028 if (err)
1029 return err;
1030 }
1031#endif
1032
1033 /* Put the Card in Identify Mode */
1034 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
1035 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
1036 cmd.resp_type = MMC_RSP_R2;
1037 cmd.cmdarg = 0;
1038
1039 err = mmc_send_cmd(mmc, &cmd, NULL);
1040
1041 if (err)
1042 return err;
1043
1044 memcpy(mmc->cid, cmd.response, 16);
1045
1046 /*
1047 * For MMC cards, set the Relative Address.
1048 * For SD cards, get the Relatvie Address.
1049 * This also puts the cards into Standby State
1050 */
1051 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1052 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
1053 cmd.cmdarg = mmc->rca << 16;
1054 cmd.resp_type = MMC_RSP_R6;
1055
1056 err = mmc_send_cmd(mmc, &cmd, NULL);
1057
1058 if (err)
1059 return err;
1060
1061 if (IS_SD(mmc))
1062 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
1063 }
1064
1065 /* Get the Card-Specific Data */
1066 cmd.cmdidx = MMC_CMD_SEND_CSD;
1067 cmd.resp_type = MMC_RSP_R2;
1068 cmd.cmdarg = mmc->rca << 16;
1069
1070 err = mmc_send_cmd(mmc, &cmd, NULL);
1071
1072 /* Waiting for the ready status */
1073 mmc_send_status(mmc, timeout);
1074
1075 if (err)
1076 return err;
1077
1078 mmc->csd[0] = cmd.response[0];
1079 mmc->csd[1] = cmd.response[1];
1080 mmc->csd[2] = cmd.response[2];
1081 mmc->csd[3] = cmd.response[3];
1082
1083 if (mmc->version == MMC_VERSION_UNKNOWN) {
1084 int version = (cmd.response[0] >> 26) & 0xf;
1085
1086 switch (version) {
1087 case 0:
1088 mmc->version = MMC_VERSION_1_2;
1089 break;
1090 case 1:
1091 mmc->version = MMC_VERSION_1_4;
1092 break;
1093 case 2:
1094 mmc->version = MMC_VERSION_2_2;
1095 break;
1096 case 3:
1097 mmc->version = MMC_VERSION_3;
1098 break;
1099 case 4:
1100 mmc->version = MMC_VERSION_4;
1101 break;
1102 default:
1103 mmc->version = MMC_VERSION_1_2;
1104 break;
1105 }
1106 }
1107
1108 /* divide frequency by 10, since the mults are 10x bigger */
1109 freq = fbase[(cmd.response[0] & 0x7)];
1110 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
1111
1112 mmc->tran_speed = freq * mult;
1113
1114 mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
1115 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
1116
1117 if (IS_SD(mmc))
1118 mmc->write_bl_len = mmc->read_bl_len;
1119 else
1120 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
1121
1122 if (mmc->high_capacity) {
1123 csize = (mmc->csd[1] & 0x3f) << 16
1124 | (mmc->csd[2] & 0xffff0000) >> 16;
1125 cmult = 8;
1126 } else {
1127 csize = (mmc->csd[1] & 0x3ff) << 2
1128 | (mmc->csd[2] & 0xc0000000) >> 30;
1129 cmult = (mmc->csd[2] & 0x00038000) >> 15;
1130 }
1131
1132 mmc->capacity_user = (csize + 1) << (cmult + 2);
1133 mmc->capacity_user *= mmc->read_bl_len;
1134 mmc->capacity_boot = 0;
1135 mmc->capacity_rpmb = 0;
1136 for (i = 0; i < 4; i++)
1137 mmc->capacity_gp[i] = 0;
1138
1139 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
1140 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1141
1142 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
1143 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1144
1145 if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
1146 cmd.cmdidx = MMC_CMD_SET_DSR;
1147 cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
1148 cmd.resp_type = MMC_RSP_NONE;
1149 if (mmc_send_cmd(mmc, &cmd, NULL))
1150 printf("MMC: SET_DSR failed\n");
1151 }
1152
1153 /* Select the card, and put it into Transfer Mode */
1154 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1155 cmd.cmdidx = MMC_CMD_SELECT_CARD;
1156 cmd.resp_type = MMC_RSP_R1;
1157 cmd.cmdarg = mmc->rca << 16;
1158 err = mmc_send_cmd(mmc, &cmd, NULL);
1159
1160 if (err)
1161 return err;
1162 }
1163
1164 /*
1165 * For SD, its erase group is always one sector
1166 */
1167 mmc->erase_grp_size = 1;
1168 mmc->part_config = MMCPART_NOAVAILABLE;
1169 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
1170 /* check ext_csd version and capacity */
1171 err = mmc_send_ext_csd(mmc, ext_csd);
1172 if (err)
1173 return err;
1174 if (ext_csd[EXT_CSD_REV] >= 2) {
1175 /*
1176 * According to the JEDEC Standard, the value of
1177 * ext_csd's capacity is valid if the value is more
1178 * than 2GB
1179 */
1180 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
1181 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
1182 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
1183 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
1184 capacity *= MMC_MAX_BLOCK_LEN;
1185 if ((capacity >> 20) > 2 * 1024)
1186 mmc->capacity_user = capacity;
1187 }
1188
1189 switch (ext_csd[EXT_CSD_REV]) {
1190 case 1:
1191 mmc->version = MMC_VERSION_4_1;
1192 break;
1193 case 2:
1194 mmc->version = MMC_VERSION_4_2;
1195 break;
1196 case 3:
1197 mmc->version = MMC_VERSION_4_3;
1198 break;
1199 case 5:
1200 mmc->version = MMC_VERSION_4_41;
1201 break;
1202 case 6:
1203 mmc->version = MMC_VERSION_4_5;
1204 break;
1205 case 7:
1206 mmc->version = MMC_VERSION_5_0;
1207 break;
1208 }
1209
1210 /* The partition data may be non-zero but it is only
1211 * effective if PARTITION_SETTING_COMPLETED is set in
1212 * EXT_CSD, so ignore any data if this bit is not set,
1213 * except for enabling the high-capacity group size
1214 * definition (see below). */
1215 part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] &
1216 EXT_CSD_PARTITION_SETTING_COMPLETED);
1217
1218 /* store the partition info of emmc */
1219 mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
1220 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
1221 ext_csd[EXT_CSD_BOOT_MULT])
1222 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
1223 if (part_completed &&
1224 (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
1225 mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
1226
1227 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
1228
1229 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
1230
1231 for (i = 0; i < 4; i++) {
1232 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
1233 uint mult = (ext_csd[idx + 2] << 16) +
1234 (ext_csd[idx + 1] << 8) + ext_csd[idx];
1235 if (mult)
1236 has_parts = true;
1237 if (!part_completed)
1238 continue;
1239 mmc->capacity_gp[i] = mult;
1240 mmc->capacity_gp[i] *=
1241 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1242 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1243 mmc->capacity_gp[i] <<= 19;
1244 }
1245
1246 if (part_completed) {
1247 mmc->enh_user_size =
1248 (ext_csd[EXT_CSD_ENH_SIZE_MULT+2] << 16) +
1249 (ext_csd[EXT_CSD_ENH_SIZE_MULT+1] << 8) +
1250 ext_csd[EXT_CSD_ENH_SIZE_MULT];
1251 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1252 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1253 mmc->enh_user_size <<= 19;
1254 mmc->enh_user_start =
1255 (ext_csd[EXT_CSD_ENH_START_ADDR+3] << 24) +
1256 (ext_csd[EXT_CSD_ENH_START_ADDR+2] << 16) +
1257 (ext_csd[EXT_CSD_ENH_START_ADDR+1] << 8) +
1258 ext_csd[EXT_CSD_ENH_START_ADDR];
1259 if (mmc->high_capacity)
1260 mmc->enh_user_start <<= 9;
1261 }
1262
1263 /*
1264 * Host needs to enable ERASE_GRP_DEF bit if device is
1265 * partitioned. This bit will be lost every time after a reset
1266 * or power off. This will affect erase size.
1267 */
1268 if (part_completed)
1269 has_parts = true;
1270 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
1271 (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB))
1272 has_parts = true;
1273 if (has_parts) {
1274 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1275 EXT_CSD_ERASE_GROUP_DEF, 1);
1276
1277 if (err)
1278 return err;
1279 else
1280 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
1281 }
1282
1283 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
1284 /* Read out group size from ext_csd */
1285 mmc->erase_grp_size =
1286 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
1287 /*
1288 * if high capacity and partition setting completed
1289 * SEC_COUNT is valid even if it is smaller than 2 GiB
1290 * JEDEC Standard JESD84-B45, 6.2.4
1291 */
1292 if (mmc->high_capacity && part_completed) {
1293 capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
1294 (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
1295 (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
1296 (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
1297 capacity *= MMC_MAX_BLOCK_LEN;
1298 mmc->capacity_user = capacity;
1299 }
1300 } else {
1301 /* Calculate the group size from the csd value. */
1302 int erase_gsz, erase_gmul;
1303 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1304 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1305 mmc->erase_grp_size = (erase_gsz + 1)
1306 * (erase_gmul + 1);
1307 }
1308
1309 mmc->hc_wp_grp_size = 1024
1310 * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1311 * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1312
1313 mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
1314 }
1315
1316 err = mmc_set_capacity(mmc, mmc->part_num);
1317 if (err)
1318 return err;
1319
1320 if (IS_SD(mmc))
1321 err = sd_change_freq(mmc);
1322 else
1323 err = mmc_change_freq(mmc);
1324
1325 if (err)
1326 return err;
1327
1328 /* Restrict card's capabilities by what the host can do */
1329 mmc->card_caps &= mmc->cfg->host_caps;
1330
1331 if (IS_SD(mmc)) {
1332 if (mmc->card_caps & MMC_MODE_4BIT) {
1333 cmd.cmdidx = MMC_CMD_APP_CMD;
1334 cmd.resp_type = MMC_RSP_R1;
1335 cmd.cmdarg = mmc->rca << 16;
1336
1337 err = mmc_send_cmd(mmc, &cmd, NULL);
1338 if (err)
1339 return err;
1340
1341 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1342 cmd.resp_type = MMC_RSP_R1;
1343 cmd.cmdarg = 2;
1344 err = mmc_send_cmd(mmc, &cmd, NULL);
1345 if (err)
1346 return err;
1347
1348 mmc_set_bus_width(mmc, 4);
1349 }
1350
1351 if (mmc->card_caps & MMC_MODE_HS)
1352 mmc->tran_speed = 50000000;
1353 else
1354 mmc->tran_speed = 25000000;
1355 } else if (mmc->version >= MMC_VERSION_4) {
1356 /* Only version 4 of MMC supports wider bus widths */
1357 int idx;
1358
1359 /* An array of possible bus widths in order of preference */
1360 static unsigned ext_csd_bits[] = {
1361 EXT_CSD_DDR_BUS_WIDTH_8,
1362 EXT_CSD_DDR_BUS_WIDTH_4,
1363 EXT_CSD_BUS_WIDTH_8,
1364 EXT_CSD_BUS_WIDTH_4,
1365 EXT_CSD_BUS_WIDTH_1,
1366 };
1367
1368 /* An array to map CSD bus widths to host cap bits */
1369 static unsigned ext_to_hostcaps[] = {
1370 [EXT_CSD_DDR_BUS_WIDTH_4] =
1371 MMC_MODE_DDR_52MHz | MMC_MODE_4BIT,
1372 [EXT_CSD_DDR_BUS_WIDTH_8] =
1373 MMC_MODE_DDR_52MHz | MMC_MODE_8BIT,
1374 [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
1375 [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
1376 };
1377
1378 /* An array to map chosen bus width to an integer */
1379 static unsigned widths[] = {
1380 8, 4, 8, 4, 1,
1381 };
1382
1383 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
1384 unsigned int extw = ext_csd_bits[idx];
1385 unsigned int caps = ext_to_hostcaps[extw];
1386
1387 /*
1388 * If the bus width is still not changed,
1389 * don't try to set the default again.
1390 * Otherwise, recover from switch attempts
1391 * by switching to 1-bit bus width.
1392 */
1393 if (extw == EXT_CSD_BUS_WIDTH_1 &&
1394 mmc->bus_width == 1) {
1395 err = 0;
1396 break;
1397 }
1398
1399 /*
1400 * Check to make sure the card and controller support
1401 * these capabilities
1402 */
1403 if ((mmc->card_caps & caps) != caps)
1404 continue;
1405
1406 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1407 EXT_CSD_BUS_WIDTH, extw);
1408
1409 if (err)
1410 continue;
1411
1412 mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0;
1413 mmc_set_bus_width(mmc, widths[idx]);
1414
1415 err = mmc_send_ext_csd(mmc, test_csd);
1416
1417 if (err)
1418 continue;
1419
1420 /* Only compare read only fields */
1421 if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
1422 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
1423 ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
1424 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
1425 ext_csd[EXT_CSD_REV]
1426 == test_csd[EXT_CSD_REV] &&
1427 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1428 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
1429 memcmp(&ext_csd[EXT_CSD_SEC_CNT],
1430 &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
1431 break;
1432 else
1433 err = SWITCH_ERR;
1434 }
1435
1436 if (err)
1437 return err;
1438
1439 if (mmc->card_caps & MMC_MODE_HS) {
1440 if (mmc->card_caps & MMC_MODE_HS_52MHz)
1441 mmc->tran_speed = 52000000;
1442 else
1443 mmc->tran_speed = 26000000;
1444 }
1445 }
1446
1447 mmc_set_clock(mmc, mmc->tran_speed);
1448
1449 /* Fix the block length for DDR mode */
1450 if (mmc->ddr_mode) {
1451 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1452 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1453 }
1454
1455 /* fill in device description */
1456 mmc->block_dev.lun = 0;
1457 mmc->block_dev.type = 0;
1458 mmc->block_dev.blksz = mmc->read_bl_len;
1459 mmc->block_dev.log2blksz = LOG2(mmc->block_dev.blksz);
1460 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
1461#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1462 sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x",
1463 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1464 (mmc->cid[3] >> 16) & 0xffff);
1465 sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
1466 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1467 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1468 (mmc->cid[2] >> 24) & 0xff);
1469 sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
1470 (mmc->cid[2] >> 16) & 0xf);
1471#else
1472 mmc->block_dev.vendor[0] = 0;
1473 mmc->block_dev.product[0] = 0;
1474 mmc->block_dev.revision[0] = 0;
1475#endif
1476#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
1477 init_part(&mmc->block_dev);
1478#endif
1479
1480 return 0;
1481}
1482
1483static int mmc_send_if_cond(struct mmc *mmc)
1484{
1485 struct mmc_cmd cmd;
1486 int err;
1487
1488 cmd.cmdidx = SD_CMD_SEND_IF_COND;
1489 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
1490 cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
1491 cmd.resp_type = MMC_RSP_R7;
1492
1493 err = mmc_send_cmd(mmc, &cmd, NULL);
1494
1495 if (err)
1496 return err;
1497
1498 if ((cmd.response[0] & 0xff) != 0xaa)
1499 return UNUSABLE_ERR;
1500 else
1501 mmc->version = SD_VERSION_2;
1502
1503 return 0;
1504}
1505
1506/* not used any more */
1507int __deprecated mmc_register(struct mmc *mmc)
1508{
1509#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1510 printf("%s is deprecated! use mmc_create() instead.\n", __func__);
1511#endif
1512 return -1;
1513}
1514
1515struct mmc *mmc_create(const struct mmc_config *cfg, void *priv)
1516{
1517 struct mmc *mmc;
1518
1519 /* quick validation */
1520 if (cfg == NULL || cfg->ops == NULL || cfg->ops->send_cmd == NULL ||
1521 cfg->f_min == 0 || cfg->f_max == 0 || cfg->b_max == 0)
1522 return NULL;
1523
1524 mmc = calloc(1, sizeof(*mmc));
1525 if (mmc == NULL)
1526 return NULL;
1527
1528 mmc->cfg = cfg;
1529 mmc->priv = priv;
1530
1531 /* the following chunk was mmc_register() */
1532
1533 /* Setup dsr related values */
1534 mmc->dsr_imp = 0;
1535 mmc->dsr = 0xffffffff;
1536 /* Setup the universal parts of the block interface just once */
1537 mmc->block_dev.if_type = IF_TYPE_MMC;
1538 mmc->block_dev.dev = cur_dev_num++;
1539 mmc->block_dev.removable = 1;
1540 mmc->block_dev.block_read = mmc_bread;
1541 mmc->block_dev.block_write = mmc_bwrite;
1542 mmc->block_dev.block_erase = mmc_berase;
1543
1544 /* setup initial part type */
1545 mmc->block_dev.part_type = mmc->cfg->part_type;
1546
1547 INIT_LIST_HEAD(&mmc->link);
1548
1549 list_add_tail(&mmc->link, &mmc_devices);
1550
1551 return mmc;
1552}
1553
1554void mmc_destroy(struct mmc *mmc)
1555{
1556 /* only freeing memory for now */
1557 free(mmc);
1558}
1559
1560#ifdef CONFIG_PARTITIONS
1561block_dev_desc_t *mmc_get_dev(int dev)
1562{
1563 struct mmc *mmc = find_mmc_device(dev);
1564 if (!mmc || mmc_init(mmc))
1565 return NULL;
1566
1567 return &mmc->block_dev;
1568}
1569#endif
1570
1571/* board-specific MMC power initializations. */
1572__weak void board_mmc_power_init(void)
1573{
1574}
1575
1576int mmc_start_init(struct mmc *mmc)
1577{
1578 int err;
1579
1580 /* we pretend there's no card when init is NULL */
1581 if (mmc_getcd(mmc) == 0 || mmc->cfg->ops->init == NULL) {
1582 mmc->has_init = 0;
1583#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1584 printf("MMC: no card present\n");
1585#endif
1586 return NO_CARD_ERR;
1587 }
1588
1589 if (mmc->has_init)
1590 return 0;
1591
1592 board_mmc_power_init();
1593
1594 /* made sure it's not NULL earlier */
1595 err = mmc->cfg->ops->init(mmc);
1596
1597 if (err)
1598 return err;
1599
1600 mmc->ddr_mode = 0;
1601 mmc_set_bus_width(mmc, 1);
1602 mmc_set_clock(mmc, 1);
1603
1604 /* Reset the Card */
1605 err = mmc_go_idle(mmc);
1606
1607 if (err)
1608 return err;
1609
1610 /* The internal partition reset to user partition(0) at every CMD0*/
1611 mmc->part_num = 0;
1612
1613 /* Test for SD version 2 */
1614 err = mmc_send_if_cond(mmc);
1615
1616 /* Now try to get the SD card's operating condition */
1617 err = sd_send_op_cond(mmc);
1618
1619 /* If the command timed out, we check for an MMC card */
1620 if (err == TIMEOUT) {
1621 err = mmc_send_op_cond(mmc);
1622
1623 if (err && err != IN_PROGRESS) {
1624#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1625 printf("Card did not respond to voltage select!\n");
1626#endif
1627 return UNUSABLE_ERR;
1628 }
1629 }
1630
1631 if (err == IN_PROGRESS)
1632 mmc->init_in_progress = 1;
1633
1634 return err;
1635}
1636
1637static int mmc_complete_init(struct mmc *mmc)
1638{
1639 int err = 0;
1640
1641 if (mmc->op_cond_pending)
1642 err = mmc_complete_op_cond(mmc);
1643
1644 if (!err)
1645 err = mmc_startup(mmc);
1646 if (err)
1647 mmc->has_init = 0;
1648 else
1649 mmc->has_init = 1;
1650 mmc->init_in_progress = 0;
1651 return err;
1652}
1653
1654int mmc_init(struct mmc *mmc)
1655{
1656 int err = IN_PROGRESS;
1657 unsigned start;
1658
1659 if (mmc->has_init)
1660 return 0;
1661
1662 start = get_timer(0);
1663
1664 if (!mmc->init_in_progress)
1665 err = mmc_start_init(mmc);
1666
1667 if (!err || err == IN_PROGRESS)
1668 err = mmc_complete_init(mmc);
1669 debug("%s: %d, time %lu\n", __func__, err, get_timer(start));
1670 return err;
1671}
1672
1673int mmc_set_dsr(struct mmc *mmc, u16 val)
1674{
1675 mmc->dsr = val;
1676 return 0;
1677}
1678
1679/* CPU-specific MMC initializations */
1680__weak int cpu_mmc_init(bd_t *bis)
1681{
1682 return -1;
1683}
1684
1685/* board-specific MMC initializations. */
1686__weak int board_mmc_init(bd_t *bis)
1687{
1688 return -1;
1689}
1690
1691#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1692
1693void print_mmc_devices(char separator)
1694{
1695 struct mmc *m;
1696 struct list_head *entry;
1697 char *mmc_type;
1698
1699 list_for_each(entry, &mmc_devices) {
1700 m = list_entry(entry, struct mmc, link);
1701
1702 if (m->has_init)
1703 mmc_type = IS_SD(m) ? "SD" : "eMMC";
1704 else
1705 mmc_type = NULL;
1706
1707 printf("%s: %d", m->cfg->name, m->block_dev.dev);
1708 if (mmc_type)
1709 printf(" (%s)", mmc_type);
1710
1711 if (entry->next != &mmc_devices) {
1712 printf("%c", separator);
1713 if (separator != '\n')
1714 puts (" ");
1715 }
1716 }
1717
1718 printf("\n");
1719}
1720
1721#else
1722void print_mmc_devices(char separator) { }
1723#endif
1724
1725int get_mmc_num(void)
1726{
1727 return cur_dev_num;
1728}
1729
1730void mmc_set_preinit(struct mmc *mmc, int preinit)
1731{
1732 mmc->preinit = preinit;
1733}
1734
1735static void do_preinit(void)
1736{
1737 struct mmc *m;
1738 struct list_head *entry;
1739
1740 list_for_each(entry, &mmc_devices) {
1741 m = list_entry(entry, struct mmc, link);
1742
1743 if (m->preinit)
1744 mmc_start_init(m);
1745 }
1746}
1747
1748
1749int mmc_initialize(bd_t *bis)
1750{
1751 INIT_LIST_HEAD (&mmc_devices);
1752 cur_dev_num = 0;
1753
1754 if (board_mmc_init(bis) < 0)
1755 cpu_mmc_init(bis);
1756
1757#ifndef CONFIG_SPL_BUILD
1758 print_mmc_devices(',');
1759#endif
1760
1761 do_preinit();
1762 return 0;
1763}
1764
1765#ifdef CONFIG_SUPPORT_EMMC_BOOT
1766/*
1767 * This function changes the size of boot partition and the size of rpmb
1768 * partition present on EMMC devices.
1769 *
1770 * Input Parameters:
1771 * struct *mmc: pointer for the mmc device strcuture
1772 * bootsize: size of boot partition
1773 * rpmbsize: size of rpmb partition
1774 *
1775 * Returns 0 on success.
1776 */
1777
1778int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
1779 unsigned long rpmbsize)
1780{
1781 int err;
1782 struct mmc_cmd cmd;
1783
1784 /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */
1785 cmd.cmdidx = MMC_CMD_RES_MAN;
1786 cmd.resp_type = MMC_RSP_R1b;
1787 cmd.cmdarg = MMC_CMD62_ARG1;
1788
1789 err = mmc_send_cmd(mmc, &cmd, NULL);
1790 if (err) {
1791 debug("mmc_boot_partition_size_change: Error1 = %d\n", err);
1792 return err;
1793 }
1794
1795 /* Boot partition changing mode */
1796 cmd.cmdidx = MMC_CMD_RES_MAN;
1797 cmd.resp_type = MMC_RSP_R1b;
1798 cmd.cmdarg = MMC_CMD62_ARG2;
1799
1800 err = mmc_send_cmd(mmc, &cmd, NULL);
1801 if (err) {
1802 debug("mmc_boot_partition_size_change: Error2 = %d\n", err);
1803 return err;
1804 }
1805 /* boot partition size is multiple of 128KB */
1806 bootsize = (bootsize * 1024) / 128;
1807
1808 /* Arg: boot partition size */
1809 cmd.cmdidx = MMC_CMD_RES_MAN;
1810 cmd.resp_type = MMC_RSP_R1b;
1811 cmd.cmdarg = bootsize;
1812
1813 err = mmc_send_cmd(mmc, &cmd, NULL);
1814 if (err) {
1815 debug("mmc_boot_partition_size_change: Error3 = %d\n", err);
1816 return err;
1817 }
1818 /* RPMB partition size is multiple of 128KB */
1819 rpmbsize = (rpmbsize * 1024) / 128;
1820 /* Arg: RPMB partition size */
1821 cmd.cmdidx = MMC_CMD_RES_MAN;
1822 cmd.resp_type = MMC_RSP_R1b;
1823 cmd.cmdarg = rpmbsize;
1824
1825 err = mmc_send_cmd(mmc, &cmd, NULL);
1826 if (err) {
1827 debug("mmc_boot_partition_size_change: Error4 = %d\n", err);
1828 return err;
1829 }
1830 return 0;
1831}
1832
1833/*
1834 * Modify EXT_CSD[177] which is BOOT_BUS_WIDTH
1835 * based on the passed in values for BOOT_BUS_WIDTH, RESET_BOOT_BUS_WIDTH
1836 * and BOOT_MODE.
1837 *
1838 * Returns 0 on success.
1839 */
1840int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode)
1841{
1842 int err;
1843
1844 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH,
1845 EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) |
1846 EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) |
1847 EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width));
1848
1849 if (err)
1850 return err;
1851 return 0;
1852}
1853
1854/*
1855 * Modify EXT_CSD[179] which is PARTITION_CONFIG (formerly BOOT_CONFIG)
1856 * based on the passed in values for BOOT_ACK, BOOT_PARTITION_ENABLE and
1857 * PARTITION_ACCESS.
1858 *
1859 * Returns 0 on success.
1860 */
1861int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
1862{
1863 int err;
1864
1865 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
1866 EXT_CSD_BOOT_ACK(ack) |
1867 EXT_CSD_BOOT_PART_NUM(part_num) |
1868 EXT_CSD_PARTITION_ACCESS(access));
1869
1870 if (err)
1871 return err;
1872 return 0;
1873}
1874
1875/*
1876 * Modify EXT_CSD[162] which is RST_n_FUNCTION based on the given value
1877 * for enable. Note that this is a write-once field for non-zero values.
1878 *
1879 * Returns 0 on success.
1880 */
1881int mmc_set_rst_n_function(struct mmc *mmc, u8 enable)
1882{
1883 return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_RST_N_FUNCTION,
1884 enable);
1885}
1886#endif
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