| | 1 | /* |
| | 2 | * (C) Copyright 2001 |
| | 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| | 4 | * |
| | 5 | * SPDX-License-Identifier: GPL-2.0+ |
| | 6 | */ |
| | 7 | |
| | 8 | /* |
| | 9 | * board/config.h - configuration options, board specific |
| | 10 | */ |
| | 11 | |
| | 12 | #ifndef __CONFIG_H |
| | 13 | #define __CONFIG_H |
| | 14 | |
| | 15 | /*********************************************************** |
| | 16 | * High Level Configuration Options |
| | 17 | * (easy to change) |
| | 18 | ***********************************************************/ |
| | 19 | #define CONFIG_405GP 1 /* This is a PPC405 CPU */ |
| | 20 | #define CONFIG_PIP405 1 /* ...on a PIP405 board */ |
| | 21 | |
| | 22 | #define CONFIG_SYS_TEXT_BASE 0xFFF80000 |
| | 23 | |
| | 24 | /*********************************************************** |
| | 25 | * Clock |
| | 26 | ***********************************************************/ |
| | 27 | #define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */ |
| | 28 | |
| | 29 | /* |
| | 30 | * BOOTP options |
| | 31 | */ |
| | 32 | #define CONFIG_BOOTP_BOOTFILESIZE |
| | 33 | #define CONFIG_BOOTP_BOOTPATH |
| | 34 | #define CONFIG_BOOTP_GATEWAY |
| | 35 | #define CONFIG_BOOTP_HOSTNAME |
| | 36 | |
| | 37 | /* |
| | 38 | * Command line configuration. |
| | 39 | */ |
| | 40 | #define CONFIG_CMD_PCI |
| | 41 | #define CONFIG_CMD_REGINFO |
| | 42 | #define CONFIG_SCSI |
| | 43 | #define CONFIG_CMD_SDRAM |
| | 44 | #define CONFIG_CMD_SAVES |
| | 45 | |
| | 46 | /************************************************************** |
| | 47 | * I2C Stuff: |
| | 48 | * the PIP405 is equiped with an Atmel 24C128/256 EEPROM at address |
| | 49 | * 0x53. |
| | 50 | * Caution: on the same bus is the SPD (Serial Presens Detect |
| | 51 | * EEPROM of the SDRAM |
| | 52 | * The Atmel EEPROM uses 16Bit addressing. |
| | 53 | ***************************************************************/ |
| | 54 | #define CONFIG_SYS_I2C |
| | 55 | #define CONFIG_SYS_I2C_PPC4XX |
| | 56 | #define CONFIG_SYS_I2C_PPC4XX_CH0 |
| | 57 | #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 50000 |
| | 58 | #define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F |
| | 59 | |
| | 60 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x53 |
| | 61 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 |
| | 62 | #define CONFIG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */ |
| | 63 | #define CONFIG_ENV_OFFSET 0x000 /* environment starts at the beginning of the EEPROM */ |
| | 64 | #define CONFIG_ENV_SIZE 0x800 /* 2 kBytes may be used for env vars */ |
| | 65 | |
| | 66 | #undef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW |
| | 67 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* The Atmel 24C128/256 has */ |
| | 68 | /* 64 byte page write mode using*/ |
| | 69 | /* last 6 bits of the address */ |
| | 70 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ |
| | 71 | |
| | 72 | /*************************************************************** |
| | 73 | * Definitions for Serial Presence Detect EEPROM address |
| | 74 | * (to get SDRAM settings) |
| | 75 | ***************************************************************/ |
| | 76 | #define SPD_EEPROM_ADDRESS 0x50 |
| | 77 | |
| | 78 | #define CONFIG_BOARD_EARLY_INIT_R |
| | 79 | |
| | 80 | /************************************************************** |
| | 81 | * Environment definitions |
| | 82 | **************************************************************/ |
| | 83 | |
| | 84 | /* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */ |
| | 85 | /* #define CONFIG_BOOT_RETRY_TIME -10 /XXX* feature is available but not enabled */ |
| | 86 | |
| | 87 | #define CONFIG_BOOTCOMMAND "diskboot 400000 0:1; bootm" /* autoboot command */ |
| | 88 | #define CONFIG_BOOTARGS "console=ttyS0,9600 root=/dev/hda5" /* boot arguments */ |
| | 89 | |
| | 90 | #define CONFIG_IPADDR 10.0.0.100 |
| | 91 | #define CONFIG_SERVERIP 10.0.0.1 |
| | 92 | #define CONFIG_PREBOOT |
| | 93 | /*************************************************************** |
| | 94 | * defines if an overwrite_console function exists |
| | 95 | *************************************************************/ |
| | 96 | /*************************************************************** |
| | 97 | * defines if the overwrite_console should be stored in the |
| | 98 | * environment |
| | 99 | **************************************************************/ |
| | 100 | |
| | 101 | /************************************************************** |
| | 102 | * loads config |
| | 103 | *************************************************************/ |
| | 104 | #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ |
| | 105 | #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ |
| | 106 | |
| | 107 | #define CONFIG_MISC_INIT_R |
| | 108 | /*********************************************************** |
| | 109 | * Miscellaneous configurable options |
| | 110 | **********************************************************/ |
| | 111 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
| | 112 | #if defined(CONFIG_CMD_KGDB) |
| | 113 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
| | 114 | #else |
| | 115 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
| | 116 | #endif |
| | 117 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ |
| | 118 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| | 119 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ |
| | 120 | |
| | 121 | #define CONFIG_SYS_MEMTEST_START 0x0100000 /* memtest works on */ |
| | 122 | #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 1 ... 12 MB in DRAM */ |
| | 123 | |
| | 124 | #define CONFIG_CONS_INDEX 1 /* Use UART0 */ |
| | 125 | #define CONFIG_SYS_NS16550_SERIAL |
| | 126 | #define CONFIG_SYS_NS16550_REG_SIZE 1 |
| | 127 | #define CONFIG_SYS_NS16550_CLK get_serial_clock() |
| | 128 | |
| | 129 | #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */ |
| | 130 | #define CONFIG_SYS_BASE_BAUD 691200 |
| | 131 | |
| | 132 | /* The following table includes the supported baudrates */ |
| | 133 | #define CONFIG_SYS_BAUDRATE_TABLE \ |
| | 134 | { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ |
| | 135 | 57600, 115200, 230400, 460800, 921600 } |
| | 136 | |
| | 137 | #define CONFIG_SYS_LOAD_ADDR 0x400000 /* default load address */ |
| | 138 | #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */ |
| | 139 | |
| | 140 | /*----------------------------------------------------------------------- |
| | 141 | * PCI stuff |
| | 142 | *----------------------------------------------------------------------- |
| | 143 | */ |
| | 144 | #define PCI_HOST_ADAPTER 0 /* configure ar pci adapter */ |
| | 145 | #define PCI_HOST_FORCE 1 /* configure as pci host */ |
| | 146 | #define PCI_HOST_AUTO 2 /* detected via arbiter enable */ |
| | 147 | |
| | 148 | #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ |
| | 149 | #define CONFIG_PCI_HOST PCI_HOST_FORCE /* configure as pci-host */ |
| | 150 | /* resource configuration */ |
| | 151 | #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x0000 /* PCI Vendor ID: to-do!!! */ |
| | 152 | #define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0x0000 /* PCI Device ID: to-do!!! */ |
| | 153 | #define CONFIG_SYS_PCI_PTM1LA 0x00000000 /* point to sdram */ |
| | 154 | #define CONFIG_SYS_PCI_PTM1MS 0x80000001 /* 2GB, enable hard-wired to 1 */ |
| | 155 | #define CONFIG_SYS_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */ |
| | 156 | #define CONFIG_SYS_PCI_PTM2LA 0x00000000 /* disabled */ |
| | 157 | #define CONFIG_SYS_PCI_PTM2MS 0x00000000 /* disabled */ |
| | 158 | #define CONFIG_SYS_PCI_PTM2PCI 0x00000000 /* Host: use this pci address */ |
| | 159 | |
| | 160 | /*----------------------------------------------------------------------- |
| | 161 | * Start addresses for the final memory configuration |
| | 162 | * (Set up by the startup code) |
| | 163 | * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 |
| | 164 | */ |
| | 165 | #define CONFIG_SYS_SDRAM_BASE 0x00000000 |
| | 166 | #define CONFIG_SYS_FLASH_BASE 0xFFF80000 |
| | 167 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE |
| | 168 | #define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Monitor */ |
| | 169 | #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserve 1024 kB for malloc() */ |
| | 170 | |
| | 171 | /* |
| | 172 | * For booting Linux, the board info and command line data |
| | 173 | * have to be in the first 8 MB of memory, since this is |
| | 174 | * the maximum mapped by the Linux kernel during initialization. |
| | 175 | */ |
| | 176 | #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ |
| | 177 | /*----------------------------------------------------------------------- |
| | 178 | * FLASH organization |
| | 179 | */ |
| | 180 | #define CONFIG_SYS_UPDATE_FLASH_SIZE |
| | 181 | #define CONFIG_SYS_FLASH_PROTECTION |
| | 182 | #define CONFIG_SYS_FLASH_EMPTY_INFO |
| | 183 | |
| | 184 | #define CONFIG_SYS_FLASH_CFI |
| | 185 | #define CONFIG_FLASH_CFI_DRIVER |
| | 186 | |
| | 187 | #define CONFIG_FLASH_SHOW_PROGRESS 45 |
| | 188 | |
| | 189 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
| | 190 | #define CONFIG_SYS_MAX_FLASH_SECT 256 |
| | 191 | |
| | 192 | /* |
| | 193 | * Init Memory Controller: |
| | 194 | */ |
| | 195 | #define FLASH_MAX_SIZE 0x00800000 /* 8MByte max */ |
| | 196 | #define FLASH_BASE_PRELIM 0xFF800000 /* open the flash CS */ |
| | 197 | /* Size: 0=1MB, 1=2MB, 2=4MB, 3=8MB, 4=16MB, 5=32MB, 6=64MB, 7=128MB */ |
| | 198 | #define FLASH_SIZE_PRELIM 3 /* maximal flash FLASH size bank #0 */ |
| | 199 | |
| | 200 | /* Configuration Port location */ |
| | 201 | #define CONFIG_PORT_ADDR 0xF4000000 |
| | 202 | #define MULTI_PURPOSE_SOCKET_ADDR 0xF8000000 |
| | 203 | |
| | 204 | /*----------------------------------------------------------------------- |
| | 205 | * Definitions for initial stack pointer and data area (in On Chip SRAM) |
| | 206 | */ |
| | 207 | #define CONFIG_SYS_TEMP_STACK_OCM 1 |
| | 208 | #define CONFIG_SYS_OCM_DATA_ADDR 0xF0000000 |
| | 209 | #define CONFIG_SYS_OCM_DATA_SIZE 0x1000 |
| | 210 | #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* inside of On Chip SRAM */ |
| | 211 | #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_OCM_DATA_SIZE /* Size of On Chip SRAM */ |
| | 212 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
| | 213 | #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET |
| | 214 | |
| | 215 | /*********************************************************************** |
| | 216 | * External peripheral base address |
| | 217 | ***********************************************************************/ |
| | 218 | #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0xE8000000 |
| | 219 | |
| | 220 | /*********************************************************************** |
| | 221 | * Last Stage Init |
| | 222 | ***********************************************************************/ |
| | 223 | #define CONFIG_LAST_STAGE_INIT |
| | 224 | /************************************************************ |
| | 225 | * Ethernet Stuff |
| | 226 | ***********************************************************/ |
| | 227 | #define CONFIG_PPC4xx_EMAC |
| | 228 | #define CONFIG_MII 1 /* MII PHY management */ |
| | 229 | #define CONFIG_PHY_ADDR 1 /* PHY address */ |
| | 230 | /************************************************************ |
| | 231 | * RTC |
| | 232 | ***********************************************************/ |
| | 233 | #define CONFIG_RTC_MC146818 |
| | 234 | #undef CONFIG_WATCHDOG /* watchdog disabled */ |
| | 235 | |
| | 236 | /************************************************************ |
| | 237 | * IDE/ATA stuff |
| | 238 | ************************************************************/ |
| | 239 | #define CONFIG_SYS_IDE_MAXBUS 2 /* max. 2 IDE busses */ |
| | 240 | #define CONFIG_SYS_IDE_MAXDEVICE (CONFIG_SYS_IDE_MAXBUS*2) /* max. 2 drives per IDE bus */ |
| | 241 | |
| | 242 | #define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS /* base address */ |
| | 243 | #define CONFIG_SYS_ATA_IDE0_OFFSET 0x01F0 /* ide0 offste */ |
| | 244 | #define CONFIG_SYS_ATA_IDE1_OFFSET 0x0170 /* ide1 offset */ |
| | 245 | #define CONFIG_SYS_ATA_DATA_OFFSET 0 /* data reg offset */ |
| | 246 | #define CONFIG_SYS_ATA_REG_OFFSET 0 /* reg offset */ |
| | 247 | #define CONFIG_SYS_ATA_ALT_OFFSET 0x200 /* alternate register offset */ |
| | 248 | |
| | 249 | #undef CONFIG_IDE_LED /* no led for ide supported */ |
| | 250 | #define CONFIG_IDE_RESET /* reset for ide supported... */ |
| | 251 | #define CONFIG_IDE_RESET_ROUTINE /* with a special reset function */ |
| | 252 | #define CONFIG_SUPPORT_VFAT |
| | 253 | |
| | 254 | /************************************************************ |
| | 255 | * ATAPI support (experimental) |
| | 256 | ************************************************************/ |
| | 257 | #define CONFIG_ATAPI /* enable ATAPI Support */ |
| | 258 | |
| | 259 | /************************************************************ |
| | 260 | * SCSI support (experimental) only SYM53C8xx supported |
| | 261 | ************************************************************/ |
| | 262 | #define CONFIG_SCSI_SYM53C8XX |
| | 263 | #define CONFIG_SYS_SCSI_MAX_LUN 8 /* number of supported LUNs */ |
| | 264 | #define CONFIG_SYS_SCSI_MAX_SCSI_ID 7 /* maximum SCSI ID (0..6) */ |
| | 265 | #define CONFIG_SYS_SCSI_MAX_DEVICE CONFIG_SYS_SCSI_MAX_SCSI_ID * CONFIG_SYS_SCSI_MAX_LUN /* maximum Target devices */ |
| | 266 | #define CONFIG_SYS_SCSI_SPIN_UP_TIME 2 |
| | 267 | |
| | 268 | /************************************************************ |
| | 269 | * Disk-On-Chip configuration |
| | 270 | ************************************************************/ |
| | 271 | #define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */ |
| | 272 | #define CONFIG_SYS_DOC_SHORT_TIMEOUT |
| | 273 | #define CONFIG_SYS_DOC_SUPPORT_2000 |
| | 274 | #define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM |
| | 275 | |
| | 276 | /************************************************************ |
| | 277 | * DISK Partition support |
| | 278 | ************************************************************/ |
| | 279 | |
| | 280 | /************************************************************ |
| | 281 | * Video support |
| | 282 | ************************************************************/ |
| | 283 | #define CONFIG_VIDEO_LOGO |
| | 284 | #define CONFIG_VIDEO_ONBOARD /* Video controller is on-board */ |
| | 285 | |
| | 286 | /************************************************************ |
| | 287 | * USB support |
| | 288 | ************************************************************/ |
| | 289 | #define CONFIG_USB_UHCI |
| | 290 | |
| | 291 | /* Enable needed helper functions */ |
| | 292 | |
| | 293 | /************************************************************ |
| | 294 | * Debug support |
| | 295 | ************************************************************/ |
| | 296 | #if defined(CONFIG_CMD_KGDB) |
| | 297 | #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ |
| | 298 | #endif |
| | 299 | |
| | 300 | /************************************************************ |
| | 301 | * support BZIP2 compression |
| | 302 | ************************************************************/ |
| | 303 | #define CONFIG_BZIP2 1 |
| | 304 | |
| | 305 | #endif /* __CONFIG_H */ |
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