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1 | /* | |
2 | * (C) Copyright 2005 | |
3 | * Stefan Roese, DENX Software Engineering, sr@denx.de. | |
4 | * John Otken, jotken@softadvances.com | |
5 | * | |
6 | * SPDX-License-Identifier: GPL-2.0+ | |
7 | */ | |
8 | ||
9 | /************************************************************************ | |
10 | * luan.h - configuration for LUAN board | |
11 | ***********************************************************************/ | |
12 | #ifndef __CONFIG_H | |
13 | #define __CONFIG_H | |
14 | ||
15 | /*----------------------------------------------------------------------- | |
16 | * High Level Configuration Options | |
17 | *----------------------------------------------------------------------*/ | |
18 | #define CONFIG_LUAN 1 /* Board is Luan */ | |
19 | #define CONFIG_440SP 1 /* Specific PPC440SP support */ | |
20 | #define CONFIG_440 1 | |
21 | #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ | |
22 | ||
23 | #define CONFIG_SYS_TEXT_BASE 0xFFFB0000 | |
24 | ||
25 | /* | |
26 | * Include common defines/options for all AMCC eval boards | |
27 | */ | |
28 | #define CONFIG_HOSTNAME luan | |
29 | #include "amcc-common.h" | |
30 | ||
31 | #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ | |
32 | ||
33 | /*----------------------------------------------------------------------- | |
34 | * Base addresses -- Note these are effective addresses where the | |
35 | * actual resources get mapped (not physical addresses) | |
36 | *----------------------------------------------------------------------*/ | |
37 | #define CONFIG_SYS_LARGE_FLASH 0xffc00000 /* 4MB flash address CS0 */ | |
38 | #define CONFIG_SYS_SMALL_FLASH 0xff900000 /* 1MB flash address CS2 */ | |
39 | #define CONFIG_SYS_SRAM_BASE 0xff800000 /* 1MB SRAM address CS2 */ | |
40 | #define CONFIG_SYS_SRAM_SIZE (1 << 20) | |
41 | #define CONFIG_SYS_EPLD_BASE 0xff000000 /* EPLD and FRAM CS1 */ | |
42 | ||
43 | #define CONFIG_SYS_ISRAM_BASE 0xf8000000 /* internal 8k SRAM (L2 cache) */ | |
44 | ||
45 | #define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */ | |
46 | #define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */ | |
47 | #define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE */ | |
48 | ||
49 | #if CONFIG_SYS_LARGE_FLASH == 0xffc00000 | |
50 | #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_LARGE_FLASH | |
51 | #else | |
52 | #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_SMALL_FLASH | |
53 | #endif | |
54 | ||
55 | #if CONFIG_SYS_SRAM_BASE | |
56 | #define CONFIG_SYS_KBYTES_SDRAM 1024*2 | |
57 | #else | |
58 | #define CONFIG_SYS_KBYTES_SDRAM 1024 | |
59 | #endif | |
60 | ||
61 | /*----------------------------------------------------------------------- | |
62 | * Initial RAM & stack pointer (placed in SDRAM) | |
63 | *----------------------------------------------------------------------*/ | |
64 | #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_ISRAM_BASE | |
65 | #define CONFIG_SYS_INIT_RAM_SIZE (8 << 10) | |
66 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
67 | #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET | |
68 | ||
69 | /*----------------------------------------------------------------------- | |
70 | * Serial Port | |
71 | *----------------------------------------------------------------------*/ | |
72 | #define CONFIG_CONS_INDEX 1 /* Use UART0 */ | |
73 | #define CONFIG_SYS_EXT_SERIAL_CLOCK 11059200 /* external 11.059MHz clk */ | |
74 | ||
75 | /*----------------------------------------------------------------------- | |
76 | * Environment | |
77 | *----------------------------------------------------------------------*/ | |
78 | /* | |
79 | * Define here the location of the environment variables (FLASH or EEPROM). | |
80 | * Note: DENX encourages to use redundant environment in FLASH. | |
81 | */ | |
82 | #define CONFIG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */ | |
83 | ||
84 | /*----------------------------------------------------------------------- | |
85 | * FLASH related | |
86 | *----------------------------------------------------------------------*/ | |
87 | #define CONFIG_SYS_MAX_FLASH_BANKS 3 /* max number of memory banks */ | |
88 | #define CONFIG_SYS_MAX_FLASH_SECT 64 /* max number of sectors on one chip */ | |
89 | ||
90 | #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ | |
91 | #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ | |
92 | ||
93 | #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ | |
94 | ||
95 | #define CONFIG_SYS_FLASH_ADDR0 0x555 | |
96 | #define CONFIG_SYS_FLASH_ADDR1 0x2aa | |
97 | #define CONFIG_SYS_FLASH_WORD_SIZE unsigned char | |
98 | ||
99 | #ifdef CONFIG_ENV_IS_IN_FLASH | |
100 | #define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */ | |
101 | #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE-CONFIG_ENV_SECT_SIZE) | |
102 | #define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */ | |
103 | ||
104 | /* Address and size of Redundant Environment Sector */ | |
105 | #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE) | |
106 | #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) | |
107 | #endif /* CONFIG_ENV_IS_IN_FLASH */ | |
108 | ||
109 | /*----------------------------------------------------------------------- | |
110 | * DDR SDRAM | |
111 | *----------------------------------------------------------------------*/ | |
112 | #define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup */ | |
113 | #define SPD_EEPROM_ADDRESS {0x53, 0x52} /* SPD i2c spd addresses*/ | |
114 | #define CONFIG_DDR_ECC 1 /* with ECC support */ | |
115 | ||
116 | /*----------------------------------------------------------------------- | |
117 | * I2C | |
118 | *----------------------------------------------------------------------*/ | |
119 | #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 | |
120 | ||
121 | #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1) | |
122 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 | |
123 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 | |
124 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 | |
125 | ||
126 | /* | |
127 | * Default environment variables | |
128 | */ | |
129 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
130 | CONFIG_AMCC_DEF_ENV \ | |
131 | CONFIG_AMCC_DEF_ENV_PPC \ | |
132 | CONFIG_AMCC_DEF_ENV_NOR_UPD \ | |
133 | "kernel_addr=fc000000\0" \ | |
134 | "ramdisk_addr=fc100000\0" \ | |
135 | "" | |
136 | ||
137 | #define CONFIG_HAS_ETH0 | |
138 | #define CONFIG_PHY_ADDR 1 | |
139 | #define CONFIG_CIS8201_PHY 1 /* Enable 'special' RGMII mode for Cicada phy */ | |
140 | #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ | |
141 | ||
142 | #ifdef DEBUG | |
143 | #define CONFIG_PANIC_HANG | |
144 | #else | |
145 | #define CONFIG_HW_WATCHDOG /* watchdog */ | |
146 | #endif | |
147 | ||
148 | /* | |
149 | * Commands additional to the ones defined in amcc-common.h | |
150 | */ | |
151 | #define CONFIG_CMD_PCI | |
152 | #define CONFIG_CMD_SDRAM | |
153 | ||
154 | /*----------------------------------------------------------------------- | |
155 | * PCI stuff | |
156 | *----------------------------------------------------------------------- | |
157 | */ | |
158 | #if defined(CONFIG_CMD_PCI) | |
159 | ||
160 | /* General PCI */ | |
161 | #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ | |
162 | #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ | |
163 | ||
164 | /* Board-specific PCI */ | |
165 | #define CONFIG_SYS_PCI_TARGET_INIT | |
166 | #undef CONFIG_SYS_PCI_MASTER_INIT | |
167 | ||
168 | #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */ | |
169 | #define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0x4403 /* whatever */ | |
170 | ||
171 | #endif | |
172 | ||
173 | #endif /* __CONFIG_H */ |