]>
Commit | Line | Data |
---|---|---|
1 | /* | |
2 | * (C) Copyright 2003 | |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | * | |
5 | * SPDX-License-Identifier: GPL-2.0+ | |
6 | */ | |
7 | ||
8 | /* | |
9 | * This file contains the configuration parameters for the dbau1x00 board. | |
10 | */ | |
11 | ||
12 | #ifndef __CONFIG_H | |
13 | #define __CONFIG_H | |
14 | ||
15 | #define CONFIG_PB1X00 1 | |
16 | #define CONFIG_SOC_AU1X00 1 /* alchemy series cpu */ | |
17 | ||
18 | #ifdef CONFIG_PB1000 | |
19 | #define CONFIG_SOC_AU1000 1 | |
20 | #else | |
21 | #ifdef CONFIG_PB1100 | |
22 | #define CONFIG_SOC_AU1100 1 | |
23 | #else | |
24 | #ifdef CONFIG_PB1500 | |
25 | #define CONFIG_SOC_AU1500 1 | |
26 | #else | |
27 | #error "No valid board set" | |
28 | #endif | |
29 | #endif | |
30 | #endif | |
31 | ||
32 | ||
33 | #define CONFIG_BAUDRATE 115200 | |
34 | ||
35 | #define CONFIG_TIMESTAMP /* Print image info with timestamp */ | |
36 | #undef CONFIG_BOOTARGS | |
37 | ||
38 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
39 | "addmisc=setenv bootargs ${bootargs} " \ | |
40 | "console=ttyS0,${baudrate} " \ | |
41 | "panic=1\0" \ | |
42 | "bootfile=/vmlinux.img\0" \ | |
43 | "load=tftp 80500000 ${u-boot}\0" \ | |
44 | "" | |
45 | /* Boot from NFS root */ | |
46 | #define CONFIG_BOOTCOMMAND "bootp; setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; bootm" | |
47 | ||
48 | /* | |
49 | * Miscellaneous configurable options | |
50 | */ | |
51 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ | |
52 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ | |
53 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ | |
54 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args*/ | |
55 | ||
56 | #define CONFIG_SYS_MALLOC_LEN 128*1024 | |
57 | ||
58 | #define CONFIG_SYS_BOOTPARAMS_LEN 128*1024 | |
59 | ||
60 | #define CONFIG_SYS_MIPS_TIMER_FREQ 396000000 | |
61 | ||
62 | #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */ | |
63 | ||
64 | #define CONFIG_SYS_LOAD_ADDR 0x81000000 /* default load address */ | |
65 | ||
66 | #define CONFIG_SYS_MEMTEST_START 0x80100000 | |
67 | #undef CONFIG_SYS_MEMTEST_START | |
68 | #define CONFIG_SYS_MEMTEST_START 0x80200000 | |
69 | #define CONFIG_SYS_MEMTEST_END 0x83800000 | |
70 | ||
71 | /*----------------------------------------------------------------------- | |
72 | * FLASH and environment organization | |
73 | */ | |
74 | #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ | |
75 | #define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */ | |
76 | ||
77 | #define PHYS_FLASH_1 0xbec00000 /* Flash Bank #1 */ | |
78 | #define PHYS_FLASH_2 0xbfc00000 /* Flash Bank #2 */ | |
79 | ||
80 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE | |
81 | #define CONFIG_SYS_MONITOR_LEN (192 << 10) | |
82 | ||
83 | #define CONFIG_SYS_INIT_SP_OFFSET 0x4000000 | |
84 | ||
85 | /* We boot from this flash, selected with dip switch */ | |
86 | #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_2 | |
87 | ||
88 | /* timeout values are in ticks */ | |
89 | #define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */ | |
90 | #define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */ | |
91 | ||
92 | #define CONFIG_ENV_IS_NOWHERE 1 | |
93 | ||
94 | /* Address and size of Primary Environment Sector */ | |
95 | #define CONFIG_ENV_ADDR 0xB0030000 | |
96 | #define CONFIG_ENV_SIZE 0x10000 | |
97 | ||
98 | #define CONFIG_FLASH_16BIT | |
99 | ||
100 | #define CONFIG_NR_DRAM_BANKS 2 | |
101 | ||
102 | #define CONFIG_MEMSIZE_IN_BYTES | |
103 | ||
104 | /*---USB -------------------------------------------*/ | |
105 | #if 0 | |
106 | #define CONFIG_USB_OHCI | |
107 | #define CONFIG_DOS_PARTITION | |
108 | #endif | |
109 | ||
110 | /*---ATA PCMCIA ------------------------------------*/ | |
111 | #if 0 | |
112 | #define CONFIG_SYS_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */ | |
113 | #define CONFIG_SYS_PCMCIA_MEM_ADDR 0x20000000 | |
114 | #define CONFIG_PCMCIA_SLOT_A | |
115 | ||
116 | #define CONFIG_ATAPI 1 | |
117 | #define CONFIG_MAC_PARTITION 1 | |
118 | ||
119 | /* We run CF in "true ide" mode or a harddrive via pcmcia */ | |
120 | #define CONFIG_IDE_PCMCIA 1 | |
121 | ||
122 | /* We only support one slot for now */ | |
123 | #define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */ | |
124 | #define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */ | |
125 | ||
126 | #undef CONFIG_IDE_LED /* LED for ide not supported */ | |
127 | #undef CONFIG_IDE_RESET /* reset for ide not supported */ | |
128 | ||
129 | #define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000 | |
130 | ||
131 | #define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_PCMCIA_MEM_ADDR | |
132 | ||
133 | /* Offset for data I/O */ | |
134 | #define CONFIG_SYS_ATA_DATA_OFFSET 8 | |
135 | ||
136 | /* Offset for normal register accesses */ | |
137 | #define CONFIG_SYS_ATA_REG_OFFSET 0 | |
138 | ||
139 | /* Offset for alternate registers */ | |
140 | #define CONFIG_SYS_ATA_ALT_OFFSET 0x0100 | |
141 | ||
142 | #endif | |
143 | ||
144 | /* | |
145 | * BOOTP options | |
146 | */ | |
147 | #define CONFIG_BOOTP_BOOTFILESIZE | |
148 | #define CONFIG_BOOTP_BOOTPATH | |
149 | #define CONFIG_BOOTP_GATEWAY | |
150 | #define CONFIG_BOOTP_HOSTNAME | |
151 | ||
152 | /* | |
153 | * Command line configuration. | |
154 | */ | |
155 | ||
156 | #undef CONFIG_CMD_IDE | |
157 | #undef CONFIG_CMD_BEDBUG | |
158 | ||
159 | #endif /* __CONFIG_H */ |