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1 | /* | |
2 | * Copyright (C) 2016, STMicroelectronics - All Rights Reserved | |
3 | * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. | |
4 | * | |
5 | * SPDX-License-Identifier: GPL-2.0+ | |
6 | */ | |
7 | ||
8 | #ifndef __CONFIG_H | |
9 | #define __CONFIG_H | |
10 | ||
11 | #define CONFIG_SYS_FLASH_BASE 0x08000000 | |
12 | #define CONFIG_SYS_INIT_SP_ADDR 0x20050000 | |
13 | ||
14 | #ifdef CONFIG_SUPPORT_SPL | |
15 | #define CONFIG_SYS_LOAD_ADDR 0x08008000 | |
16 | #else | |
17 | #define CONFIG_SYS_LOAD_ADDR 0xC0400000 | |
18 | #define CONFIG_LOADADDR 0xC0400000 | |
19 | #endif | |
20 | ||
21 | /* | |
22 | * Configuration of the external SDRAM memory | |
23 | */ | |
24 | #define CONFIG_NR_DRAM_BANKS 1 | |
25 | ||
26 | #define CONFIG_SYS_MAX_FLASH_SECT 8 | |
27 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 | |
28 | ||
29 | #define CONFIG_ENV_SIZE (8 << 10) | |
30 | ||
31 | #define CONFIG_STM32_FLASH | |
32 | ||
33 | #define CONFIG_DW_GMAC_DEFAULT_DMA_PBL (8) | |
34 | #define CONFIG_DW_ALTDESCRIPTOR | |
35 | #define CONFIG_MII | |
36 | #define CONFIG_PHY_SMSC | |
37 | ||
38 | #define CONFIG_SYS_CLK_FREQ 200000000 /* 200 MHz */ | |
39 | #define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */ | |
40 | ||
41 | #define CONFIG_CMDLINE_TAG | |
42 | #define CONFIG_SETUP_MEMORY_TAGS | |
43 | #define CONFIG_INITRD_TAG | |
44 | #define CONFIG_REVISION_TAG | |
45 | ||
46 | #define CONFIG_SYS_CBSIZE 1024 | |
47 | ||
48 | #define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024) | |
49 | ||
50 | #define CONFIG_BOOTCOMMAND \ | |
51 | "run bootcmd_romfs" | |
52 | ||
53 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
54 | "bootargs_romfs=uclinux.physaddr=0x08180000 root=/dev/mtdblock0\0" \ | |
55 | "bootcmd_romfs=setenv bootargs ${bootargs} ${bootargs_romfs};" \ | |
56 | "bootm 0x08044000 - 0x08042000\0" | |
57 | ||
58 | ||
59 | /* | |
60 | * Command line configuration. | |
61 | */ | |
62 | #define CONFIG_CMD_CACHE | |
63 | #define CONFIG_BOARD_LATE_INIT | |
64 | #define CONFIG_DISPLAY_BOARDINFO | |
65 | ||
66 | /* For SPL */ | |
67 | #ifdef CONFIG_SUPPORT_SPL | |
68 | #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR | |
69 | #define CONFIG_SPL_TEXT_BASE CONFIG_SYS_FLASH_BASE | |
70 | #define CONFIG_SYS_MONITOR_LEN (512 * 1024) | |
71 | #define CONFIG_SYS_SPL_LEN 0x00008000 | |
72 | #define CONFIG_SYS_UBOOT_START 0x080083FD | |
73 | #define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + \ | |
74 | CONFIG_SYS_SPL_LEN) | |
75 | ||
76 | /* DT blob (fdt) address */ | |
77 | #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \ | |
78 | 0x1C0000) | |
79 | #endif | |
80 | /* For SPL ends */ | |
81 | ||
82 | #endif /* __CONFIG_H */ |