4 bool "Support Rockchip RK3036"
8 imply USB_FUNCTION_ROCKUSB
11 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
12 including NEON and GPU, Mali-400 graphics, several DDR3 options
13 and video codec support. Peripherals include Gigabit Ethernet,
14 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
16 config ROCKCHIP_RK3128
17 bool "Support Rockchip RK3128"
20 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
21 including NEON and GPU, Mali-400 graphics, several DDR3 options
22 and video codec support. Peripherals include Gigabit Ethernet,
23 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
25 config ROCKCHIP_RK3188
26 bool "Support Rockchip RK3188"
28 select SPL_BOARD_INIT if SPL
36 select SPL_DRIVERS_MISC_SUPPORT
37 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
38 select BOARD_LATE_INIT
39 select ROCKCHIP_BROM_HELPER
41 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
42 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
43 video interfaces, several memory options and video codec support.
44 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
45 UART, SPI, I2C and PWMs.
47 config ROCKCHIP_RK322X
48 bool "Support Rockchip RK3228/RK3229"
52 select ROCKCHIP_BROM_HELPER
53 select DEBUG_UART_BOARD_INIT
55 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
56 including NEON and GPU, Mali-400 graphics, several DDR3 options
57 and video codec support. Peripherals include Gigabit Ethernet,
58 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
60 config ROCKCHIP_RK3288
61 bool "Support Rockchip RK3288"
63 select SPL_BOARD_INIT if SPL
66 imply USB_FUNCTION_ROCKUSB
69 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
70 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
71 video interfaces supporting HDMI and eDP, several DDR3 options
72 and video codec support. Peripherals include Gigabit Ethernet,
73 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
78 default "arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds"
82 config ROCKCHIP_RK3328
83 bool "Support Rockchip RK3328"
86 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
87 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
88 video interfaces supporting HDMI and eDP, several DDR3 options
89 and video codec support. Peripherals include Gigabit Ethernet,
90 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
92 config ROCKCHIP_RK3368
93 bool "Support Rockchip RK3368"
97 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
98 select TPL_NEEDS_SEPARATE_STACK if TPL
99 imply SPL_SEPARATE_BSS
100 imply SPL_SERIAL_SUPPORT
101 imply TPL_SERIAL_SUPPORT
102 select DEBUG_UART_BOARD_INIT
105 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
106 into a big and little cluster with 4 cores each) Cortex-A53 including
107 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
108 (for the little cluster), PowerVR G6110 based graphics, one video
109 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
112 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
113 I2S, UARTs, SPI, I2C and PWMs.
118 default "arch/arm/mach-rockchip/rk3368/u-boot-tpl.lds"
131 config ROCKCHIP_RK3399
132 bool "Support Rockchip RK3399"
136 select SPL_SEPARATE_BSS
137 select SPL_SERIAL_SUPPORT
138 select SPL_DRIVERS_MISC_SUPPORT
139 select DEBUG_UART_BOARD_INIT
140 select BOARD_LATE_INIT
141 select ROCKCHIP_BROM_HELPER
143 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
144 and quad-core Cortex-A53.
145 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
146 video interfaces supporting HDMI and eDP, several DDR3 options
147 and video codec support. Peripherals include Gigabit Ethernet,
148 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
150 config ROCKCHIP_RV1108
151 bool "Support Rockchip RV1108"
154 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
157 config SPL_ROCKCHIP_BACK_TO_BROM
158 bool "SPL returns to bootrom"
159 default y if ROCKCHIP_RK3036
160 select ROCKCHIP_BROM_HELPER
163 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
164 SPL will return to the boot rom, which will then load the U-Boot
165 binary to keep going on.
167 config TPL_ROCKCHIP_BACK_TO_BROM
168 bool "TPL returns to bootrom"
169 default y if ROCKCHIP_RK3368
170 select ROCKCHIP_BROM_HELPER
173 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
174 SPL will return to the boot rom, which will then load the U-Boot
175 binary to keep going on.
177 config ROCKCHIP_BOOT_MODE_REG
178 hex "Rockchip boot mode flag register address"
179 default 0x200081c8 if ROCKCHIP_RK3036
180 default 0x20004040 if ROCKCHIP_RK3188
181 default 0x110005c8 if ROCKCHIP_RK322X
182 default 0xff730094 if ROCKCHIP_RK3288
183 default 0xff738200 if ROCKCHIP_RK3368
184 default 0xff320300 if ROCKCHIP_RK3399
185 default 0x10300580 if ROCKCHIP_RV1108
188 The Soc will enter to different boot mode(defined in asm/arch/boot_mode.h)
189 according to the value from this register.
191 config ROCKCHIP_SPL_RESERVE_IRAM
192 hex "Size of IRAM reserved in SPL"
195 SPL may need reserve memory for firmware loaded by SPL, whose load
196 address is in IRAM and may overlay with SPL text area if not
199 config ROCKCHIP_BROM_HELPER
202 config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
203 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
204 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
206 Some Rockchip BROM variants (e.g. on the RK3188) load the
207 first stage in segments and enter multiple times. E.g. on
208 the RK3188, the first 1KB of the first stage are loaded
209 first and entered; after returning to the BROM, the
210 remainder of the first stage is loaded, but the BROM
211 re-enters at the same address/to the same code as previously.
213 This enables support code in the BOOT0 hook for the SPL stage
214 to allow multiple entries.
216 config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
217 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
218 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
220 Some Rockchip BROM variants (e.g. on the RK3188) load the
221 first stage in segments and enter multiple times. E.g. on
222 the RK3188, the first 1KB of the first stage are loaded
223 first and entered; after returning to the BROM, the
224 remainder of the first stage is loaded, but the BROM
225 re-enters at the same address/to the same code as previously.
227 This enables support code in the BOOT0 hook for the TPL stage
228 to allow multiple entries.
230 config SPL_MMC_SUPPORT
231 default y if !SPL_ROCKCHIP_BACK_TO_BROM
233 source "arch/arm/mach-rockchip/rk3036/Kconfig"
234 source "arch/arm/mach-rockchip/rk3128/Kconfig"
235 source "arch/arm/mach-rockchip/rk3188/Kconfig"
236 source "arch/arm/mach-rockchip/rk322x/Kconfig"
237 source "arch/arm/mach-rockchip/rk3288/Kconfig"
238 source "arch/arm/mach-rockchip/rk3328/Kconfig"
239 source "arch/arm/mach-rockchip/rk3368/Kconfig"
240 source "arch/arm/mach-rockchip/rk3399/Kconfig"
241 source "arch/arm/mach-rockchip/rv1108/Kconfig"