arch/powerpc/cpu/ppc4xx/u-boot.lds

   1 /*
   2  * Copyright 2007-2009 Freescale Semiconductor, Inc.
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include "config.h"     /* CONFIG_BOARDDIR */
   8
   9 #ifndef RESET_VECTOR_ADDRESS
  10 #ifdef CONFIG_RESET_VECTOR_ADDRESS
  11 #define RESET_VECTOR_ADDRESS    CONFIG_RESET_VECTOR_ADDRESS
  12 #else
  13 #define RESET_VECTOR_ADDRESS    0xfffffffc
  14 #endif
  15 #endif
  16
  17 OUTPUT_ARCH(powerpc)
  18
  19 PHDRS
  20 {
  21   text PT_LOAD;
  22   bss PT_LOAD;
  23 }
  24
  25 SECTIONS
  26 {
  27   /* Read-only sections, merged into text segment: */
  28   . = + SIZEOF_HEADERS;
  29   .text      :
  30   {
  31     *(.text*)
  32    } :text
  33     _etext = .;
  34     PROVIDE (etext = .);
  35     .rodata    :
  36    {
  37     *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
  38   } :text
  39
  40   /* Read-write section, merged into data segment: */
  41   . = (. + 0x00FF) & 0xFFFFFF00;
  42   _erotext = .;
  43   PROVIDE (erotext = .);
  44   .reloc   :
  45   {
  46     _GOT2_TABLE_ = .;
  47     KEEP(*(.got2))
  48     KEEP(*(.got))
  49     _FIXUP_TABLE_ = .;
  50     KEEP(*(.fixup))
  51   }
  52   __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
  53   __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
  54
  55   .data    :
  56   {
  57     *(.data*)
  58     *(.sdata*)
  59   }
  60   _edata  =  .;
  61   PROVIDE (edata = .);
  62
  63   . = .;
  64
  65   . = ALIGN(4);
  66   .u_boot_list : {
  67         KEEP(*(SORT(.u_boot_list*)));
  68   }
  69
  70   . = .;
  71   __start___ex_table = .;
  72   __ex_table : { *(__ex_table) }
  73   __stop___ex_table = .;
  74
  75   . = ALIGN(256);
  76   __init_begin = .;
  77   .text.init : { *(.text.init) }
  78   .data.init : {
  79         *(.data.init)
  80         . = ALIGN(256);
  81         LONG(0) LONG(0)         /* Extend u-boot.bin to here */
  82   }
  83   __init_end = .;
  84   _end = .;
  85
  86 #ifndef CONFIG_SPL
  87 #ifdef CONFIG_440
  88   .bootpg RESET_VECTOR_ADDRESS - 0xffc :
  89   {
  90     arch/powerpc/cpu/ppc4xx/start.o     (.bootpg)
  91
  92     /*
  93      * PPC440 board need a board specific object with the
  94      * TLB definitions. This needs to get included right after
  95      * start.o, since the first shadow TLB only covers 4k
  96      * of address space.
  97      */
  98 #ifdef CONFIG_INIT_TLB
  99     CONFIG_INIT_TLB (.bootpg)
 100 #else
 101     CONFIG_BOARDDIR/init.o      (.bootpg)
 102 #endif
 103   } :text = 0xffff
 104 #endif
 105
 106   .resetvec RESET_VECTOR_ADDRESS :
 107   {
 108     KEEP(*(.resetvec))
 109   } :text = 0xffff
 110
 111   . = RESET_VECTOR_ADDRESS + 0x4;
 112
 113   /*
 114    * Make sure that the bss segment isn't linked at 0x0, otherwise its
 115    * address won't be updated during relocation fixups.  Note that
 116    * this is a temporary fix.  Code to dynamically the fixup the bss
 117    * location will be added in the future.  When the bss relocation
 118    * fixup code is present this workaround should be removed.
 119    */
 120 #if (RESET_VECTOR_ADDRESS == 0xfffffffc)
 121   . |= 0x10;
 122 #endif
 123 #endif /* CONFIG_SPL */
 124
 125   __bss_start = .;
 126   .bss (NOLOAD)       :
 127   {
 128    *(.bss*)
 129    *(.sbss*)
 130    *(COMMON)
 131   } :bss
 132
 133   . = ALIGN(4);
 134   __bss_end = . ;
 135   PROVIDE (end = .);
 136 }