board/amcc/canyonlands/chip_config.c

   1 /*
   2  * (C) Copyright 2008-2009
   3  * Stefan Roese, DENX Software Engineering, sr@denx.de.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #include <common.h>
   9 #include <asm/ppc4xx_config.h>
  10
  11 struct ppc4xx_config ppc4xx_config_val[] = {
  12         {
  13                 "600-nor", "NOR  CPU: 600 PLB: 200 OPB: 100 EBC: 100",
  14                 {
  15                         0x86, 0x80, 0xce, 0x1f, 0x79, 0x80, 0x00, 0xa0,
  16                         0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
  17                 }
  18         },
  19         {
  20                 "800-nor", "NOR  CPU: 800 PLB: 200 OPB: 100 EBC: 100",
  21                 {
  22                         0x86, 0x80, 0xba, 0x14, 0x99, 0x80, 0x00, 0xa0,
  23                         0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
  24                 }
  25         },
  26         {
  27                 "1000-nor", "NOR  CPU:1000 PLB: 200 OPB: 100 EBC: 100",
  28                 {
  29                         0x86, 0x82, 0x96, 0x19, 0xb9, 0x80, 0x00, 0xa0,
  30                         0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
  31                 }
  32         },
  33         {
  34                 "1066-nor", "NOR  CPU:1066 PLB: 266 OPB:  88 EBC:  88",
  35                 {
  36                         0x86, 0x80, 0xb3, 0x01, 0x9d, 0x80, 0x00, 0xa0,
  37                         0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
  38                 }
  39         },
  40 #if !defined(CONFIG_ARCHES)
  41         {
  42                 "600-nand", "NAND CPU: 600 PLB: 200 OPB: 100 EBC: 100",
  43                 {
  44                         0x86, 0x80, 0xce, 0x1f, 0x79, 0x90, 0x01, 0xa0,
  45                         0xa0, 0xe8, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00
  46                 }
  47         },
  48         {
  49                 "800-nand", "NAND CPU: 800 PLB: 200 OPB: 100 EBC: 100",
  50                 {
  51                         0x86, 0x80, 0xba, 0x14, 0x99, 0x90, 0x01, 0xa0,
  52                         0xa0, 0xe8, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00
  53                 }
  54         },
  55         {
  56                 "1000-nand", "NAND CPU:1000 PLB: 200 OPB: 100 EBC: 100",
  57                 {
  58                         0x86, 0x82, 0x96, 0x19, 0xb9, 0x90, 0x01, 0xa0,
  59                         0xa0, 0xe8, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00
  60                 }
  61         },
  62         {
  63                 "1066-nand", "NAND CPU:1066 PLB: 266 OPB:  88 EBC:  88",
  64                 {
  65                         0x86, 0x80, 0xb3, 0x01, 0x9d, 0x90, 0x01, 0xa0,
  66                         0xa0, 0xe8, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00
  67                 }
  68         },
  69 #endif
  70 };
  71
  72 int ppc4xx_config_count = ARRAY_SIZE(ppc4xx_config_val);