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git.ipfire.org Git - people/ms/u-boot.git/blob - board/freescale/qemu-ppce500/qemu-ppce500.c
2 * Copyright 2007,2009-2014 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/processor.h>
12 #include <asm/fsl_pci.h>
15 #include <fdt_support.h>
21 DECLARE_GLOBAL_DATA_PTR
;
23 static void *get_fdt_virt(void)
25 return (void *)CONFIG_SYS_TMPVIRT
;
28 static uint64_t get_fdt_phys(void)
30 return (uint64_t)(uintptr_t)gd
->fdt_blob
;
33 static void map_fdt_as(int esel
)
35 u32 mas0
, mas1
, mas2
, mas3
, mas7
;
36 uint64_t fdt_phys
= get_fdt_phys();
37 unsigned long fdt_phys_tlb
= fdt_phys
& ~0xffffful
;
38 unsigned long fdt_virt_tlb
= (ulong
)get_fdt_virt() & ~0xffffful
;
40 mas0
= MAS0_TLBSEL(1) | MAS0_ESEL(esel
);
41 mas1
= MAS1_VALID
| MAS1_TID(0) | MAS1_TS
| MAS1_TSIZE(BOOKE_PAGESZ_1M
);
42 mas2
= FSL_BOOKE_MAS2(fdt_virt_tlb
, 0);
43 mas3
= FSL_BOOKE_MAS3(fdt_phys_tlb
, 0, MAS3_SW
|MAS3_SR
);
44 mas7
= FSL_BOOKE_MAS7(fdt_phys_tlb
);
46 write_tlb(mas0
, mas1
, mas2
, mas3
, mas7
);
49 uint64_t get_phys_ccsrbar_addr_early(void)
51 void *fdt
= get_fdt_virt();
58 * To be able to read the FDT we need to create a temporary TLB
62 node
= fdt_path_offset(fdt
, "/soc");
63 naddr
= fdt_address_cells(fdt
, node
);
64 prop
= fdt_getprop(fdt
, node
, "ranges", &size
);
65 r
= fdt_translate_address(fdt
, node
, prop
+ naddr
);
71 int board_early_init_f(void)
81 static int pci_map_region(void *fdt
, int pci_node
, int range_id
,
82 phys_size_t
*ppaddr
, pci_addr_t
*pvaddr
,
83 pci_size_t
*psize
, ulong
*pmap_addr
)
90 r
= fdt_read_range(fdt
, pci_node
, range_id
, NULL
, &addr
, &size
);
102 map_addr
= *pmap_addr
;
105 map_addr
+= size
- 1;
106 map_addr
&= ~(size
- 1);
108 if (map_addr
+ size
>= CONFIG_SYS_PCI_MAP_END
)
111 /* Map virtual memory for range */
112 assert(!tlb_map_range(map_addr
, addr
, size
, TLB_MAP_IO
));
113 *pmap_addr
= map_addr
+ size
;
121 void pci_init_board(void)
123 struct pci_controller
*pci_hoses
;
124 void *fdt
= get_fdt_virt();
132 /* Start MMIO and PIO range maps above RAM */
133 map_addr
= CONFIG_SYS_PCI_MAP_START
;
135 /* Count and allocate PCI buses */
136 pci_node
= fdt_node_offset_by_prop_value(fdt
, pci_node
,
137 "device_type", "pci", 4);
138 while (pci_node
!= -FDT_ERR_NOTFOUND
) {
139 pci_node
= fdt_node_offset_by_prop_value(fdt
, pci_node
,
140 "device_type", "pci", 4);
145 pci_hoses
= malloc(sizeof(struct pci_controller
) * pci_count
);
147 printf("PCI: disabled\n\n");
151 /* Spawn PCI buses based on device tree */
152 pci_node
= fdt_node_offset_by_prop_value(fdt
, pci_node
,
153 "device_type", "pci", 4);
154 while (pci_node
!= -FDT_ERR_NOTFOUND
) {
155 struct fsl_pci_info pci_info
= { };
159 reg
= fdt_getprop(fdt
, pci_node
, "reg", NULL
);
160 pci_info
.regs
= fdt_translate_address(fdt
, pci_node
, reg
);
163 r
= pci_map_region(fdt
, pci_node
, 0, &pci_info
.mem_phys
, NULL
,
164 &pci_info
.mem_size
, &map_addr
);
169 r
= pci_map_region(fdt
, pci_node
, 1, &pci_info
.io_phys
, NULL
,
170 &pci_info
.io_size
, &map_addr
);
175 * The PCI framework finds virtual addresses for the buses
176 * through our address map, so tell it the physical addresses.
178 pci_info
.mem_bus
= pci_info
.mem_phys
;
179 pci_info
.io_bus
= pci_info
.io_phys
;
182 pci_info
.pci_num
= pci_num
+ 1;
184 fsl_setup_hose(&pci_hoses
[pci_num
], pci_info
.regs
);
185 printf("PCI: base address %lx\n", pci_info
.regs
);
187 fsl_pci_init_port(&pci_info
, &pci_hoses
[pci_num
], pci_num
);
189 /* Jump to next PCI node */
190 pci_node
= fdt_node_offset_by_prop_value(fdt
, pci_node
,
191 "device_type", "pci", 4);
198 int last_stage_init(void)
200 void *fdt
= get_fdt_virt();
202 const uint64_t *prop
;
205 chosen
= fdt_path_offset(fdt
, "/chosen");
207 printf("Couldn't find /chosen node in fdt\n");
212 prop
= fdt_getprop(fdt
, chosen
, "qemu,boot-kernel", &len
);
213 if (prop
&& (len
>= 8))
214 env_set_hex("qemu_kernel_addr", *prop
);
216 /* Give the user a variable for the host fdt */
217 env_set_hex("fdt_addr_r", (ulong
)fdt
);
222 static uint64_t get_linear_ram_size(void)
224 void *fdt
= get_fdt_virt();
229 memory
= fdt_path_offset(fdt
, "/memory");
230 prop
= fdt_getprop(fdt
, memory
, "reg", &len
);
232 if (prop
&& len
>= 16)
233 return *(uint64_t *)(prop
+8);
235 panic("Couldn't determine RAM size");
238 int board_eth_init(bd_t
*bis
)
240 return pci_eth_init(bis
);
243 #if defined(CONFIG_OF_BOARD_SETUP)
244 int ft_board_setup(void *blob
, bd_t
*bd
)
252 void print_laws(void)
254 /* We don't emulate LAWs yet */
257 phys_size_t
fixed_sdram(void)
259 return get_linear_ram_size();
262 phys_size_t
fsl_ddr_sdram_size(void)
264 return get_linear_ram_size();
269 phys_size_t ram_size
;
272 * Create a temporary AS=1 map for the fdt
274 * We use ESEL=0 here to overwrite the previous AS=0 map for ourselves
275 * which was only 4k big. This way we don't have to clear any other maps.
279 /* Fetch RAM size from the fdt */
280 ram_size
= get_linear_ram_size();
282 /* And remove our fdt map again */
285 /* Create an internal map of manually created TLB maps */
286 init_used_tlb_cams();
288 /* Create a dynamic AS=0 CCSRBAR mapping */
289 assert(!tlb_map_range(CONFIG_SYS_CCSRBAR
, CONFIG_SYS_CCSRBAR_PHYS
,
290 1024 * 1024, TLB_MAP_IO
));
292 /* Create a RAM map that spans all accessible RAM */
293 setup_ddr_tlbs(ram_size
>> 20);
295 /* Create a map for the TLB */
296 assert(!tlb_map_range((ulong
)get_fdt_virt(), get_fdt_phys(),
297 1024 * 1024, TLB_MAP_RAM
));
302 /* We don't emulate LAWs yet */
305 static uint32_t get_cpu_freq(void)
307 void *fdt
= get_fdt_virt();
308 int cpus_node
= fdt_path_offset(fdt
, "/cpus");
309 int cpu_node
= fdt_first_subnode(fdt
, cpus_node
);
310 const char *prop
= "clock-frequency";
311 return fdt_getprop_u32_default_node(fdt
, cpu_node
, 0, prop
, 0);
314 void get_sys_info(sys_info_t
*sys_info
)
316 int freq
= get_cpu_freq();
318 memset(sys_info
, 0, sizeof(sys_info_t
));
319 sys_info
->freq_systembus
= freq
;
320 sys_info
->freq_ddrbus
= freq
;
321 sys_info
->freq_processor
[0] = freq
;
324 int get_clocks (void)
328 get_sys_info(&sys_info
);
330 gd
->cpu_clk
= sys_info
.freq_processor
[0];
331 gd
->bus_clk
= sys_info
.freq_systembus
;
332 gd
->mem_clk
= sys_info
.freq_ddrbus
;
333 gd
->arch
.lbc_clk
= sys_info
.freq_ddrbus
;
338 unsigned long get_tbclk (void)
340 void *fdt
= get_fdt_virt();
341 int cpus_node
= fdt_path_offset(fdt
, "/cpus");
342 int cpu_node
= fdt_first_subnode(fdt
, cpus_node
);
343 const char *prop
= "timebase-frequency";
344 return fdt_getprop_u32_default_node(fdt
, cpu_node
, 0, prop
, 0);
347 /********************************************
349 * return system bus freq in Hz
350 *********************************************/
351 ulong
get_bus_freq (ulong dummy
)
354 get_sys_info(&sys_info
);
355 return sys_info
.freq_systembus
;
359 * Return the number of cores on this SOC.
361 int cpu_numcores(void)
364 * The QEMU u-boot target only needs to drive the first core,
365 * spinning and device tree nodes get driven by QEMU itself
371 * Return a 32-bit mask indicating which cores are present on this SOC.
375 return (1 << cpu_numcores()) - 1;