]>
git.ipfire.org Git - people/ms/u-boot.git/blob - board/synopsys/axs101/axs101.c
2 * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
4 * SPDX-License-Identifier: GPL-2.0+
14 DECLARE_GLOBAL_DATA_PTR
;
16 int board_mmc_init(bd_t
*bis
)
18 struct dwmci_host
*host
= NULL
;
20 host
= malloc(sizeof(struct dwmci_host
));
22 printf("dwmci_host malloc fail!\n");
26 memset(host
, 0, sizeof(struct dwmci_host
));
27 host
->name
= "Synopsys Mobile storage";
28 host
->ioaddr
= (void *)ARC_DWMMC_BASE
;
31 host
->bus_hz
= 50000000;
33 add_dwmci(host
, host
->bus_hz
, 400000);
38 int board_eth_init(bd_t
*bis
)
40 if (designware_initialize(ARC_DWGMAC_BASE
,
41 PHY_INTERFACE_MODE_RGMII
) >= 0)
48 #define AXS_MB_CREG 0xE0011000
50 int board_early_init_f(void)
52 if (readl((void __iomem
*)AXS_MB_CREG
+ 0x234) & (1 << 28))
53 gd
->board_type
= AXS_MB_V3
;
55 gd
->board_type
= AXS_MB_V2
;
60 #ifdef CONFIG_ISA_ARCV2
61 #define RESET_VECTOR_ADDR 0x0
63 void smp_set_core_boot_addr(unsigned long addr
, int corenr
)
65 /* All cores have reset vector pointing to 0 */
66 writel(addr
, (void __iomem
*)RESET_VECTOR_ADDR
);
68 /* Make sure other cores see written value in memory */
69 flush_dcache_range(RESET_VECTOR_ADDR
, RESET_VECTOR_ADDR
+ sizeof(int));
72 void smp_kick_all_cpus(void)
75 #define AXC003_CREG_CPU_START 0xF0001400
77 /* Bits positions in CPU start CREG */
79 #define BITS_POLARITY 8
80 #define BITS_CORE_SEL 9
81 #define BITS_MULTICORE 12
83 #define CMD (1 << BITS_MULTICORE) | (1 << BITS_CORE_SEL) | \
84 (1 << BITS_POLARITY) | (1 << BITS_START)
86 writel(CMD
, (void __iomem
*)AXC003_CREG_CPU_START
);