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1 /*
2 * (C) Copyright 2000, 2001
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8 /*
9 * Support for read and write access to EEPROM like memory devices. This
10 * includes regular EEPROM as well as FRAM (ferroelectic nonvolaile RAM).
11 * FRAM devices read and write data at bus speed. In particular, there is no
12 * write delay. Also, there is no limit imposed on the number of bytes that can
13 * be transferred with a single read or write.
14 *
15 * Use the following configuration options to ensure no unneeded performance
16 * degradation (typical for EEPROM) is incured for FRAM memory:
17 *
18 * #define CONFIG_SYS_I2C_FRAM
19 * #undef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
20 *
21 */
22
23 #include <common.h>
24 #include <config.h>
25 #include <command.h>
26 #include <i2c.h>
27
28 extern void eeprom_init (void);
29 extern int eeprom_read (unsigned dev_addr, unsigned offset,
30 uchar *buffer, unsigned cnt);
31 extern int eeprom_write (unsigned dev_addr, unsigned offset,
32 uchar *buffer, unsigned cnt);
33 #if defined(CONFIG_SYS_EEPROM_WREN)
34 extern int eeprom_write_enable (unsigned dev_addr, int state);
35 #endif
36
37
38 #if defined(CONFIG_SYS_EEPROM_X40430)
39 /* Maximum number of times to poll for acknowledge after write */
40 #define MAX_ACKNOWLEDGE_POLLS 10
41 #endif
42
43 /* ------------------------------------------------------------------------- */
44
45 #if defined(CONFIG_CMD_EEPROM)
46 int do_eeprom ( cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
47 {
48 const char *const fmt =
49 "\nEEPROM @0x%lX %s: addr %08lx off %04lx count %ld ... ";
50
51 #if defined(CONFIG_SYS_I2C_MULTI_EEPROMS)
52 if (argc == 6) {
53 ulong dev_addr = simple_strtoul (argv[2], NULL, 16);
54 ulong addr = simple_strtoul (argv[3], NULL, 16);
55 ulong off = simple_strtoul (argv[4], NULL, 16);
56 ulong cnt = simple_strtoul (argv[5], NULL, 16);
57 #else
58 if (argc == 5) {
59 ulong dev_addr = CONFIG_SYS_DEF_EEPROM_ADDR;
60 ulong addr = simple_strtoul (argv[2], NULL, 16);
61 ulong off = simple_strtoul (argv[3], NULL, 16);
62 ulong cnt = simple_strtoul (argv[4], NULL, 16);
63 #endif /* CONFIG_SYS_I2C_MULTI_EEPROMS */
64
65 # if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
66 eeprom_init ();
67 # endif /* !CONFIG_SPI */
68
69 if (strcmp (argv[1], "read") == 0) {
70 int rcode;
71
72 printf (fmt, dev_addr, argv[1], addr, off, cnt);
73
74 rcode = eeprom_read (dev_addr, off, (uchar *) addr, cnt);
75
76 puts ("done\n");
77 return rcode;
78 } else if (strcmp (argv[1], "write") == 0) {
79 int rcode;
80
81 printf (fmt, dev_addr, argv[1], addr, off, cnt);
82
83 rcode = eeprom_write (dev_addr, off, (uchar *) addr, cnt);
84
85 puts ("done\n");
86 return rcode;
87 }
88 }
89
90 return CMD_RET_USAGE;
91 }
92 #endif
93
94 /*-----------------------------------------------------------------------
95 *
96 * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
97 * 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
98 *
99 * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
100 * 0x00000nxx for EEPROM address selectors and page number at n.
101 */
102
103 #if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
104 #if !defined(CONFIG_SYS_I2C_EEPROM_ADDR_LEN) || CONFIG_SYS_I2C_EEPROM_ADDR_LEN < 1 || CONFIG_SYS_I2C_EEPROM_ADDR_LEN > 2
105 #error CONFIG_SYS_I2C_EEPROM_ADDR_LEN must be 1 or 2
106 #endif
107 #endif
108
109 int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
110 {
111 unsigned end = offset + cnt;
112 unsigned blk_off;
113 int rcode = 0;
114
115 /* Read data until done or would cross a page boundary.
116 * We must write the address again when changing pages
117 * because the next page may be in a different device.
118 */
119 while (offset < end) {
120 unsigned alen, len;
121 #if !defined(CONFIG_SYS_I2C_FRAM)
122 unsigned maxlen;
123 #endif
124
125 #if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
126 uchar addr[2];
127
128 blk_off = offset & 0xFF; /* block offset */
129
130 addr[0] = offset >> 8; /* block number */
131 addr[1] = blk_off; /* block offset */
132 alen = 2;
133 #else
134 uchar addr[3];
135
136 blk_off = offset & 0xFF; /* block offset */
137
138 addr[0] = offset >> 16; /* block number */
139 addr[1] = offset >> 8; /* upper address octet */
140 addr[2] = blk_off; /* lower address octet */
141 alen = 3;
142 #endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
143
144 addr[0] |= dev_addr; /* insert device address */
145
146 len = end - offset;
147
148 /*
149 * For a FRAM device there is no limit on the number of the
150 * bytes that can be ccessed with the single read or write
151 * operation.
152 */
153 #if !defined(CONFIG_SYS_I2C_FRAM)
154 maxlen = 0x100 - blk_off;
155 if (maxlen > I2C_RXTX_LEN)
156 maxlen = I2C_RXTX_LEN;
157 if (len > maxlen)
158 len = maxlen;
159 #endif
160
161 #if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
162 spi_read (addr, alen, buffer, len);
163 #else
164 if (i2c_read (addr[0], offset, alen-1, buffer, len) != 0)
165 rcode = 1;
166 #endif
167 buffer += len;
168 offset += len;
169 }
170
171 return rcode;
172 }
173
174 /*-----------------------------------------------------------------------
175 *
176 * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
177 * 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
178 *
179 * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
180 * 0x00000nxx for EEPROM address selectors and page number at n.
181 */
182
183 int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
184 {
185 unsigned end = offset + cnt;
186 unsigned blk_off;
187 int rcode = 0;
188
189 #if defined(CONFIG_SYS_EEPROM_X40430)
190 uchar contr_r_addr[2];
191 uchar addr_void[2];
192 uchar contr_reg[2];
193 uchar ctrl_reg_v;
194 int i;
195 #endif
196
197 #if defined(CONFIG_SYS_EEPROM_WREN)
198 eeprom_write_enable (dev_addr,1);
199 #endif
200 /* Write data until done or would cross a write page boundary.
201 * We must write the address again when changing pages
202 * because the address counter only increments within a page.
203 */
204
205 while (offset < end) {
206 unsigned alen, len;
207 #if !defined(CONFIG_SYS_I2C_FRAM)
208 unsigned maxlen;
209 #endif
210
211 #if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
212 uchar addr[2];
213
214 blk_off = offset & 0xFF; /* block offset */
215
216 addr[0] = offset >> 8; /* block number */
217 addr[1] = blk_off; /* block offset */
218 alen = 2;
219 #else
220 uchar addr[3];
221
222 blk_off = offset & 0xFF; /* block offset */
223
224 addr[0] = offset >> 16; /* block number */
225 addr[1] = offset >> 8; /* upper address octet */
226 addr[2] = blk_off; /* lower address octet */
227 alen = 3;
228 #endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
229
230 addr[0] |= dev_addr; /* insert device address */
231
232 len = end - offset;
233
234 /*
235 * For a FRAM device there is no limit on the number of the
236 * bytes that can be accessed with the single read or write
237 * operation.
238 */
239 #if !defined(CONFIG_SYS_I2C_FRAM)
240
241 #if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)
242
243 #define EEPROM_PAGE_SIZE (1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)
244 #define EEPROM_PAGE_OFFSET(x) ((x) & (EEPROM_PAGE_SIZE - 1))
245
246 maxlen = EEPROM_PAGE_SIZE - EEPROM_PAGE_OFFSET(blk_off);
247 #else
248 maxlen = 0x100 - blk_off;
249 #endif
250 if (maxlen > I2C_RXTX_LEN)
251 maxlen = I2C_RXTX_LEN;
252
253 if (len > maxlen)
254 len = maxlen;
255 #endif
256
257 #if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
258 spi_write (addr, alen, buffer, len);
259 #else
260 #if defined(CONFIG_SYS_EEPROM_X40430)
261 /* Get the value of the control register.
262 * Set current address (internal pointer in the x40430)
263 * to 0x1ff.
264 */
265 contr_r_addr[0] = 9;
266 contr_r_addr[1] = 0xff;
267 addr_void[0] = 0;
268 addr_void[1] = addr[1];
269 #ifdef CONFIG_SYS_I2C_EEPROM_ADDR
270 contr_r_addr[0] |= CONFIG_SYS_I2C_EEPROM_ADDR;
271 addr_void[0] |= CONFIG_SYS_I2C_EEPROM_ADDR;
272 #endif
273 contr_reg[0] = 0xff;
274 if (i2c_read (contr_r_addr[0], contr_r_addr[1], 1, contr_reg, 1) != 0) {
275 rcode = 1;
276 }
277 ctrl_reg_v = contr_reg[0];
278
279 /* Are any of the eeprom blocks write protected?
280 */
281 if (ctrl_reg_v & 0x18) {
282 ctrl_reg_v &= ~0x18; /* reset block protect bits */
283 ctrl_reg_v |= 0x02; /* set write enable latch */
284 ctrl_reg_v &= ~0x04; /* clear RWEL */
285
286 /* Set write enable latch.
287 */
288 contr_reg[0] = 0x02;
289 if (i2c_write (contr_r_addr[0], 0xff, 1, contr_reg, 1) != 0) {
290 rcode = 1;
291 }
292
293 /* Set register write enable latch.
294 */
295 contr_reg[0] = 0x06;
296 if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
297 rcode = 1;
298 }
299
300 /* Modify ctrl register.
301 */
302 contr_reg[0] = ctrl_reg_v;
303 if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
304 rcode = 1;
305 }
306
307 /* The write (above) is an operation on NV memory.
308 * These can take some time (~5ms), and the device
309 * will not respond to further I2C messages till
310 * it's completed the write.
311 * So poll device for an I2C acknowledge.
312 * When we get one we know we can continue with other
313 * operations.
314 */
315 contr_reg[0] = 0;
316 for (i = 0; i < MAX_ACKNOWLEDGE_POLLS; i++) {
317 if (i2c_read (addr_void[0], addr_void[1], 1, contr_reg, 1) == 0)
318 break; /* got ack */
319 #if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS)
320 udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
321 #endif
322 }
323 if (i == MAX_ACKNOWLEDGE_POLLS) {
324 puts ("EEPROM poll acknowledge failed\n");
325 rcode = 1;
326 }
327 }
328
329 /* Is the write enable latch on?.
330 */
331 else if (!(ctrl_reg_v & 0x02)) {
332 /* Set write enable latch.
333 */
334 contr_reg[0] = 0x02;
335 if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
336 rcode = 1;
337 }
338 }
339 /* Write is enabled ... now write eeprom value.
340 */
341 #endif
342 if (i2c_write (addr[0], offset, alen-1, buffer, len) != 0)
343 rcode = 1;
344
345 #endif
346 buffer += len;
347 offset += len;
348
349 #if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS)
350 udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
351 #endif
352 }
353 #if defined(CONFIG_SYS_EEPROM_WREN)
354 eeprom_write_enable (dev_addr,0);
355 #endif
356 return rcode;
357 }
358
359 #if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
360 int
361 eeprom_probe (unsigned dev_addr, unsigned offset)
362 {
363 unsigned char chip;
364
365 /* Probe the chip address
366 */
367 #if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
368 chip = offset >> 8; /* block number */
369 #else
370 chip = offset >> 16; /* block number */
371 #endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
372
373 chip |= dev_addr; /* insert device address */
374
375 return (i2c_probe (chip));
376 }
377 #endif
378
379 /*-----------------------------------------------------------------------
380 * Set default values
381 */
382 #ifndef CONFIG_SYS_I2C_SPEED
383 #define CONFIG_SYS_I2C_SPEED 50000
384 #endif
385
386 void eeprom_init (void)
387 {
388
389 #if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
390 spi_init_f ();
391 #endif
392 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT)
393 i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
394 #endif
395 }
396
397 /*-----------------------------------------------------------------------
398 */
399
400 /***************************************************/
401
402 #if defined(CONFIG_CMD_EEPROM)
403
404 #ifdef CONFIG_SYS_I2C_MULTI_EEPROMS
405 U_BOOT_CMD(
406 eeprom, 6, 1, do_eeprom,
407 "EEPROM sub-system",
408 "read devaddr addr off cnt\n"
409 "eeprom write devaddr addr off cnt\n"
410 " - read/write `cnt' bytes from `devaddr` EEPROM at offset `off'"
411 );
412 #else /* One EEPROM */
413 U_BOOT_CMD(
414 eeprom, 5, 1, do_eeprom,
415 "EEPROM sub-system",
416 "read addr off cnt\n"
417 "eeprom write addr off cnt\n"
418 " - read/write `cnt' bytes at EEPROM offset `off'"
419 );
420 #endif /* CONFIG_SYS_I2C_MULTI_EEPROMS */
421
422 #endif