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git.ipfire.org Git - people/ms/u-boot.git/blob - include/configs/PIP405.h
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * SPDX-License-Identifier: GPL-2.0+
9 * board/config.h - configuration options, board specific
15 /***********************************************************
16 * High Level Configuration Options
18 ***********************************************************/
19 #define CONFIG_405GP 1 /* This is a PPC405 CPU */
20 #define CONFIG_PIP405 1 /* ...on a PIP405 board */
22 #define CONFIG_SYS_TEXT_BASE 0xFFF80000
24 /***********************************************************
26 ***********************************************************/
27 #define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */
32 #define CONFIG_BOOTP_BOOTFILESIZE
33 #define CONFIG_BOOTP_BOOTPATH
34 #define CONFIG_BOOTP_GATEWAY
35 #define CONFIG_BOOTP_HOSTNAME
38 * Command line configuration.
40 #define CONFIG_CMD_IDE
41 #define CONFIG_CMD_PCI
42 #define CONFIG_CMD_IRQ
43 #define CONFIG_CMD_EEPROM
44 #define CONFIG_CMD_REGINFO
45 #define CONFIG_CMD_FDC
47 #define CONFIG_CMD_DATE
48 #define CONFIG_CMD_SDRAM
49 #define CONFIG_CMD_SAVES
51 /**************************************************************
53 * the PIP405 is equiped with an Atmel 24C128/256 EEPROM at address
55 * Caution: on the same bus is the SPD (Serial Presens Detect
57 * The Atmel EEPROM uses 16Bit addressing.
58 ***************************************************************/
59 #define CONFIG_SYS_I2C
60 #define CONFIG_SYS_I2C_PPC4XX
61 #define CONFIG_SYS_I2C_PPC4XX_CH0
62 #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 50000
63 #define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
65 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x53
66 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
67 #define CONFIG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */
68 #define CONFIG_ENV_OFFSET 0x000 /* environment starts at the beginning of the EEPROM */
69 #define CONFIG_ENV_SIZE 0x800 /* 2 kBytes may be used for env vars */
71 #undef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
72 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* The Atmel 24C128/256 has */
73 /* 64 byte page write mode using*/
74 /* last 6 bits of the address */
75 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
77 /***************************************************************
78 * Definitions for Serial Presence Detect EEPROM address
79 * (to get SDRAM settings)
80 ***************************************************************/
81 #define SPD_EEPROM_ADDRESS 0x50
83 #define CONFIG_BOARD_EARLY_INIT_R
85 /**************************************************************
86 * Environment definitions
87 **************************************************************/
89 /* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */
90 /* #define CONFIG_BOOT_RETRY_TIME -10 /XXX* feature is available but not enabled */
92 #define CONFIG_BOOTCOMMAND "diskboot 400000 0:1; bootm" /* autoboot command */
93 #define CONFIG_BOOTARGS "console=ttyS0,9600 root=/dev/hda5" /* boot arguments */
95 #define CONFIG_IPADDR 10.0.0.100
96 #define CONFIG_SERVERIP 10.0.0.1
97 #define CONFIG_PREBOOT
98 /***************************************************************
99 * defines if an overwrite_console function exists
100 *************************************************************/
101 /***************************************************************
102 * defines if the overwrite_console should be stored in the
104 **************************************************************/
106 /**************************************************************
108 *************************************************************/
109 #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
110 #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
112 #define CONFIG_MISC_INIT_R
113 /***********************************************************
114 * Miscellaneous configurable options
115 **********************************************************/
116 #define CONFIG_SYS_LONGHELP /* undef to save memory */
117 #if defined(CONFIG_CMD_KGDB)
118 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
120 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
122 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
123 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
124 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
126 #define CONFIG_SYS_MEMTEST_START 0x0100000 /* memtest works on */
127 #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 1 ... 12 MB in DRAM */
129 #define CONFIG_CONS_INDEX 1 /* Use UART0 */
130 #define CONFIG_SYS_NS16550_SERIAL
131 #define CONFIG_SYS_NS16550_REG_SIZE 1
132 #define CONFIG_SYS_NS16550_CLK get_serial_clock()
134 #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */
135 #define CONFIG_SYS_BASE_BAUD 691200
137 /* The following table includes the supported baudrates */
138 #define CONFIG_SYS_BAUDRATE_TABLE \
139 { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \
140 57600, 115200, 230400, 460800, 921600 }
142 #define CONFIG_SYS_LOAD_ADDR 0x400000 /* default load address */
143 #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
145 /*-----------------------------------------------------------------------
147 *-----------------------------------------------------------------------
149 #define PCI_HOST_ADAPTER 0 /* configure ar pci adapter */
150 #define PCI_HOST_FORCE 1 /* configure as pci host */
151 #define PCI_HOST_AUTO 2 /* detected via arbiter enable */
153 #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */
154 #define CONFIG_PCI_HOST PCI_HOST_FORCE /* configure as pci-host */
155 /* resource configuration */
156 #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x0000 /* PCI Vendor ID: to-do!!! */
157 #define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0x0000 /* PCI Device ID: to-do!!! */
158 #define CONFIG_SYS_PCI_PTM1LA 0x00000000 /* point to sdram */
159 #define CONFIG_SYS_PCI_PTM1MS 0x80000001 /* 2GB, enable hard-wired to 1 */
160 #define CONFIG_SYS_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */
161 #define CONFIG_SYS_PCI_PTM2LA 0x00000000 /* disabled */
162 #define CONFIG_SYS_PCI_PTM2MS 0x00000000 /* disabled */
163 #define CONFIG_SYS_PCI_PTM2PCI 0x00000000 /* Host: use this pci address */
165 /*-----------------------------------------------------------------------
166 * Start addresses for the final memory configuration
167 * (Set up by the startup code)
168 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
170 #define CONFIG_SYS_SDRAM_BASE 0x00000000
171 #define CONFIG_SYS_FLASH_BASE 0xFFF80000
172 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
173 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Monitor */
174 #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserve 1024 kB for malloc() */
177 * For booting Linux, the board info and command line data
178 * have to be in the first 8 MB of memory, since this is
179 * the maximum mapped by the Linux kernel during initialization.
181 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
182 /*-----------------------------------------------------------------------
185 #define CONFIG_SYS_UPDATE_FLASH_SIZE
186 #define CONFIG_SYS_FLASH_PROTECTION
187 #define CONFIG_SYS_FLASH_EMPTY_INFO
189 #define CONFIG_SYS_FLASH_CFI
190 #define CONFIG_FLASH_CFI_DRIVER
192 #define CONFIG_FLASH_SHOW_PROGRESS 45
194 #define CONFIG_SYS_MAX_FLASH_BANKS 1
195 #define CONFIG_SYS_MAX_FLASH_SECT 256
198 * Init Memory Controller:
200 #define FLASH_MAX_SIZE 0x00800000 /* 8MByte max */
201 #define FLASH_BASE_PRELIM 0xFF800000 /* open the flash CS */
202 /* Size: 0=1MB, 1=2MB, 2=4MB, 3=8MB, 4=16MB, 5=32MB, 6=64MB, 7=128MB */
203 #define FLASH_SIZE_PRELIM 3 /* maximal flash FLASH size bank #0 */
205 /* Configuration Port location */
206 #define CONFIG_PORT_ADDR 0xF4000000
207 #define MULTI_PURPOSE_SOCKET_ADDR 0xF8000000
209 /*-----------------------------------------------------------------------
210 * Definitions for initial stack pointer and data area (in On Chip SRAM)
212 #define CONFIG_SYS_TEMP_STACK_OCM 1
213 #define CONFIG_SYS_OCM_DATA_ADDR 0xF0000000
214 #define CONFIG_SYS_OCM_DATA_SIZE 0x1000
215 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* inside of On Chip SRAM */
216 #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_OCM_DATA_SIZE /* Size of On Chip SRAM */
217 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
218 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
220 /***********************************************************************
221 * External peripheral base address
222 ***********************************************************************/
223 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0xE8000000
225 /***********************************************************************
227 ***********************************************************************/
228 #define CONFIG_LAST_STAGE_INIT
229 /************************************************************
231 ***********************************************************/
232 #define CONFIG_PPC4xx_EMAC
233 #define CONFIG_MII 1 /* MII PHY management */
234 #define CONFIG_PHY_ADDR 1 /* PHY address */
235 /************************************************************
237 ***********************************************************/
238 #define CONFIG_RTC_MC146818
239 #undef CONFIG_WATCHDOG /* watchdog disabled */
241 /************************************************************
243 ************************************************************/
244 #define CONFIG_SYS_IDE_MAXBUS 2 /* max. 2 IDE busses */
245 #define CONFIG_SYS_IDE_MAXDEVICE (CONFIG_SYS_IDE_MAXBUS*2) /* max. 2 drives per IDE bus */
247 #define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS /* base address */
248 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x01F0 /* ide0 offste */
249 #define CONFIG_SYS_ATA_IDE1_OFFSET 0x0170 /* ide1 offset */
250 #define CONFIG_SYS_ATA_DATA_OFFSET 0 /* data reg offset */
251 #define CONFIG_SYS_ATA_REG_OFFSET 0 /* reg offset */
252 #define CONFIG_SYS_ATA_ALT_OFFSET 0x200 /* alternate register offset */
254 #undef CONFIG_IDE_8xx_DIRECT /* no pcmcia interface required */
255 #undef CONFIG_IDE_LED /* no led for ide supported */
256 #define CONFIG_IDE_RESET /* reset for ide supported... */
257 #define CONFIG_IDE_RESET_ROUTINE /* with a special reset function */
258 #define CONFIG_SUPPORT_VFAT
260 /************************************************************
261 * ATAPI support (experimental)
262 ************************************************************/
263 #define CONFIG_ATAPI /* enable ATAPI Support */
265 /************************************************************
266 * SCSI support (experimental) only SYM53C8xx supported
267 ************************************************************/
268 #define CONFIG_SCSI_SYM53C8XX
269 #define CONFIG_SYS_SCSI_MAX_LUN 8 /* number of supported LUNs */
270 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 7 /* maximum SCSI ID (0..6) */
271 #define CONFIG_SYS_SCSI_MAX_DEVICE CONFIG_SYS_SCSI_MAX_SCSI_ID * CONFIG_SYS_SCSI_MAX_LUN /* maximum Target devices */
272 #define CONFIG_SYS_SCSI_SPIN_UP_TIME 2
274 /************************************************************
275 * Disk-On-Chip configuration
276 ************************************************************/
277 #define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */
278 #define CONFIG_SYS_DOC_SHORT_TIMEOUT
279 #define CONFIG_SYS_DOC_SUPPORT_2000
280 #define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM
282 /************************************************************
283 * DISK Partition support
284 ************************************************************/
286 /************************************************************
288 ************************************************************/
289 #define CONFIG_VIDEO_LOGO
290 #define CONFIG_VIDEO_ONBOARD /* Video controller is on-board */
292 /************************************************************
294 ************************************************************/
295 #define CONFIG_USB_UHCI
297 /* Enable needed helper functions */
299 /************************************************************
301 ************************************************************/
302 #if defined(CONFIG_CMD_KGDB)
303 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
306 /************************************************************
307 * support BZIP2 compression
308 ************************************************************/
309 #define CONFIG_BZIP2 1
311 #endif /* __CONFIG_H */