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git.ipfire.org Git - people/ms/u-boot.git/blob - include/configs/dh_imx6.h
2 * DHCOM DH-iMX6 PDK board configuration
4 * Copyright (C) 2017 Marek Vasut <marex@denx.de>
6 * SPDX-License-Identifier: GPL-2.0+
9 #ifndef __DH_IMX6_CONFIG_H
10 #define __DH_IMX6_CONFIG_H
12 #include <asm/arch/imx-regs.h>
14 #include <config_distro_defaults.h>
15 #include "mx6_common.h"
19 * 0x00_0000-0x00_ffff ... U-Boot SPL
20 * 0x01_0000-0x0f_ffff ... U-Boot
21 * 0x10_0000-0x10_ffff ... U-Boot env #1
22 * 0x11_0000-0x11_ffff ... U-Boot env #2
23 * 0x12_0000-0x1f_ffff ... UNUSED
27 #include "imx6_spl.h" /* common IMX6 SPL configuration */
28 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x11400
29 #define CONFIG_SPL_SPI_LOAD
30 #define CONFIG_SPL_TARGET "u-boot-with-spl.imx"
32 /* Miscellaneous configurable options */
34 #define CONFIG_CMDLINE_TAG
35 #define CONFIG_SETUP_MEMORY_TAGS
36 #define CONFIG_INITRD_TAG
37 #define CONFIG_REVISION_TAG
39 #define CONFIG_BOUNCE_BUFFER
42 /* Size of malloc() pool */
43 #define CONFIG_SYS_MALLOC_LEN (4 * SZ_1M)
46 #define CONFIG_SYS_BOOTCOUNT_ADDR IRAM_BASE_ADDR
47 #define CONFIG_SYS_BOOTCOUNT_BE
51 #define IMX_FEC_BASE ENET_BASE_ADDR
52 #define CONFIG_FEC_XCV_TYPE RMII
53 #define CONFIG_ETHPRIME "FEC"
54 #define CONFIG_FEC_MXC_PHYADDR 0
55 #define CONFIG_ARP_TIMEOUT 200UL
58 #ifdef CONFIG_CMD_FUSE
59 #define CONFIG_MXC_OCOTP
63 #define CONFIG_SYS_I2C
64 #define CONFIG_SYS_I2C_MXC
65 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
66 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
67 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
68 #define CONFIG_SYS_I2C_SPEED 100000
71 #define CONFIG_FSL_ESDHC
72 #define CONFIG_FSL_USDHC
73 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
74 #define CONFIG_SYS_FSL_USDHC_NUM 3
75 #define CONFIG_SYS_MMC_ENV_DEV 2 /* 1 = SDHC3, 2 = SDHC4 (eMMC) */
78 #ifdef CONFIG_CMD_SATA
79 #define CONFIG_SYS_SATA_MAX_DEVICE 1
80 #define CONFIG_DWC_AHSATA_PORT_ID 0
81 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
85 /* SPI Flash Configs */
87 #define CONFIG_SF_DEFAULT_BUS 0
88 #define CONFIG_SF_DEFAULT_CS 0
89 #define CONFIG_SF_DEFAULT_SPEED 25000000
90 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
94 #define CONFIG_MXC_UART
95 #define CONFIG_MXC_UART_BASE UART1_BASE
96 #define CONFIG_CONS_INDEX 1
97 #define CONFIG_BAUDRATE 115200
100 #ifdef CONFIG_CMD_USB
101 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
102 #define CONFIG_USB_HOST_ETHER
103 #define CONFIG_USB_ETHER_ASIX
104 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
105 #define CONFIG_MXC_USB_FLAGS 0
106 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */
108 /* USB Gadget (DFU, UMS) */
109 #if defined(CONFIG_CMD_DFU) || defined(CONFIG_CMD_USB_MASS_STORAGE)
110 #define CONFIG_SYS_DFU_DATA_BUF_SIZE (16 * 1024 * 1024)
111 #define DFU_DEFAULT_POLL_TIMEOUT 300
114 #define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525
115 #define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5
120 #define CONFIG_HW_WATCHDOG
121 #define CONFIG_IMX_WATCHDOG
122 #define CONFIG_WATCHDOG_TIMEOUT_MSECS 60000
124 /* allow to overwrite serial and ethaddr */
125 #define CONFIG_ENV_OVERWRITE
127 #define CONFIG_LOADADDR 0x12000000
128 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
130 #ifndef CONFIG_SPL_BUILD
131 #define CONFIG_EXTRA_ENV_SETTINGS \
132 "console=ttymxc0,115200\0" \
133 "fdt_addr=0x18000000\0" \
134 "fdt_high=0xffffffff\0" \
135 "initrd_high=0xffffffff\0" \
136 "kernel_addr_r=0x10008000\0" \
137 "fdt_addr_r=0x13000000\0" \
138 "ramdisk_addr_r=0x18000000\0" \
139 "scriptaddr=0x14000000\0" \
140 "fdtfile=imx6q-dhcom-pdk2.dtb\0"\
143 #define CONFIG_BOOTCOMMAND "run distro_bootcmd"
145 #define BOOT_TARGET_DEVICES(func) \
149 func(SATA, sata, 0) \
152 #include <config_distro_bootcmd.h>
155 /* Physical Memory Map */
156 #define CONFIG_NR_DRAM_BANKS 1
157 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
159 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
160 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
161 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
163 #define CONFIG_SYS_INIT_SP_OFFSET \
164 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
166 #define CONFIG_SYS_INIT_SP_ADDR \
167 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
169 #define CONFIG_SYS_MEMTEST_START 0x10000000
170 #define CONFIG_SYS_MEMTEST_END 0x20000000
171 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
174 #define CONFIG_ENV_SIZE (16 * 1024)
175 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
177 #if defined(CONFIG_ENV_IS_IN_SPI_FLASH)
178 #define CONFIG_ENV_OFFSET (1024 * 1024)
179 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
180 #define CONFIG_ENV_OFFSET_REDUND \
181 (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE)
182 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
183 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
184 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
185 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
186 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
189 #endif /* __DH_IMX6_CONFIG_H */