include/configs/dh_imx6.h

   1 /*
   2  * DHCOM DH-iMX6 PDK board configuration
   3  *
   4  * Copyright (C) 2017 Marek Vasut <marex@denx.de>
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #ifndef __DH_IMX6_CONFIG_H
  10 #define __DH_IMX6_CONFIG_H
  11
  12 #include <asm/arch/imx-regs.h>
  13
  14 #include <config_distro_defaults.h>
  15 #include "mx6_common.h"
  16
  17 /*
  18  * SPI NOR layout:
  19  * 0x00_0000-0x00_ffff ... U-Boot SPL
  20  * 0x01_0000-0x0f_ffff ... U-Boot
  21  * 0x10_0000-0x10_ffff ... U-Boot env #1
  22  * 0x11_0000-0x11_ffff ... U-Boot env #2
  23  * 0x12_0000-0x1f_ffff ... UNUSED
  24  */
  25
  26 /* SPL */
  27 #include "imx6_spl.h"                   /* common IMX6 SPL configuration */
  28 #define CONFIG_SYS_SPI_U_BOOT_OFFS      0x11400
  29 #define CONFIG_SPL_SPI_LOAD
  30 #define CONFIG_SPL_TARGET               "u-boot-with-spl.imx"
  31
  32 /* Miscellaneous configurable options */
  33 #define CONFIG_SYS_LONGHELP
  34 #define CONFIG_AUTO_COMPLETE
  35 #define CONFIG_CMDLINE_EDITING
  36
  37 #define CONFIG_CMDLINE_TAG
  38 #define CONFIG_SETUP_MEMORY_TAGS
  39 #define CONFIG_INITRD_TAG
  40 #define CONFIG_REVISION_TAG
  41
  42 #define CONFIG_SUPPORT_RAW_INITRD       /* bootz raw initrd support */
  43 #define CONFIG_BOUNCE_BUFFER
  44 #define CONFIG_BZIP2
  45
  46 /* Size of malloc() pool */
  47 #define CONFIG_SYS_MALLOC_LEN           (4 * SZ_1M)
  48
  49 /* Bootcounter */
  50 #define CONFIG_SYS_BOOTCOUNT_ADDR       IRAM_BASE_ADDR
  51 #define CONFIG_SYS_BOOTCOUNT_BE
  52
  53 /* FEC ethernet */
  54 #define CONFIG_MII
  55 #define IMX_FEC_BASE                    ENET_BASE_ADDR
  56 #define CONFIG_FEC_XCV_TYPE             RMII
  57 #define CONFIG_ETHPRIME                 "FEC"
  58 #define CONFIG_FEC_MXC_PHYADDR          0
  59 #define CONFIG_ARP_TIMEOUT              200UL
  60
  61 /* Fuses */
  62 #ifdef CONFIG_CMD_FUSE
  63 #define CONFIG_MXC_OCOTP
  64 #endif
  65
  66 /* I2C Configs */
  67 #define CONFIG_SYS_I2C
  68 #define CONFIG_SYS_I2C_MXC
  69 #define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
  70 #define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
  71 #define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 3 */
  72 #define CONFIG_SYS_I2C_SPEED            100000
  73
  74 /* MMC Configs */
  75 #define CONFIG_FSL_ESDHC
  76 #define CONFIG_FSL_USDHC
  77 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
  78 #define CONFIG_SYS_FSL_USDHC_NUM        3
  79 #define CONFIG_SYS_MMC_ENV_DEV          2 /* 1 = SDHC3, 2 = SDHC4 (eMMC) */
  80
  81 /* SATA Configs */
  82 #ifdef CONFIG_CMD_SATA
  83 #define CONFIG_SYS_SATA_MAX_DEVICE      1
  84 #define CONFIG_DWC_AHSATA_PORT_ID       0
  85 #define CONFIG_DWC_AHSATA_BASE_ADDR     SATA_ARB_BASE_ADDR
  86 #define CONFIG_LBA48
  87 #endif
  88
  89 /* SPI Flash Configs */
  90 #ifdef CONFIG_CMD_SF
  91 #define CONFIG_SF_DEFAULT_BUS           0
  92 #define CONFIG_SF_DEFAULT_CS            0
  93 #define CONFIG_SF_DEFAULT_SPEED         25000000
  94 #define CONFIG_SF_DEFAULT_MODE          (SPI_MODE_0)
  95 #endif
  96
  97 /* UART */
  98 #define CONFIG_MXC_UART
  99 #define CONFIG_MXC_UART_BASE            UART1_BASE
 100 #define CONFIG_CONS_INDEX               1
 101 #define CONFIG_BAUDRATE                 115200
 102
 103 /* USB Configs */
 104 #ifdef CONFIG_CMD_USB
 105 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 106 #define CONFIG_USB_HOST_ETHER
 107 #define CONFIG_USB_ETHER_ASIX
 108 #define CONFIG_MXC_USB_PORTSC           (PORT_PTS_UTMI | PORT_PTS_PTW)
 109 #define CONFIG_MXC_USB_FLAGS            0
 110 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */
 111
 112 /* USB Gadget (DFU, UMS) */
 113 #if defined(CONFIG_CMD_DFU) || defined(CONFIG_CMD_USB_MASS_STORAGE)
 114 #define CONFIG_SYS_DFU_DATA_BUF_SIZE    (16 * 1024 * 1024)
 115 #define DFU_DEFAULT_POLL_TIMEOUT        300
 116
 117 /* USB IDs */
 118 #define CONFIG_G_DNL_UMS_VENDOR_NUM     0x0525
 119 #define CONFIG_G_DNL_UMS_PRODUCT_NUM    0xA4A5
 120 #endif
 121 #endif
 122
 123 /* Watchdog */
 124 #define CONFIG_HW_WATCHDOG
 125 #define CONFIG_IMX_WATCHDOG
 126 #define CONFIG_WATCHDOG_TIMEOUT_MSECS   60000
 127
 128 /* allow to overwrite serial and ethaddr */
 129 #define CONFIG_ENV_OVERWRITE
 130
 131 #define CONFIG_LOADADDR                 0x12000000
 132 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
 133
 134 #ifndef CONFIG_SPL_BUILD
 135 #define CONFIG_EXTRA_ENV_SETTINGS       \
 136         "console=ttymxc0,115200\0"      \
 137         "fdt_addr=0x18000000\0"         \
 138         "fdt_high=0xffffffff\0"         \
 139         "initrd_high=0xffffffff\0"      \
 140         "kernel_addr_r=0x10008000\0"    \
 141         "fdt_addr_r=0x13000000\0"       \
 142         "ramdisk_addr_r=0x18000000\0"   \
 143         "scriptaddr=0x14000000\0"       \
 144         "fdtfile=imx6q-dhcom-pdk2.dtb\0"\
 145         BOOTENV
 146
 147 #define CONFIG_BOOTCOMMAND              "run distro_bootcmd"
 148
 149 #define BOOT_TARGET_DEVICES(func) \
 150         func(MMC, mmc, 0) \
 151         func(MMC, mmc, 2) \
 152         func(USB, usb, 1) \
 153         func(SATA, sata, 0) \
 154         func(DHCP, dhcp, na)
 155
 156 #include <config_distro_bootcmd.h>
 157 #endif
 158
 159 /* Physical Memory Map */
 160 #define CONFIG_NR_DRAM_BANKS            1
 161 #define PHYS_SDRAM                      MMDC0_ARB_BASE_ADDR
 162
 163 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM
 164 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
 165 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
 166
 167 #define CONFIG_SYS_INIT_SP_OFFSET \
 168         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 169
 170 #define CONFIG_SYS_INIT_SP_ADDR \
 171         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 172
 173 #define CONFIG_SYS_MEMTEST_START        0x10000000
 174 #define CONFIG_SYS_MEMTEST_END          0x20000000
 175 #define CONFIG_SYS_MEMTEST_SCRATCH      0x10800000
 176
 177 /* Environment */
 178 #define CONFIG_ENV_SIZE                 (16 * 1024)
 179 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
 180
 181 #if defined(CONFIG_ENV_IS_IN_SPI_FLASH)
 182 #define CONFIG_ENV_OFFSET               (1024 * 1024)
 183 #define CONFIG_ENV_SECT_SIZE            (64 * 1024)
 184 #define CONFIG_ENV_OFFSET_REDUND        \
 185         (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE)
 186 #define CONFIG_ENV_SIZE_REDUND          CONFIG_ENV_SIZE
 187 #define CONFIG_ENV_SPI_BUS              CONFIG_SF_DEFAULT_BUS
 188 #define CONFIG_ENV_SPI_CS               CONFIG_SF_DEFAULT_CS
 189 #define CONFIG_ENV_SPI_MODE             CONFIG_SF_DEFAULT_MODE
 190 #define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
 191 #endif
 192
 193 #endif  /* __DH_IMX6_CONFIG_H */