include/configs/h2200.h

   1 /*
   2  * iPAQ h2200 board configuration
   3  *
   4  * Copyright (C) 2012 Lukasz Dalek <luk0104@gmail.com>
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #ifndef __CONFIG_H
  10 #define __CONFIG_H
  11
  12 #define CONFIG_MACH_TYPE                MACH_TYPE_H2200
  13
  14 #define CONFIG_CPU_PXA25X               1
  15 #define CONFIG_BOARD_H2200
  16
  17 #define CONFIG_NR_DRAM_BANKS            1
  18 #define PHYS_SDRAM_1                    0xa0000000 /* SDRAM Bank #1 */
  19 #define PHYS_SDRAM_1_SIZE               0x04000000 /* 64 MB */
  20
  21 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
  22 #define CONFIG_SYS_SDRAM_SIZE           PHYS_SDRAM_1_SIZE
  23
  24 #define CONFIG_SYS_INIT_SP_ADDR         0xfffff800
  25
  26 #define CONFIG_ENV_SIZE                 0x00040000
  27 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 128*1024)
  28
  29 #define CONFIG_ENV_IS_NOWHERE
  30 #define CONFIG_SYS_MAXARGS              16
  31 #define CONFIG_SYS_LOAD_ADDR            0xa3000000 /* default load address */
  32
  33 /*
  34  * iPAQ 1st stage bootloader loads 2nd stage bootloader
  35  * at address 0xa0040000 but bootloader requires header
  36  * which is 0x1000 long.
  37  *
  38  * --- Header begin ---
  39  *      .word 0xea0003fe ; b 0x1000
  40  *
  41  *      .org 0x40
  42  *      .ascii "ECEC"
  43  *
  44  *      .org 0x1000
  45  * --- Header end ---
  46  */
  47
  48 #define CONFIG_SYS_TEXT_BASE            0xa0041000
  49
  50 /*
  51  * Static chips
  52  */
  53
  54 #define CONFIG_SYS_MSC0_VAL             0x246c7ffc
  55 #define CONFIG_SYS_MSC1_VAL             0x7ff07ff0
  56 #define CONFIG_SYS_MSC2_VAL             0x7ff07ff0
  57
  58 /*
  59  * PCMCIA and CF Interfaces
  60  */
  61
  62 #define CONFIG_SYS_MECR_VAL             0x00000000
  63 #define CONFIG_SYS_MCMEM0_VAL           0x00000000
  64 #define CONFIG_SYS_MCMEM1_VAL           0x00000000
  65 #define CONFIG_SYS_MCATT0_VAL           0x00000000
  66 #define CONFIG_SYS_MCATT1_VAL           0x00000000
  67 #define CONFIG_SYS_MCIO0_VAL            0x00000000
  68 #define CONFIG_SYS_MCIO1_VAL            0x00000000
  69
  70 #define CONFIG_SYS_FLYCNFG_VAL          0x00000000
  71 #define CONFIG_SYS_SXCNFG_VAL           0x00040004
  72
  73 #define CONFIG_SYS_MDREFR_VAL           0x0099E018
  74 #define CONFIG_SYS_MDCNFG_VAL           0x01C801CB
  75 #define CONFIG_SYS_MDMRS_VAL            0x00220022
  76
  77 #define CONFIG_SYS_PSSR_VAL             0x00000000
  78 #define CONFIG_SYS_CKEN                 0x00004840
  79 #define CONFIG_SYS_CCCR                 0x00000161
  80
  81 /*
  82  * GPIOs
  83  */
  84
  85 #define CONFIG_SYS_GPSR0_VAL            0x01000000
  86 #define CONFIG_SYS_GPSR1_VAL            0x00000000
  87 #define CONFIG_SYS_GPSR2_VAL            0x00010000
  88
  89 #define CONFIG_SYS_GPCR0_VAL            0x00000000
  90 #define CONFIG_SYS_GPCR1_VAL            0x00000000
  91 #define CONFIG_SYS_GPCR2_VAL            0x00000000
  92
  93 #define CONFIG_SYS_GPDR0_VAL            0xF7E38C00
  94 #define CONFIG_SYS_GPDR1_VAL            0xBCFFBF83
  95 #define CONFIG_SYS_GPDR2_VAL            0x000157FF
  96
  97 #define CONFIG_SYS_GAFR0_L_VAL          0x80401000
  98 #define CONFIG_SYS_GAFR0_U_VAL          0x00000112
  99 #define CONFIG_SYS_GAFR1_L_VAL          0x600A9550
 100 #define CONFIG_SYS_GAFR1_U_VAL          0x0005AAAA
 101 #define CONFIG_SYS_GAFR2_L_VAL          0x20000000
 102 #define CONFIG_SYS_GAFR2_U_VAL          0x00000000
 103
 104 /*
 105  * Serial port
 106  */
 107 #define CONFIG_FFUART
 108 #define CONFIG_CONS_INDEX               3
 109
 110 #define CONFIG_BAUDRATE                 115200
 111 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 38400, 115200 }
 112
 113 #define CONFIG_FIT_DISABLE_SHA256
 114 #define CONFIG_SETUP_MEMORY_TAGS
 115 #define CONFIG_CMDLINE_TAG
 116 #define CONFIG_INITRD_TAG
 117
 118 /* Monitor Command Prompt */
 119
 120 /* Console I/O Buffer Size */
 121 #define CONFIG_SYS_CBSIZE               256
 122
 123 /* Print Buffer Size */
 124 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 125                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 126
 127 #define CONFIG_BOOTARGS "root=/dev/ram0 ro console=ttyS0,115200n8"
 128
 129 #define CONFIG_USB_DEV_PULLUP_GPIO      33
 130 /* USB VBUS GPIO 3 */
 131
 132 #define CONFIG_BOOTCOMMAND              \
 133         "setenv downloaded 0 ; while test $downloaded -eq 0 ; do " \
 134         "if bootp ; then setenv downloaded 1 ; fi ; done ; " \
 135         "source :script ; " \
 136         "bootm ; "
 137
 138 #define CONFIG_USB_GADGET_PXA2XX
 139 #define CONFIG_USB_ETHER
 140 #define CONFIG_USB_ETH_SUBSET
 141
 142 #define CONFIG_USBNET_DEV_ADDR          "de:ad:be:ef:00:01"
 143 #define CONFIG_USBNET_HOST_ADDR "de:ad:be:ef:00:02"
 144 #define CONFIG_EXTRA_ENV_SETTINGS \
 145         "stdin=serial\0" \
 146         "stdout=serial\0" \
 147         "stderr=serial\0"
 148
 149 #endif /* __CONFIG_H */