include/configs/highbank.h

   1 /*
   2  * Copyright 2010-2011 Calxeda, Inc.
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #ifndef __CONFIG_H
   8 #define __CONFIG_H
   9
  10 #define CONFIG_SYS_DCACHE_OFF
  11
  12 #define CONFIG_SYS_BOOTMAPSZ            (16 << 20)
  13
  14 #define CONFIG_SYS_TIMER_RATE           (150000000/256)
  15 #define CONFIG_SYS_TIMER_COUNTER        (0xFFF34000 + 0x4)
  16 #define CONFIG_SYS_TIMER_COUNTS_DOWN
  17
  18 /*
  19  * Size of malloc() pool
  20  */
  21 #define CONFIG_SYS_MALLOC_LEN           (512 * 1024)
  22
  23 #define CONFIG_PL011_CLOCK              150000000
  24 #define CONFIG_PL01x_PORTS              { (void *)(0xFFF36000) }
  25 #define CONFIG_CONS_INDEX               0
  26
  27 #define CONFIG_SYS_BOOTCOUNT_LE         /* Use little-endian accessors */
  28 #define CONFIG_SYS_BOOTCOUNT_ADDR       0xfff3cf0c
  29
  30 #define CONFIG_MISC_INIT_R
  31 #define CONFIG_SCSI_AHCI_PLAT
  32 #define CONFIG_SYS_SCSI_MAX_SCSI_ID     5
  33 #define CONFIG_SYS_SCSI_MAX_LUN         1
  34 #define CONFIG_SYS_SCSI_MAX_DEVICE      (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
  35                                         CONFIG_SYS_SCSI_MAX_LUN)
  36
  37 #define CONFIG_CALXEDA_XGMAC
  38
  39 /*
  40  * Command line configuration.
  41  */
  42
  43 #define CONFIG_BOOT_RETRY_TIME          -1
  44 #define CONFIG_RESET_TO_RETRY
  45
  46 /*
  47  * Miscellaneous configurable options
  48  */
  49 #define CONFIG_SYS_CBSIZE               1024    /* Console I/O Buffer Size */
  50 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
  51
  52 #define CONFIG_SYS_LOAD_ADDR            0x800000
  53 #define CONFIG_SYS_64BIT_LBA
  54
  55 /*-----------------------------------------------------------------------
  56  * Physical Memory Map
  57  * The DRAM is already setup, so do not touch the DT node later.
  58  */
  59 #define CONFIG_NR_DRAM_BANKS            0
  60 #define PHYS_SDRAM_1_SIZE               (4089 << 20)
  61 #define CONFIG_SYS_MEMTEST_START        0x100000
  62 #define CONFIG_SYS_MEMTEST_END          (PHYS_SDRAM_1_SIZE - 0x100000)
  63
  64 /* Environment data setup
  65 */
  66 #define CONFIG_SYS_NVRAM_BASE_ADDR      0xfff88000      /* NVRAM base address */
  67 #define CONFIG_SYS_NVRAM_SIZE           0x8000          /* NVRAM size */
  68 #define CONFIG_ENV_SIZE                 0x2000          /* Size of Environ */
  69 #define CONFIG_ENV_ADDR                 CONFIG_SYS_NVRAM_BASE_ADDR
  70
  71 #define CONFIG_SYS_SDRAM_BASE           0x00000000
  72 #define CONFIG_SYS_INIT_SP_ADDR         0x01000000
  73 #define CONFIG_SKIP_LOWLEVEL_INIT
  74
  75 #endif