include/configs/microblaze-generic.h

   1 /*
   2  * (C) Copyright 2007-2010 Michal Simek
   3  *
   4  * Michal SIMEK <monstr@monstr.eu>
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #ifndef __CONFIG_H
  10 #define __CONFIG_H
  11
  12 #include "../board/xilinx/microblaze-generic/xparameters.h"
  13
  14 /* MicroBlaze CPU */
  15 #define MICROBLAZE_V5           1
  16
  17 /* linear and spi flash memory */
  18 #ifdef XILINX_FLASH_START
  19 #define FLASH
  20 #undef  SPIFLASH
  21 #undef  RAMENV  /* hold environment in flash */
  22 #else
  23 #ifdef XILINX_SPI_FLASH_BASEADDR
  24 #undef  FLASH
  25 #define SPIFLASH
  26 #undef  RAMENV  /* hold environment in flash */
  27 #else
  28 #undef  FLASH
  29 #undef  SPIFLASH
  30 #define RAMENV  /* hold environment in RAM */
  31 #endif
  32 #endif
  33
  34 /* uart */
  35 #ifdef XILINX_UARTLITE_BASEADDR
  36 # define CONFIG_XILINX_UARTLITE
  37 # define CONFIG_SERIAL_BASE     XILINX_UARTLITE_BASEADDR
  38 # define CONFIG_BAUDRATE        XILINX_UARTLITE_BAUDRATE
  39 # define CONFIG_SYS_BAUDRATE_TABLE      { CONFIG_BAUDRATE }
  40 # define CONSOLE_ARG    "console=console=ttyUL0,115200\0"
  41 #elif XILINX_UART16550_BASEADDR
  42 # define CONFIG_SYS_NS16550             1
  43 # define CONFIG_SYS_NS16550_SERIAL
  44 # if defined(__MICROBLAZEEL__)
  45 #  define CONFIG_SYS_NS16550_REG_SIZE   -4
  46 # else
  47 #  define CONFIG_SYS_NS16550_REG_SIZE   4
  48 # endif
  49 # define CONFIG_CONS_INDEX              1
  50 # define CONFIG_SYS_NS16550_COM1 \
  51                 ((XILINX_UART16550_BASEADDR & ~0xF) + 0x1000)
  52 # define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ
  53 # define CONFIG_BAUDRATE        115200
  54
  55 /* The following table includes the supported baudrates */
  56 # define CONFIG_SYS_BAUDRATE_TABLE \
  57         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
  58 # define CONSOLE_ARG    "console=console=ttyS0,115200\0"
  59 #else
  60 # error Undefined uart
  61 #endif
  62
  63 /* setting reset address */
  64 /*#define       CONFIG_SYS_RESET_ADDRESS        CONFIG_SYS_TEXT_BASE*/
  65
  66 /* ethernet */
  67 #undef CONFIG_SYS_ENET
  68 #if defined(XILINX_EMACLITE_BASEADDR) || defined(CONFIG_OF_CONTROL)
  69 # define CONFIG_XILINX_EMACLITE 1
  70 # define CONFIG_SYS_ENET
  71 #endif
  72 #if defined(XILINX_LLTEMAC_BASEADDR)
  73 # define CONFIG_XILINX_LL_TEMAC 1
  74 # define CONFIG_SYS_ENET
  75 #endif
  76 #if defined(XILINX_AXIEMAC_BASEADDR)
  77 # define CONFIG_XILINX_AXIEMAC  1
  78 # define CONFIG_SYS_ENET
  79 #endif
  80
  81 #undef ET_DEBUG
  82
  83 /* gpio */
  84 #ifdef XILINX_GPIO_BASEADDR
  85 # define CONFIG_XILINX_GPIO
  86 # define CONFIG_SYS_GPIO_0_ADDR         XILINX_GPIO_BASEADDR
  87 #endif
  88
  89 /* interrupt controller */
  90 #ifdef XILINX_INTC_BASEADDR
  91 # define CONFIG_SYS_INTC_0_ADDR         XILINX_INTC_BASEADDR
  92 # define CONFIG_SYS_INTC_0_NUM          XILINX_INTC_NUM_INTR_INPUTS
  93 #endif
  94
  95 /* timer */
  96 #if defined(XILINX_TIMER_BASEADDR) && defined(XILINX_TIMER_IRQ)
  97 #  define CONFIG_SYS_TIMER_0_ADDR       XILINX_TIMER_BASEADDR
  98 #  define CONFIG_SYS_TIMER_0_IRQ        XILINX_TIMER_IRQ
  99 #endif
 100
 101 /* watchdog */
 102 #if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ)
 103 # define CONFIG_WATCHDOG_BASEADDR       XILINX_WATCHDOG_BASEADDR
 104 # define CONFIG_WATCHDOG_IRQ            XILINX_WATCHDOG_IRQ
 105 # define CONFIG_HW_WATCHDOG
 106 # define CONFIG_XILINX_TB_WATCHDOG
 107 #endif
 108
 109 /*
 110  * memory layout - Example
 111  * CONFIG_SYS_TEXT_BASE = 0x1200_0000;  defined in config.mk
 112  * CONFIG_SYS_SRAM_BASE = 0x1000_0000;
 113  * CONFIG_SYS_SRAM_SIZE = 0x0400_0000;  64MB
 114  *
 115  * CONFIG_SYS_MONITOR_LEN = 0x40000
 116  * CONFIG_SYS_MALLOC_LEN = 3 * CONFIG_SYS_MONITOR_LEN = 0xC0000
 117  *
 118  * CONFIG_SYS_GBL_DATA_OFFSET = 0x1000_0000 + 0x0400_0000 - 0x1000 = 0x13FF_F000
 119  * CONFIG_SYS_MONITOR_BASE = 0x13FF_F000 - CONFIG_SYS_MONITOR_LEN = 0x13FB_F000
 120  * CONFIG_SYS_MALLOC_BASE = 0x13FB_F000 - CONFIG_SYS_MALLOC_LEN = 0x13EF_F000
 121  *
 122  * 0x1000_0000  CONFIG_SYS_SDRAM_BASE
 123  *                                      MEMTEST_AREA     64kB
 124  *                                      FREE
 125  * 0x1200_0000  CONFIG_SYS_TEXT_BASE
 126  *              U-BOOT code
 127  * 0x1202_0000
 128  *                                      FREE
 129  *
 130  *                                      STACK
 131  * 0x13EF_F000  CONFIG_SYS_MALLOC_BASE
 132  *                                      MALLOC_AREA     768kB   Alloc
 133  * 0x13FB_F000  CONFIG_SYS_MONITOR_BASE
 134  *                                      MONITOR_CODE    256kB   Env
 135  * 0x13FF_F000  CONFIG_SYS_GBL_DATA_OFFSET
 136  *                                      GLOBAL_DATA     4kB     bd, gd
 137  * 0x1400_0000  CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE
 138  */
 139
 140 /* ddr sdram - main memory */
 141 #define CONFIG_SYS_SDRAM_BASE           XILINX_RAM_START
 142 #define CONFIG_SYS_SDRAM_SIZE           XILINX_RAM_SIZE
 143 #define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE
 144 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_SDRAM_BASE + 0x1000)
 145
 146 /* global pointer */
 147 /* start of global data */
 148 #define CONFIG_SYS_GBL_DATA_OFFSET \
 149                 (CONFIG_SYS_SDRAM_SIZE - GENERATED_GBL_DATA_SIZE)
 150
 151 /* monitor code */
 152 #define SIZE                            0x40000
 153 #define CONFIG_SYS_MONITOR_LEN          SIZE
 154 #define CONFIG_SYS_MONITOR_BASE \
 155                 (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_GBL_DATA_OFFSET \
 156                         - CONFIG_SYS_MONITOR_LEN - GENERATED_BD_INFO_SIZE)
 157 #define CONFIG_SYS_MONITOR_END \
 158                         (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
 159 #define CONFIG_SYS_MALLOC_LEN           (SIZE * 3)
 160 #define CONFIG_SYS_MALLOC_BASE \
 161                         (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
 162
 163 /* stack */
 164 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_MALLOC_BASE
 165
 166 /*
 167  * CFI flash memory layout - Example
 168  * CONFIG_SYS_FLASH_BASE = 0x2200_0000;
 169  * CONFIG_SYS_FLASH_SIZE = 0x0080_0000;   8MB
 170  *
 171  * SECT_SIZE = 0x20000;                 128kB is one sector
 172  * CONFIG_ENV_SIZE = SECT_SIZE;         128kB environment store
 173  *
 174  * 0x2200_0000  CONFIG_SYS_FLASH_BASE
 175  *                                      FREE            256kB
 176  * 0x2204_0000  CONFIG_ENV_ADDR
 177  *                                      ENV_AREA        128kB
 178  * 0x2206_0000
 179  *                                      FREE
 180  * 0x2280_0000  CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE
 181  *
 182  */
 183
 184 #ifdef FLASH
 185 # define CONFIG_SYS_FLASH_BASE          XILINX_FLASH_START
 186 # define CONFIG_SYS_FLASH_SIZE          XILINX_FLASH_SIZE
 187 # define CONFIG_SYS_FLASH_CFI           1
 188 # define CONFIG_FLASH_CFI_DRIVER        1
 189 /* ?empty sector */
 190 # define CONFIG_SYS_FLASH_EMPTY_INFO    1
 191 /* max number of memory banks */
 192 # define CONFIG_SYS_MAX_FLASH_BANKS     1
 193 /* max number of sectors on one chip */
 194 # define CONFIG_SYS_MAX_FLASH_SECT      512
 195 /* hardware flash protection */
 196 # define CONFIG_SYS_FLASH_PROTECTION
 197 /* use buffered writes (20x faster) */
 198 # define        CONFIG_SYS_FLASH_USE_BUFFER_WRITE       1
 199 # ifdef RAMENV
 200 #  define CONFIG_ENV_IS_NOWHERE 1
 201 #  define CONFIG_ENV_SIZE       0x1000
 202 #  define CONFIG_ENV_ADDR       (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
 203
 204 # else  /* FLASH && !RAMENV */
 205 #  define CONFIG_ENV_IS_IN_FLASH        1
 206 /* 128K(one sector) for env */
 207 #  define CONFIG_ENV_SECT_SIZE  0x20000
 208 #  define CONFIG_ENV_ADDR \
 209                         (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
 210 #  define CONFIG_ENV_SIZE       0x20000
 211 # endif /* FLASH && !RAMBOOT */
 212 #else /* !FLASH */
 213
 214 #ifdef SPIFLASH
 215 # define CONFIG_SYS_NO_FLASH            1
 216 # define CONFIG_SYS_SPI_BASE            XILINX_SPI_FLASH_BASEADDR
 217 # define CONFIG_XILINX_SPI              1
 218 # define CONFIG_SPI                     1
 219 # define CONFIG_SPI_FLASH               1
 220 # define CONFIG_SPI_FLASH_STMICRO       1
 221 # define CONFIG_SF_DEFAULT_MODE         SPI_MODE_3
 222 # define CONFIG_SF_DEFAULT_SPEED        XILINX_SPI_FLASH_MAX_FREQ
 223 # define CONFIG_SF_DEFAULT_CS           XILINX_SPI_FLASH_CS
 224
 225 # ifdef RAMENV
 226 #  define CONFIG_ENV_IS_NOWHERE 1
 227 #  define CONFIG_ENV_SIZE       0x1000
 228 #  define CONFIG_ENV_ADDR       (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
 229
 230 # else  /* SPIFLASH && !RAMENV */
 231 #  define CONFIG_ENV_IS_IN_SPI_FLASH    1
 232 #  define CONFIG_ENV_SPI_MODE           SPI_MODE_3
 233 #  define CONFIG_ENV_SPI_MAX_HZ         CONFIG_SF_DEFAULT_SPEED
 234 #  define CONFIG_ENV_SPI_CS             CONFIG_SF_DEFAULT_CS
 235 /* 128K(two sectors) for env */
 236 #  define CONFIG_ENV_SECT_SIZE  0x10000
 237 #  define CONFIG_ENV_SIZE       (2 * CONFIG_ENV_SECT_SIZE)
 238 /* Warning: adjust the offset in respect of other flash content and size */
 239 #  define CONFIG_ENV_OFFSET     (128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */
 240 # endif /* SPIFLASH && !RAMBOOT */
 241 #else /* !SPIFLASH */
 242
 243 /* ENV in RAM */
 244 # define CONFIG_SYS_NO_FLASH    1
 245 # define CONFIG_ENV_IS_NOWHERE  1
 246 # define CONFIG_ENV_SIZE        0x1000
 247 # define CONFIG_ENV_ADDR        (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
 248 #endif /* !SPIFLASH */
 249 #endif /* !FLASH */
 250
 251 /* system ace */
 252 #ifdef XILINX_SYSACE_BASEADDR
 253 # define CONFIG_SYSTEMACE
 254 /* #define DEBUG_SYSTEMACE */
 255 # define SYSTEMACE_CONFIG_FPGA
 256 # define CONFIG_SYS_SYSTEMACE_BASE      XILINX_SYSACE_BASEADDR
 257 # define CONFIG_SYS_SYSTEMACE_WIDTH     XILINX_SYSACE_MEM_WIDTH
 258 # define CONFIG_DOS_PARTITION
 259 #endif
 260
 261 #if defined(XILINX_USE_ICACHE)
 262 # define CONFIG_ICACHE
 263 #else
 264 # undef CONFIG_ICACHE
 265 #endif
 266
 267 #if defined(XILINX_USE_DCACHE)
 268 # define CONFIG_DCACHE
 269 #else
 270 # undef CONFIG_DCACHE
 271 #endif
 272
 273 #ifndef XILINX_DCACHE_BYTE_SIZE
 274 #define XILINX_DCACHE_BYTE_SIZE 32768
 275 #endif
 276
 277 /*
 278  * BOOTP options
 279  */
 280 #define CONFIG_BOOTP_BOOTFILESIZE
 281 #define CONFIG_BOOTP_BOOTPATH
 282 #define CONFIG_BOOTP_GATEWAY
 283 #define CONFIG_BOOTP_HOSTNAME
 284
 285 /*
 286  * Command line configuration.
 287  */
 288 #include <config_cmd_default.h>
 289
 290 #define CONFIG_CMD_ASKENV
 291 #define CONFIG_CMD_IRQ
 292 #define CONFIG_CMD_MFSL
 293 #define CONFIG_CMD_ECHO
 294 #define CONFIG_CMD_GPIO
 295
 296 #if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE)
 297 # define CONFIG_CMD_CACHE
 298 #else
 299 # undef CONFIG_CMD_CACHE
 300 #endif
 301
 302 #ifndef CONFIG_SYS_ENET
 303 # undef CONFIG_CMD_NET
 304 # undef CONFIG_CMD_NFS
 305 #else
 306 # define CONFIG_CMD_PING
 307 # define CONFIG_CMD_DHCP
 308 # define CONFIG_CMD_TFTPPUT
 309 #endif
 310
 311 #if defined(CONFIG_SYSTEMACE)
 312 # define CONFIG_CMD_EXT2
 313 # define CONFIG_CMD_FAT
 314 #endif
 315
 316 #if defined(FLASH)
 317 # define CONFIG_CMD_ECHO
 318 # define CONFIG_CMD_FLASH
 319 # define CONFIG_CMD_IMLS
 320 # define CONFIG_CMD_JFFS2
 321 # define CONFIG_CMD_UBI
 322 # undef CONFIG_CMD_UBIFS
 323
 324 # if !defined(RAMENV)
 325 #  define CONFIG_CMD_SAVEENV
 326 #  define CONFIG_CMD_SAVES
 327 # endif
 328
 329 #else
 330 #if defined(SPIFLASH)
 331 # define CONFIG_CMD_SF
 332
 333 # if !defined(RAMENV)
 334 #  define CONFIG_CMD_SAVEENV
 335 #  define CONFIG_CMD_SAVES
 336 # endif
 337 #else
 338 # undef CONFIG_CMD_IMLS
 339 # undef CONFIG_CMD_FLASH
 340 # undef CONFIG_CMD_JFFS2
 341 # undef CONFIG_CMD_UBI
 342 # undef CONFIG_CMD_UBIFS
 343 #endif
 344 #endif
 345
 346 #if defined(CONFIG_CMD_JFFS2)
 347 # define CONFIG_MTD_PARTITIONS
 348 #endif
 349
 350 #if defined(CONFIG_CMD_UBIFS)
 351 # define CONFIG_CMD_UBI
 352 # define CONFIG_LZO
 353 #endif
 354
 355 #if defined(CONFIG_CMD_UBI)
 356 # define CONFIG_MTD_PARTITIONS
 357 # define CONFIG_RBTREE
 358 #endif
 359
 360 #if defined(CONFIG_MTD_PARTITIONS)
 361 /* MTD partitions */
 362 #define CONFIG_CMD_MTDPARTS     /* mtdparts command line support */
 363 #define CONFIG_MTD_DEVICE       /* needed for mtdparts commands */
 364 #define CONFIG_FLASH_CFI_MTD
 365 #define MTDIDS_DEFAULT          "nor0=flash-0"
 366
 367 /* default mtd partition table */
 368 #define MTDPARTS_DEFAULT        "mtdparts=flash-0:256k(u-boot),"\
 369                                 "256k(env),3m(kernel),1m(romfs),"\
 370                                 "1m(cramfs),-(jffs2)"
 371 #endif
 372
 373 /* Miscellaneous configurable options */
 374 #define CONFIG_SYS_PROMPT       "U-Boot-mONStR> "
 375 /* size of console buffer */
 376 #define CONFIG_SYS_CBSIZE       512
 377  /* print buffer size */
 378 #define CONFIG_SYS_PBSIZE \
 379                 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 380 /* max number of command args */
 381 #define CONFIG_SYS_MAXARGS      15
 382 #define CONFIG_SYS_LONGHELP
 383 /* default load address */
 384 #define CONFIG_SYS_LOAD_ADDR    XILINX_RAM_START
 385
 386 #define CONFIG_BOOTDELAY        -1      /* -1 disables auto-boot */
 387 #define CONFIG_BOOTARGS         "root=romfs"
 388 #define CONFIG_HOSTNAME         XILINX_BOARD_NAME
 389 #define CONFIG_BOOTCOMMAND      "base 0;tftp 11000000 image.img;bootm"
 390 #define CONFIG_IPADDR           192.168.0.3
 391 #define CONFIG_SERVERIP         192.168.0.5
 392 #define CONFIG_GATEWAYIP        192.168.0.1
 393 #define CONFIG_ETHADDR          00:E0:0C:00:00:FD
 394
 395 /* architecture dependent code */
 396 #define CONFIG_SYS_USR_EXCEP    /* user exception */
 397
 398 #define CONFIG_PREBOOT  "echo U-BOOT for ${hostname};setenv preboot;echo"
 399
 400 #define CONFIG_EXTRA_ENV_SETTINGS       "unlock=yes\0" \
 401                                         "nor0=flash-0\0"\
 402                                         "mtdparts=mtdparts=flash-0:"\
 403                                         "256k(u-boot),256k(env),3m(kernel),"\
 404                                         "1m(romfs),1m(cramfs),-(jffs2)\0"\
 405                                         "nc=setenv stdout nc;"\
 406                                         "setenv stdin nc\0" \
 407                                         "serial=setenv stdout serial;"\
 408                                         "setenv stdin serial\0"
 409
 410 #define CONFIG_CMDLINE_EDITING
 411
 412 #define CONFIG_NETCONSOLE
 413 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 414
 415 /* Use the HUSH parser */
 416 #define CONFIG_SYS_HUSH_PARSER
 417
 418 /* Enable flat device tree support */
 419 #define CONFIG_LMB              1
 420 #define CONFIG_FIT              1
 421 #define CONFIG_OF_LIBFDT        1
 422
 423 #if defined(CONFIG_XILINX_LL_TEMAC) || defined(CONFIG_XILINX_AXIEMAC)
 424 # define CONFIG_MII             1
 425 # define CONFIG_CMD_MII         1
 426 # define CONFIG_PHY_GIGE        1
 427 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN        1
 428 # define CONFIG_PHYLIB          1
 429 # define CONFIG_PHY_ATHEROS     1
 430 # define CONFIG_PHY_BROADCOM    1
 431 # define CONFIG_PHY_DAVICOM     1
 432 # define CONFIG_PHY_LXT         1
 433 # define CONFIG_PHY_MARVELL     1
 434 # define CONFIG_PHY_MICREL      1
 435 # define CONFIG_PHY_NATSEMI     1
 436 # define CONFIG_PHY_REALTEK     1
 437 # define CONFIG_PHY_VITESSE     1
 438 #else
 439 # undef CONFIG_MII
 440 # undef CONFIG_CMD_MII
 441 # undef CONFIG_PHYLIB
 442 #endif
 443
 444 /* SPL part */
 445 #define CONFIG_CMD_SPL
 446 #define CONFIG_SPL_FRAMEWORK
 447 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 448 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 449 #define CONFIG_SPL_SERIAL_SUPPORT
 450 #define CONFIG_SPL_BOARD_INIT
 451
 452 #define CONFIG_SPL_LDSCRIPT     "arch/microblaze/cpu/u-boot-spl.lds"
 453
 454 #define CONFIG_SPL_RAM_DEVICE
 455 #define CONFIG_SPL_NOR_SUPPORT
 456
 457 /* for booting directly linux */
 458 #define CONFIG_SPL_OS_BOOT
 459
 460 #define CONFIG_SYS_OS_BASE              (CONFIG_SYS_FLASH_BASE + \
 461                                          0x60000)
 462 #define CONFIG_SYS_FDT_BASE             (CONFIG_SYS_FLASH_BASE + \
 463                                          0x40000)
 464 #define CONFIG_SYS_SPL_ARGS_ADDR        (CONFIG_SYS_TEXT_BASE + \
 465                                          0x1000000)
 466
 467 /* SP location before relocation, must use scratch RAM */
 468 /* BRAM start */
 469 #define CONFIG_SYS_INIT_RAM_ADDR        0x0
 470 /* BRAM size - will be generated */
 471 #define CONFIG_SYS_INIT_RAM_SIZE        0x10000
 472 /* Stack pointer prior relocation, must situated at on-chip RAM */
 473 #define CONFIG_SYS_SPL_MALLOC_END       (CONFIG_SYS_INIT_RAM_ADDR + \
 474                                          CONFIG_SYS_INIT_RAM_SIZE - \
 475                                          GENERATED_GBL_DATA_SIZE)
 476
 477 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100
 478
 479 /*
 480  * The main reason to do it in this way is that MALLOC_START
 481  * can't be defined - common/spl/spl.c
 482  */
 483 #if (CONFIG_SYS_SPL_MALLOC_SIZE != 0)
 484 # define CONFIG_SYS_SPL_MALLOC_START    (CONFIG_SYS_SPL_MALLOC_END - \
 485                                          CONFIG_SYS_SPL_MALLOC_SIZE)
 486 # define CONFIG_SPL_STACK_ADDR          CONFIG_SYS_SPL_MALLOC_START
 487 #else
 488 # define CONFIG_SPL_STACK_ADDR          CONFIG_SYS_SPL_MALLOC_END
 489 #endif
 490
 491 /* Just for sure that there is a space for stack */
 492 #define CONFIG_SPL_STACK_SIZE           0x100
 493
 494 #define CONFIG_SYS_UBOOT_BASE           CONFIG_SYS_FLASH_BASE
 495 #define CONFIG_SYS_UBOOT_START          CONFIG_SYS_TEXT_BASE
 496
 497 #define CONFIG_SPL_MAX_FOOTPRINT        (CONFIG_SYS_INIT_RAM_SIZE - \
 498                                          CONFIG_SYS_INIT_RAM_ADDR - \
 499                                          GENERATED_GBL_DATA_SIZE - \
 500                                          CONFIG_SYS_SPL_MALLOC_SIZE - \
 501                                          CONFIG_SPL_STACK_SIZE)
 502
 503 #endif  /* __CONFIG_H */