include/configs/microblaze-generic.h

   1 /*
   2  * (C) Copyright 2007-2010 Michal Simek
   3  *
   4  * Michal SIMEK <monstr@monstr.eu>
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #ifndef __CONFIG_H
  10 #define __CONFIG_H
  11
  12 #include "../board/xilinx/microblaze-generic/xparameters.h"
  13
  14 /* MicroBlaze CPU */
  15 #define MICROBLAZE_V5           1
  16
  17 /* linear and spi flash memory */
  18 #ifdef XILINX_FLASH_START
  19 #define FLASH
  20 #undef  SPIFLASH
  21 #undef  RAMENV  /* hold environment in flash */
  22 #else
  23 #ifdef XILINX_SPI_FLASH_BASEADDR
  24 #undef  FLASH
  25 #define SPIFLASH
  26 #undef  RAMENV  /* hold environment in flash */
  27 #else
  28 #undef  FLASH
  29 #undef  SPIFLASH
  30 #define RAMENV  /* hold environment in RAM */
  31 #endif
  32 #endif
  33
  34 /* uart */
  35 #ifdef XILINX_UARTLITE_BASEADDR
  36 # define CONFIG_XILINX_UARTLITE
  37 # define CONFIG_SERIAL_BASE     XILINX_UARTLITE_BASEADDR
  38 # define CONFIG_BAUDRATE        XILINX_UARTLITE_BAUDRATE
  39 # define CONFIG_SYS_BAUDRATE_TABLE      { CONFIG_BAUDRATE }
  40 # define CONSOLE_ARG    "console=console=ttyUL0,115200\0"
  41 #elif XILINX_UART16550_BASEADDR
  42 # define CONFIG_SYS_NS16550             1
  43 # define CONFIG_SYS_NS16550_SERIAL
  44 # if defined(__MICROBLAZEEL__)
  45 #  define CONFIG_SYS_NS16550_REG_SIZE   -4
  46 # else
  47 #  define CONFIG_SYS_NS16550_REG_SIZE   4
  48 # endif
  49 # define CONFIG_CONS_INDEX              1
  50 # define CONFIG_SYS_NS16550_COM1 \
  51                 ((XILINX_UART16550_BASEADDR & ~0xF) + 0x1000)
  52 # define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ
  53 # define CONFIG_BAUDRATE        115200
  54
  55 /* The following table includes the supported baudrates */
  56 # define CONFIG_SYS_BAUDRATE_TABLE \
  57         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
  58 # define CONSOLE_ARG    "console=console=ttyS0,115200\0"
  59 #else
  60 # error Undefined uart
  61 #endif
  62
  63 /* setting reset address */
  64 /*#define       CONFIG_SYS_RESET_ADDRESS        CONFIG_SYS_TEXT_BASE*/
  65
  66 /* ethernet */
  67 #undef CONFIG_SYS_ENET
  68 #if defined(XILINX_EMACLITE_BASEADDR) || defined(CONFIG_OF_CONTROL)
  69 # define CONFIG_XILINX_EMACLITE 1
  70 # define CONFIG_SYS_ENET
  71 #endif
  72 #if defined(XILINX_LLTEMAC_BASEADDR)
  73 # define CONFIG_XILINX_LL_TEMAC 1
  74 # define CONFIG_SYS_ENET
  75 #endif
  76 #if defined(XILINX_AXIEMAC_BASEADDR)
  77 # define CONFIG_XILINX_AXIEMAC  1
  78 # define CONFIG_SYS_ENET
  79 #endif
  80
  81 #undef ET_DEBUG
  82
  83 /* gpio */
  84 #ifdef XILINX_GPIO_BASEADDR
  85 # define CONFIG_XILINX_GPIO
  86 # define CONFIG_SYS_GPIO_0_ADDR         XILINX_GPIO_BASEADDR
  87 #endif
  88
  89 /* interrupt controller */
  90 #ifdef XILINX_INTC_BASEADDR
  91 # define CONFIG_SYS_INTC_0_ADDR         XILINX_INTC_BASEADDR
  92 # define CONFIG_SYS_INTC_0_NUM          XILINX_INTC_NUM_INTR_INPUTS
  93 #endif
  94
  95 /* timer */
  96 #if defined(XILINX_TIMER_BASEADDR) && defined(XILINX_TIMER_IRQ)
  97 #  define CONFIG_SYS_TIMER_0_ADDR       XILINX_TIMER_BASEADDR
  98 #  define CONFIG_SYS_TIMER_0_IRQ        XILINX_TIMER_IRQ
  99 #endif
 100
 101 /* watchdog */
 102 #if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ)
 103 # define CONFIG_WATCHDOG_BASEADDR       XILINX_WATCHDOG_BASEADDR
 104 # define CONFIG_WATCHDOG_IRQ            XILINX_WATCHDOG_IRQ
 105 # define CONFIG_HW_WATCHDOG
 106 # define CONFIG_XILINX_TB_WATCHDOG
 107 #endif
 108
 109 #ifndef CONFIG_OF_CONTROL
 110 /* ddr sdram - main memory */
 111 # define CONFIG_SYS_SDRAM_BASE  XILINX_RAM_START
 112 # define CONFIG_SYS_SDRAM_SIZE  XILINX_RAM_SIZE
 113 #endif
 114
 115 #define CONFIG_SYS_MALLOC_LEN   0xC0000
 116 #ifndef CONFIG_SPL_BUILD
 117 # define CONFIG_SYS_MALLOC_F_LEN        1024
 118 #else
 119 # define CONFIG_SYS_MALLOC_SIMPLE
 120 # define CONFIG_SYS_MALLOC_F_LEN        0x150
 121 #endif
 122
 123 /* Stack location before relocation */
 124 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_TEXT_BASE
 125
 126 /*
 127  * CFI flash memory layout - Example
 128  * CONFIG_SYS_FLASH_BASE = 0x2200_0000;
 129  * CONFIG_SYS_FLASH_SIZE = 0x0080_0000;   8MB
 130  *
 131  * SECT_SIZE = 0x20000;                 128kB is one sector
 132  * CONFIG_ENV_SIZE = SECT_SIZE;         128kB environment store
 133  *
 134  * 0x2200_0000  CONFIG_SYS_FLASH_BASE
 135  *                                      FREE            256kB
 136  * 0x2204_0000  CONFIG_ENV_ADDR
 137  *                                      ENV_AREA        128kB
 138  * 0x2206_0000
 139  *                                      FREE
 140  * 0x2280_0000  CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE
 141  *
 142  */
 143
 144 #ifdef FLASH
 145 # define CONFIG_SYS_FLASH_BASE          XILINX_FLASH_START
 146 # define CONFIG_SYS_FLASH_SIZE          XILINX_FLASH_SIZE
 147 # define CONFIG_SYS_FLASH_CFI           1
 148 # define CONFIG_FLASH_CFI_DRIVER        1
 149 /* ?empty sector */
 150 # define CONFIG_SYS_FLASH_EMPTY_INFO    1
 151 /* max number of memory banks */
 152 # define CONFIG_SYS_MAX_FLASH_BANKS     1
 153 /* max number of sectors on one chip */
 154 # define CONFIG_SYS_MAX_FLASH_SECT      512
 155 /* hardware flash protection */
 156 # define CONFIG_SYS_FLASH_PROTECTION
 157 /* use buffered writes (20x faster) */
 158 # define        CONFIG_SYS_FLASH_USE_BUFFER_WRITE       1
 159 # ifdef RAMENV
 160 #  define CONFIG_ENV_IS_NOWHERE 1
 161 #  define CONFIG_ENV_SIZE       0x1000
 162 #  define CONFIG_ENV_ADDR       (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
 163
 164 # else  /* FLASH && !RAMENV */
 165 #  define CONFIG_ENV_IS_IN_FLASH        1
 166 /* 128K(one sector) for env */
 167 #  define CONFIG_ENV_SECT_SIZE  0x20000
 168 #  define CONFIG_ENV_ADDR \
 169                         (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
 170 #  define CONFIG_ENV_SIZE       0x20000
 171 # endif /* FLASH && !RAMBOOT */
 172 #else /* !FLASH */
 173
 174 #ifdef SPIFLASH
 175 # define CONFIG_SYS_NO_FLASH            1
 176 # define CONFIG_SYS_SPI_BASE            XILINX_SPI_FLASH_BASEADDR
 177 # define CONFIG_XILINX_SPI              1
 178 # define CONFIG_SPI                     1
 179 # define CONFIG_SPI_FLASH               1
 180 # define CONFIG_SPI_FLASH_STMICRO       1
 181 # define CONFIG_SF_DEFAULT_MODE         SPI_MODE_3
 182 # define CONFIG_SF_DEFAULT_SPEED        XILINX_SPI_FLASH_MAX_FREQ
 183 # define CONFIG_SF_DEFAULT_CS           XILINX_SPI_FLASH_CS
 184
 185 # ifdef RAMENV
 186 #  define CONFIG_ENV_IS_NOWHERE 1
 187 #  define CONFIG_ENV_SIZE       0x1000
 188 #  define CONFIG_ENV_ADDR       (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
 189
 190 # else  /* SPIFLASH && !RAMENV */
 191 #  define CONFIG_ENV_IS_IN_SPI_FLASH    1
 192 #  define CONFIG_ENV_SPI_MODE           SPI_MODE_3
 193 #  define CONFIG_ENV_SPI_MAX_HZ         CONFIG_SF_DEFAULT_SPEED
 194 #  define CONFIG_ENV_SPI_CS             CONFIG_SF_DEFAULT_CS
 195 /* 128K(two sectors) for env */
 196 #  define CONFIG_ENV_SECT_SIZE  0x10000
 197 #  define CONFIG_ENV_SIZE       (2 * CONFIG_ENV_SECT_SIZE)
 198 /* Warning: adjust the offset in respect of other flash content and size */
 199 #  define CONFIG_ENV_OFFSET     (128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */
 200 # endif /* SPIFLASH && !RAMBOOT */
 201 #else /* !SPIFLASH */
 202
 203 /* ENV in RAM */
 204 # define CONFIG_SYS_NO_FLASH    1
 205 # define CONFIG_ENV_IS_NOWHERE  1
 206 # define CONFIG_ENV_SIZE        0x1000
 207 # define CONFIG_ENV_ADDR        (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
 208 #endif /* !SPIFLASH */
 209 #endif /* !FLASH */
 210
 211 /* system ace */
 212 #ifdef XILINX_SYSACE_BASEADDR
 213 # define CONFIG_SYSTEMACE
 214 /* #define DEBUG_SYSTEMACE */
 215 # define SYSTEMACE_CONFIG_FPGA
 216 # define CONFIG_SYS_SYSTEMACE_BASE      XILINX_SYSACE_BASEADDR
 217 # define CONFIG_SYS_SYSTEMACE_WIDTH     XILINX_SYSACE_MEM_WIDTH
 218 # define CONFIG_DOS_PARTITION
 219 #endif
 220
 221 #if defined(XILINX_USE_ICACHE)
 222 # define CONFIG_ICACHE
 223 #else
 224 # undef CONFIG_ICACHE
 225 #endif
 226
 227 #if defined(XILINX_USE_DCACHE)
 228 # define CONFIG_DCACHE
 229 #else
 230 # undef CONFIG_DCACHE
 231 #endif
 232
 233 #ifndef XILINX_DCACHE_BYTE_SIZE
 234 #define XILINX_DCACHE_BYTE_SIZE 32768
 235 #endif
 236
 237 /*
 238  * BOOTP options
 239  */
 240 #define CONFIG_BOOTP_BOOTFILESIZE
 241 #define CONFIG_BOOTP_BOOTPATH
 242 #define CONFIG_BOOTP_GATEWAY
 243 #define CONFIG_BOOTP_HOSTNAME
 244
 245 /*
 246  * Command line configuration.
 247  */
 248 #include <config_cmd_default.h>
 249
 250 #define CONFIG_CMD_ASKENV
 251 #define CONFIG_CMD_IRQ
 252 #define CONFIG_CMD_MFSL
 253 #define CONFIG_CMD_ECHO
 254 #define CONFIG_CMD_GPIO
 255
 256 #if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE)
 257 # define CONFIG_CMD_CACHE
 258 #else
 259 # undef CONFIG_CMD_CACHE
 260 #endif
 261
 262 #ifndef CONFIG_SYS_ENET
 263 # undef CONFIG_CMD_NET
 264 # undef CONFIG_CMD_NFS
 265 #else
 266 # define CONFIG_CMD_PING
 267 # define CONFIG_CMD_DHCP
 268 # define CONFIG_CMD_TFTPPUT
 269 #endif
 270
 271 #if defined(CONFIG_SYSTEMACE)
 272 # define CONFIG_CMD_EXT2
 273 # define CONFIG_CMD_FAT
 274 #endif
 275
 276 #if defined(FLASH)
 277 # define CONFIG_CMD_ECHO
 278 # define CONFIG_CMD_FLASH
 279 # define CONFIG_CMD_IMLS
 280 # define CONFIG_CMD_JFFS2
 281 # define CONFIG_CMD_UBI
 282 # undef CONFIG_CMD_UBIFS
 283
 284 # if !defined(RAMENV)
 285 #  define CONFIG_CMD_SAVEENV
 286 #  define CONFIG_CMD_SAVES
 287 # endif
 288
 289 #else
 290 #if defined(SPIFLASH)
 291 # define CONFIG_CMD_SF
 292
 293 # if !defined(RAMENV)
 294 #  define CONFIG_CMD_SAVEENV
 295 #  define CONFIG_CMD_SAVES
 296 # endif
 297 #else
 298 # undef CONFIG_CMD_IMLS
 299 # undef CONFIG_CMD_FLASH
 300 # undef CONFIG_CMD_JFFS2
 301 # undef CONFIG_CMD_UBI
 302 # undef CONFIG_CMD_UBIFS
 303 #endif
 304 #endif
 305
 306 #if defined(CONFIG_CMD_JFFS2)
 307 # define CONFIG_MTD_PARTITIONS
 308 #endif
 309
 310 #if defined(CONFIG_CMD_UBIFS)
 311 # define CONFIG_CMD_UBI
 312 # define CONFIG_LZO
 313 #endif
 314
 315 #if defined(CONFIG_CMD_UBI)
 316 # define CONFIG_MTD_PARTITIONS
 317 # define CONFIG_RBTREE
 318 #endif
 319
 320 #if defined(CONFIG_MTD_PARTITIONS)
 321 /* MTD partitions */
 322 #define CONFIG_CMD_MTDPARTS     /* mtdparts command line support */
 323 #define CONFIG_MTD_DEVICE       /* needed for mtdparts commands */
 324 #define CONFIG_FLASH_CFI_MTD
 325 #define MTDIDS_DEFAULT          "nor0=flash-0"
 326
 327 /* default mtd partition table */
 328 #define MTDPARTS_DEFAULT        "mtdparts=flash-0:256k(u-boot),"\
 329                                 "256k(env),3m(kernel),1m(romfs),"\
 330                                 "1m(cramfs),-(jffs2)"
 331 #endif
 332
 333 /* Miscellaneous configurable options */
 334 #define CONFIG_SYS_PROMPT       "U-Boot-mONStR> "
 335 /* size of console buffer */
 336 #define CONFIG_SYS_CBSIZE       512
 337  /* print buffer size */
 338 #define CONFIG_SYS_PBSIZE \
 339                 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 340 /* max number of command args */
 341 #define CONFIG_SYS_MAXARGS      15
 342 #define CONFIG_SYS_LONGHELP
 343 /* default load address */
 344 #define CONFIG_SYS_LOAD_ADDR    XILINX_RAM_START
 345
 346 #define CONFIG_BOOTDELAY        -1      /* -1 disables auto-boot */
 347 #define CONFIG_BOOTARGS         "root=romfs"
 348 #define CONFIG_HOSTNAME         XILINX_BOARD_NAME
 349 #define CONFIG_BOOTCOMMAND      "base 0;tftp 11000000 image.img;bootm"
 350 #define CONFIG_IPADDR           192.168.0.3
 351 #define CONFIG_SERVERIP         192.168.0.5
 352 #define CONFIG_GATEWAYIP        192.168.0.1
 353
 354 /* architecture dependent code */
 355 #define CONFIG_SYS_USR_EXCEP    /* user exception */
 356
 357 #define CONFIG_PREBOOT  "echo U-BOOT for ${hostname};setenv preboot;echo"
 358
 359 #define CONFIG_EXTRA_ENV_SETTINGS       "unlock=yes\0" \
 360                                         "nor0=flash-0\0"\
 361                                         "mtdparts=mtdparts=flash-0:"\
 362                                         "256k(u-boot),256k(env),3m(kernel),"\
 363                                         "1m(romfs),1m(cramfs),-(jffs2)\0"\
 364                                         "nc=setenv stdout nc;"\
 365                                         "setenv stdin nc\0" \
 366                                         "serial=setenv stdout serial;"\
 367                                         "setenv stdin serial\0"
 368
 369 #define CONFIG_CMDLINE_EDITING
 370
 371 #define CONFIG_NETCONSOLE
 372 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 373
 374 /* Use the HUSH parser */
 375 #define CONFIG_SYS_HUSH_PARSER
 376
 377 /* Enable flat device tree support */
 378 #define CONFIG_LMB              1
 379 #define CONFIG_FIT              1
 380 #define CONFIG_OF_LIBFDT        1
 381
 382 #if defined(CONFIG_XILINX_LL_TEMAC) || defined(CONFIG_XILINX_AXIEMAC)
 383 # define CONFIG_MII             1
 384 # define CONFIG_CMD_MII         1
 385 # define CONFIG_PHY_GIGE        1
 386 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN        1
 387 # define CONFIG_PHYLIB          1
 388 # define CONFIG_PHY_ATHEROS     1
 389 # define CONFIG_PHY_BROADCOM    1
 390 # define CONFIG_PHY_DAVICOM     1
 391 # define CONFIG_PHY_LXT         1
 392 # define CONFIG_PHY_MARVELL     1
 393 # define CONFIG_PHY_MICREL      1
 394 # define CONFIG_PHY_NATSEMI     1
 395 # define CONFIG_PHY_REALTEK     1
 396 # define CONFIG_PHY_VITESSE     1
 397 #else
 398 # undef CONFIG_MII
 399 # undef CONFIG_CMD_MII
 400 # undef CONFIG_PHYLIB
 401 #endif
 402
 403 /* SPL part */
 404 #define CONFIG_CMD_SPL
 405 #define CONFIG_SPL_FRAMEWORK
 406 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 407 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 408 #define CONFIG_SPL_SERIAL_SUPPORT
 409 #define CONFIG_SPL_BOARD_INIT
 410
 411 #define CONFIG_SPL_LDSCRIPT     "arch/microblaze/cpu/u-boot-spl.lds"
 412
 413 #define CONFIG_SPL_RAM_DEVICE
 414 #ifdef CONFIG_SYS_FLASH_BASE
 415 # define CONFIG_SPL_NOR_SUPPORT
 416 # define CONFIG_SYS_UBOOT_BASE          CONFIG_SYS_FLASH_BASE
 417 #endif
 418
 419 /* for booting directly linux */
 420 #define CONFIG_SPL_OS_BOOT
 421
 422 #define CONFIG_SYS_OS_BASE              (CONFIG_SYS_FLASH_BASE + \
 423                                          0x60000)
 424 #define CONFIG_SYS_FDT_BASE             (CONFIG_SYS_FLASH_BASE + \
 425                                          0x40000)
 426 #define CONFIG_SYS_SPL_ARGS_ADDR        (CONFIG_SYS_TEXT_BASE + \
 427                                          0x1000000)
 428
 429 /* SP location before relocation, must use scratch RAM */
 430 /* BRAM start */
 431 #define CONFIG_SYS_INIT_RAM_ADDR        0x0
 432 /* BRAM size - will be generated */
 433 #define CONFIG_SYS_INIT_RAM_SIZE        0x100000
 434
 435 # define CONFIG_SPL_STACK_ADDR          (CONFIG_SYS_INIT_RAM_ADDR + \
 436                                          CONFIG_SYS_INIT_RAM_SIZE - \
 437                                          CONFIG_SYS_MALLOC_F_LEN)
 438
 439 /* Just for sure that there is a space for stack */
 440 #define CONFIG_SPL_STACK_SIZE           0x100
 441
 442 #define CONFIG_SYS_UBOOT_START          CONFIG_SYS_TEXT_BASE
 443
 444 #define CONFIG_SPL_MAX_FOOTPRINT        (CONFIG_SYS_INIT_RAM_SIZE - \
 445                                          CONFIG_SYS_INIT_RAM_ADDR - \
 446                                          CONFIG_SYS_MALLOC_F_LEN - \
 447                                          CONFIG_SPL_STACK_SIZE)
 448
 449 #endif  /* __CONFIG_H */