include/configs/microblaze-generic.h

   1 /*
   2  * (C) Copyright 2007-2010 Michal Simek
   3  *
   4  * Michal SIMEK <monstr@monstr.eu>
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #ifndef __CONFIG_H
  10 #define __CONFIG_H
  11
  12 #include "../board/xilinx/microblaze-generic/xparameters.h"
  13
  14 /* MicroBlaze CPU */
  15 #define MICROBLAZE_V5           1
  16
  17 /* Open Firmware DTS */
  18 #define CONFIG_OF_CONTROL       1
  19 #define CONFIG_OF_EMBED         1
  20 #define CONFIG_DEFAULT_DEVICE_TREE microblaze-generic
  21
  22 /* linear and spi flash memory */
  23 #ifdef XILINX_FLASH_START
  24 #define FLASH
  25 #undef  SPIFLASH
  26 #undef  RAMENV  /* hold environment in flash */
  27 #else
  28 #ifdef XILINX_SPI_FLASH_BASEADDR
  29 #undef  FLASH
  30 #define SPIFLASH
  31 #undef  RAMENV  /* hold environment in flash */
  32 #else
  33 #undef  FLASH
  34 #undef  SPIFLASH
  35 #define RAMENV  /* hold environment in RAM */
  36 #endif
  37 #endif
  38
  39 /* uart */
  40 #ifdef XILINX_UARTLITE_BASEADDR
  41 # define CONFIG_XILINX_UARTLITE
  42 # define CONFIG_SERIAL_BASE     XILINX_UARTLITE_BASEADDR
  43 # define CONFIG_BAUDRATE        XILINX_UARTLITE_BAUDRATE
  44 # define CONFIG_SYS_BAUDRATE_TABLE      { CONFIG_BAUDRATE }
  45 # define CONSOLE_ARG    "console=console=ttyUL0,115200\0"
  46 #elif XILINX_UART16550_BASEADDR
  47 # define CONFIG_SYS_NS16550             1
  48 # define CONFIG_SYS_NS16550_SERIAL
  49 # if defined(__MICROBLAZEEL__)
  50 #  define CONFIG_SYS_NS16550_REG_SIZE   -4
  51 # else
  52 #  define CONFIG_SYS_NS16550_REG_SIZE   4
  53 # endif
  54 # define CONFIG_CONS_INDEX              1
  55 # define CONFIG_SYS_NS16550_COM1 \
  56                 ((XILINX_UART16550_BASEADDR & ~0xF) + 0x1000)
  57 # define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ
  58 # define CONFIG_BAUDRATE        115200
  59
  60 /* The following table includes the supported baudrates */
  61 # define CONFIG_SYS_BAUDRATE_TABLE \
  62         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
  63 # define CONSOLE_ARG    "console=console=ttyS0,115200\0"
  64 #else
  65 # error Undefined uart
  66 #endif
  67
  68 /* setting reset address */
  69 /*#define       CONFIG_SYS_RESET_ADDRESS        CONFIG_SYS_TEXT_BASE*/
  70
  71 /* ethernet */
  72 #undef CONFIG_SYS_ENET
  73 #if defined(XILINX_EMACLITE_BASEADDR) || defined(CONFIG_OF_CONTROL)
  74 # define CONFIG_XILINX_EMACLITE 1
  75 # define CONFIG_SYS_ENET
  76 #endif
  77 #if defined(XILINX_LLTEMAC_BASEADDR)
  78 # define CONFIG_XILINX_LL_TEMAC 1
  79 # define CONFIG_SYS_ENET
  80 #endif
  81 #if defined(XILINX_AXIEMAC_BASEADDR)
  82 # define CONFIG_XILINX_AXIEMAC  1
  83 # define CONFIG_SYS_ENET
  84 #endif
  85
  86 #undef ET_DEBUG
  87
  88 /* gpio */
  89 #ifdef XILINX_GPIO_BASEADDR
  90 # define CONFIG_XILINX_GPIO
  91 # define CONFIG_SYS_GPIO_0_ADDR         XILINX_GPIO_BASEADDR
  92 #endif
  93
  94 /* interrupt controller */
  95 #ifdef XILINX_INTC_BASEADDR
  96 # define CONFIG_SYS_INTC_0_ADDR         XILINX_INTC_BASEADDR
  97 # define CONFIG_SYS_INTC_0_NUM          XILINX_INTC_NUM_INTR_INPUTS
  98 #endif
  99
 100 /* timer */
 101 #if defined(XILINX_TIMER_BASEADDR) && defined(XILINX_TIMER_IRQ)
 102 #  define CONFIG_SYS_TIMER_0_ADDR       XILINX_TIMER_BASEADDR
 103 #  define CONFIG_SYS_TIMER_0_IRQ        XILINX_TIMER_IRQ
 104 #endif
 105
 106 /* watchdog */
 107 #if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ)
 108 # define CONFIG_WATCHDOG_BASEADDR       XILINX_WATCHDOG_BASEADDR
 109 # define CONFIG_WATCHDOG_IRQ            XILINX_WATCHDOG_IRQ
 110 # define CONFIG_HW_WATCHDOG
 111 # define CONFIG_XILINX_TB_WATCHDOG
 112 #endif
 113
 114 /*
 115  * memory layout - Example
 116  * CONFIG_SYS_TEXT_BASE = 0x1200_0000;  defined in config.mk
 117  * CONFIG_SYS_SRAM_BASE = 0x1000_0000;
 118  * CONFIG_SYS_SRAM_SIZE = 0x0400_0000;  64MB
 119  *
 120  * CONFIG_SYS_MONITOR_LEN = 0x40000
 121  * CONFIG_SYS_MALLOC_LEN = 3 * CONFIG_SYS_MONITOR_LEN = 0xC0000
 122  *
 123  * CONFIG_SYS_GBL_DATA_OFFSET = 0x1000_0000 + 0x0400_0000 - 0x1000 = 0x13FF_F000
 124  * CONFIG_SYS_MONITOR_BASE = 0x13FF_F000 - CONFIG_SYS_MONITOR_LEN = 0x13FB_F000
 125  * CONFIG_SYS_MALLOC_BASE = 0x13FB_F000 - CONFIG_SYS_MALLOC_LEN = 0x13EF_F000
 126  *
 127  * 0x1000_0000  CONFIG_SYS_SDRAM_BASE
 128  *                                      MEMTEST_AREA     64kB
 129  *                                      FREE
 130  * 0x1200_0000  CONFIG_SYS_TEXT_BASE
 131  *              U-BOOT code
 132  * 0x1202_0000
 133  *                                      FREE
 134  *
 135  *                                      STACK
 136  * 0x13EF_F000  CONFIG_SYS_MALLOC_BASE
 137  *                                      MALLOC_AREA     768kB   Alloc
 138  * 0x13FB_F000  CONFIG_SYS_MONITOR_BASE
 139  *                                      MONITOR_CODE    256kB   Env
 140  * 0x13FF_F000  CONFIG_SYS_GBL_DATA_OFFSET
 141  *                                      GLOBAL_DATA     4kB     bd, gd
 142  * 0x1400_0000  CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE
 143  */
 144
 145 /* ddr sdram - main memory */
 146 #define CONFIG_SYS_SDRAM_BASE           XILINX_RAM_START
 147 #define CONFIG_SYS_SDRAM_SIZE           XILINX_RAM_SIZE
 148 #define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE
 149 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_SDRAM_BASE + 0x1000)
 150
 151 /* global pointer */
 152 /* start of global data */
 153 #define CONFIG_SYS_GBL_DATA_OFFSET \
 154                 (CONFIG_SYS_SDRAM_SIZE - GENERATED_GBL_DATA_SIZE)
 155
 156 /* monitor code */
 157 #define SIZE                            0x40000
 158 #define CONFIG_SYS_MONITOR_LEN          SIZE
 159 #define CONFIG_SYS_MONITOR_BASE \
 160                 (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_GBL_DATA_OFFSET \
 161                         - CONFIG_SYS_MONITOR_LEN - GENERATED_BD_INFO_SIZE)
 162 #define CONFIG_SYS_MONITOR_END \
 163                         (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
 164 #define CONFIG_SYS_MALLOC_LEN           (SIZE * 3)
 165 #define CONFIG_SYS_MALLOC_BASE \
 166                         (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
 167
 168 /* stack */
 169 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_MALLOC_BASE
 170
 171 /*
 172  * CFI flash memory layout - Example
 173  * CONFIG_SYS_FLASH_BASE = 0x2200_0000;
 174  * CONFIG_SYS_FLASH_SIZE = 0x0080_0000;   8MB
 175  *
 176  * SECT_SIZE = 0x20000;                 128kB is one sector
 177  * CONFIG_ENV_SIZE = SECT_SIZE;         128kB environment store
 178  *
 179  * 0x2200_0000  CONFIG_SYS_FLASH_BASE
 180  *                                      FREE            256kB
 181  * 0x2204_0000  CONFIG_ENV_ADDR
 182  *                                      ENV_AREA        128kB
 183  * 0x2206_0000
 184  *                                      FREE
 185  * 0x2280_0000  CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE
 186  *
 187  */
 188
 189 #ifdef FLASH
 190 # define CONFIG_SYS_FLASH_BASE          XILINX_FLASH_START
 191 # define CONFIG_SYS_FLASH_SIZE          XILINX_FLASH_SIZE
 192 # define CONFIG_SYS_FLASH_CFI           1
 193 # define CONFIG_FLASH_CFI_DRIVER        1
 194 /* ?empty sector */
 195 # define CONFIG_SYS_FLASH_EMPTY_INFO    1
 196 /* max number of memory banks */
 197 # define CONFIG_SYS_MAX_FLASH_BANKS     1
 198 /* max number of sectors on one chip */
 199 # define CONFIG_SYS_MAX_FLASH_SECT      512
 200 /* hardware flash protection */
 201 # define CONFIG_SYS_FLASH_PROTECTION
 202 /* use buffered writes (20x faster) */
 203 # define        CONFIG_SYS_FLASH_USE_BUFFER_WRITE       1
 204 # ifdef RAMENV
 205 #  define CONFIG_ENV_IS_NOWHERE 1
 206 #  define CONFIG_ENV_SIZE       0x1000
 207 #  define CONFIG_ENV_ADDR       (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
 208
 209 # else  /* FLASH && !RAMENV */
 210 #  define CONFIG_ENV_IS_IN_FLASH        1
 211 /* 128K(one sector) for env */
 212 #  define CONFIG_ENV_SECT_SIZE  0x20000
 213 #  define CONFIG_ENV_ADDR \
 214                         (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
 215 #  define CONFIG_ENV_SIZE       0x20000
 216 # endif /* FLASH && !RAMBOOT */
 217 #else /* !FLASH */
 218
 219 #ifdef SPIFLASH
 220 # define CONFIG_SYS_NO_FLASH            1
 221 # define CONFIG_SYS_SPI_BASE            XILINX_SPI_FLASH_BASEADDR
 222 # define CONFIG_XILINX_SPI              1
 223 # define CONFIG_SPI                     1
 224 # define CONFIG_SPI_FLASH               1
 225 # define CONFIG_SPI_FLASH_STMICRO       1
 226 # define CONFIG_SF_DEFAULT_MODE         SPI_MODE_3
 227 # define CONFIG_SF_DEFAULT_SPEED        XILINX_SPI_FLASH_MAX_FREQ
 228 # define CONFIG_SF_DEFAULT_CS           XILINX_SPI_FLASH_CS
 229
 230 # ifdef RAMENV
 231 #  define CONFIG_ENV_IS_NOWHERE 1
 232 #  define CONFIG_ENV_SIZE       0x1000
 233 #  define CONFIG_ENV_ADDR       (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
 234
 235 # else  /* SPIFLASH && !RAMENV */
 236 #  define CONFIG_ENV_IS_IN_SPI_FLASH    1
 237 #  define CONFIG_ENV_SPI_MODE           SPI_MODE_3
 238 #  define CONFIG_ENV_SPI_MAX_HZ         CONFIG_SF_DEFAULT_SPEED
 239 #  define CONFIG_ENV_SPI_CS             CONFIG_SF_DEFAULT_CS
 240 /* 128K(two sectors) for env */
 241 #  define CONFIG_ENV_SECT_SIZE  0x10000
 242 #  define CONFIG_ENV_SIZE       (2 * CONFIG_ENV_SECT_SIZE)
 243 /* Warning: adjust the offset in respect of other flash content and size */
 244 #  define CONFIG_ENV_OFFSET     (128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */
 245 # endif /* SPIFLASH && !RAMBOOT */
 246 #else /* !SPIFLASH */
 247
 248 /* ENV in RAM */
 249 # define CONFIG_SYS_NO_FLASH    1
 250 # define CONFIG_ENV_IS_NOWHERE  1
 251 # define CONFIG_ENV_SIZE        0x1000
 252 # define CONFIG_ENV_ADDR        (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
 253 #endif /* !SPIFLASH */
 254 #endif /* !FLASH */
 255
 256 /* system ace */
 257 #ifdef XILINX_SYSACE_BASEADDR
 258 # define CONFIG_SYSTEMACE
 259 /* #define DEBUG_SYSTEMACE */
 260 # define SYSTEMACE_CONFIG_FPGA
 261 # define CONFIG_SYS_SYSTEMACE_BASE      XILINX_SYSACE_BASEADDR
 262 # define CONFIG_SYS_SYSTEMACE_WIDTH     XILINX_SYSACE_MEM_WIDTH
 263 # define CONFIG_DOS_PARTITION
 264 #endif
 265
 266 #if defined(XILINX_USE_ICACHE)
 267 # define CONFIG_ICACHE
 268 #else
 269 # undef CONFIG_ICACHE
 270 #endif
 271
 272 #if defined(XILINX_USE_DCACHE)
 273 # define CONFIG_DCACHE
 274 #else
 275 # undef CONFIG_DCACHE
 276 #endif
 277
 278 #ifndef XILINX_DCACHE_BYTE_SIZE
 279 #define XILINX_DCACHE_BYTE_SIZE 32768
 280 #endif
 281
 282 /*
 283  * BOOTP options
 284  */
 285 #define CONFIG_BOOTP_BOOTFILESIZE
 286 #define CONFIG_BOOTP_BOOTPATH
 287 #define CONFIG_BOOTP_GATEWAY
 288 #define CONFIG_BOOTP_HOSTNAME
 289
 290 /*
 291  * Command line configuration.
 292  */
 293 #include <config_cmd_default.h>
 294
 295 #define CONFIG_CMD_ASKENV
 296 #define CONFIG_CMD_IRQ
 297 #define CONFIG_CMD_MFSL
 298 #define CONFIG_CMD_ECHO
 299 #define CONFIG_CMD_GPIO
 300
 301 #if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE)
 302 # define CONFIG_CMD_CACHE
 303 #else
 304 # undef CONFIG_CMD_CACHE
 305 #endif
 306
 307 #ifndef CONFIG_SYS_ENET
 308 # undef CONFIG_CMD_NET
 309 # undef CONFIG_CMD_NFS
 310 #else
 311 # define CONFIG_CMD_PING
 312 # define CONFIG_CMD_DHCP
 313 # define CONFIG_CMD_TFTPPUT
 314 #endif
 315
 316 #if defined(CONFIG_SYSTEMACE)
 317 # define CONFIG_CMD_EXT2
 318 # define CONFIG_CMD_FAT
 319 #endif
 320
 321 #if defined(FLASH)
 322 # define CONFIG_CMD_ECHO
 323 # define CONFIG_CMD_FLASH
 324 # define CONFIG_CMD_IMLS
 325 # define CONFIG_CMD_JFFS2
 326 # define CONFIG_CMD_UBI
 327 # undef CONFIG_CMD_UBIFS
 328
 329 # if !defined(RAMENV)
 330 #  define CONFIG_CMD_SAVEENV
 331 #  define CONFIG_CMD_SAVES
 332 # endif
 333
 334 #else
 335 #if defined(SPIFLASH)
 336 # define CONFIG_CMD_SF
 337
 338 # if !defined(RAMENV)
 339 #  define CONFIG_CMD_SAVEENV
 340 #  define CONFIG_CMD_SAVES
 341 # endif
 342 #else
 343 # undef CONFIG_CMD_IMLS
 344 # undef CONFIG_CMD_FLASH
 345 # undef CONFIG_CMD_JFFS2
 346 # undef CONFIG_CMD_UBI
 347 # undef CONFIG_CMD_UBIFS
 348 #endif
 349 #endif
 350
 351 #if defined(CONFIG_CMD_JFFS2)
 352 # define CONFIG_MTD_PARTITIONS
 353 #endif
 354
 355 #if defined(CONFIG_CMD_UBIFS)
 356 # define CONFIG_CMD_UBI
 357 # define CONFIG_LZO
 358 #endif
 359
 360 #if defined(CONFIG_CMD_UBI)
 361 # define CONFIG_MTD_PARTITIONS
 362 # define CONFIG_RBTREE
 363 #endif
 364
 365 #if defined(CONFIG_MTD_PARTITIONS)
 366 /* MTD partitions */
 367 #define CONFIG_CMD_MTDPARTS     /* mtdparts command line support */
 368 #define CONFIG_MTD_DEVICE       /* needed for mtdparts commands */
 369 #define CONFIG_FLASH_CFI_MTD
 370 #define MTDIDS_DEFAULT          "nor0=flash-0"
 371
 372 /* default mtd partition table */
 373 #define MTDPARTS_DEFAULT        "mtdparts=flash-0:256k(u-boot),"\
 374                                 "256k(env),3m(kernel),1m(romfs),"\
 375                                 "1m(cramfs),-(jffs2)"
 376 #endif
 377
 378 /* Miscellaneous configurable options */
 379 #define CONFIG_SYS_PROMPT       "U-Boot-mONStR> "
 380 /* size of console buffer */
 381 #define CONFIG_SYS_CBSIZE       512
 382  /* print buffer size */
 383 #define CONFIG_SYS_PBSIZE \
 384                 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 385 /* max number of command args */
 386 #define CONFIG_SYS_MAXARGS      15
 387 #define CONFIG_SYS_LONGHELP
 388 /* default load address */
 389 #define CONFIG_SYS_LOAD_ADDR    XILINX_RAM_START
 390
 391 #define CONFIG_BOOTDELAY        -1      /* -1 disables auto-boot */
 392 #define CONFIG_BOOTARGS         "root=romfs"
 393 #define CONFIG_HOSTNAME         XILINX_BOARD_NAME
 394 #define CONFIG_BOOTCOMMAND      "base 0;tftp 11000000 image.img;bootm"
 395 #define CONFIG_IPADDR           192.168.0.3
 396 #define CONFIG_SERVERIP         192.168.0.5
 397 #define CONFIG_GATEWAYIP        192.168.0.1
 398 #define CONFIG_ETHADDR          00:E0:0C:00:00:FD
 399
 400 /* architecture dependent code */
 401 #define CONFIG_SYS_USR_EXCEP    /* user exception */
 402
 403 #define CONFIG_PREBOOT  "echo U-BOOT for ${hostname};setenv preboot;echo"
 404
 405 #define CONFIG_EXTRA_ENV_SETTINGS       "unlock=yes\0" \
 406                                         "nor0=flash-0\0"\
 407                                         "mtdparts=mtdparts=flash-0:"\
 408                                         "256k(u-boot),256k(env),3m(kernel),"\
 409                                         "1m(romfs),1m(cramfs),-(jffs2)\0"\
 410                                         "nc=setenv stdout nc;"\
 411                                         "setenv stdin nc\0" \
 412                                         "serial=setenv stdout serial;"\
 413                                         "setenv stdin serial\0"
 414
 415 #define CONFIG_CMDLINE_EDITING
 416
 417 #define CONFIG_NETCONSOLE
 418 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 419
 420 /* Use the HUSH parser */
 421 #define CONFIG_SYS_HUSH_PARSER
 422
 423 /* Enable flat device tree support */
 424 #define CONFIG_LMB              1
 425 #define CONFIG_FIT              1
 426 #define CONFIG_OF_LIBFDT        1
 427
 428 #if defined(CONFIG_XILINX_LL_TEMAC) || defined(CONFIG_XILINX_AXIEMAC)
 429 # define CONFIG_MII             1
 430 # define CONFIG_CMD_MII         1
 431 # define CONFIG_PHY_GIGE        1
 432 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN        1
 433 # define CONFIG_PHYLIB          1
 434 # define CONFIG_PHY_ATHEROS     1
 435 # define CONFIG_PHY_BROADCOM    1
 436 # define CONFIG_PHY_DAVICOM     1
 437 # define CONFIG_PHY_LXT         1
 438 # define CONFIG_PHY_MARVELL     1
 439 # define CONFIG_PHY_MICREL      1
 440 # define CONFIG_PHY_NATSEMI     1
 441 # define CONFIG_PHY_REALTEK     1
 442 # define CONFIG_PHY_VITESSE     1
 443 #else
 444 # undef CONFIG_MII
 445 # undef CONFIG_CMD_MII
 446 # undef CONFIG_PHYLIB
 447 #endif
 448
 449 /* SPL part */
 450 #define CONFIG_CMD_SPL
 451 #define CONFIG_SPL_FRAMEWORK
 452 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 453 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 454 #define CONFIG_SPL_SERIAL_SUPPORT
 455 #define CONFIG_SPL_BOARD_INIT
 456
 457 #define CONFIG_SPL_LDSCRIPT     "arch/microblaze/cpu/u-boot-spl.lds"
 458
 459 #define CONFIG_SPL_RAM_DEVICE
 460 #define CONFIG_SPL_NOR_SUPPORT
 461
 462 /* for booting directly linux */
 463 #define CONFIG_SPL_OS_BOOT
 464
 465 #define CONFIG_SYS_OS_BASE              (CONFIG_SYS_FLASH_BASE + \
 466                                          0x60000)
 467 #define CONFIG_SYS_FDT_BASE             (CONFIG_SYS_FLASH_BASE + \
 468                                          0x40000)
 469 #define CONFIG_SYS_SPL_ARGS_ADDR        (CONFIG_SYS_TEXT_BASE + \
 470                                          0x1000000)
 471
 472 /* SP location before relocation, must use scratch RAM */
 473 /* BRAM start */
 474 #define CONFIG_SYS_INIT_RAM_ADDR        0x0
 475 /* BRAM size - will be generated */
 476 #define CONFIG_SYS_INIT_RAM_SIZE        0x10000
 477 /* Stack pointer prior relocation, must situated at on-chip RAM */
 478 #define CONFIG_SYS_SPL_MALLOC_END       (CONFIG_SYS_INIT_RAM_ADDR + \
 479                                          CONFIG_SYS_INIT_RAM_SIZE - \
 480                                          GENERATED_GBL_DATA_SIZE)
 481
 482 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100
 483
 484 /*
 485  * The main reason to do it in this way is that MALLOC_START
 486  * can't be defined - common/spl/spl.c
 487  */
 488 #if (CONFIG_SYS_SPL_MALLOC_SIZE != 0)
 489 # define CONFIG_SYS_SPL_MALLOC_START    (CONFIG_SYS_SPL_MALLOC_END - \
 490                                          CONFIG_SYS_SPL_MALLOC_SIZE)
 491 # define CONFIG_SPL_STACK_ADDR          CONFIG_SYS_SPL_MALLOC_START
 492 #else
 493 # define CONFIG_SPL_STACK_ADDR          CONFIG_SYS_SPL_MALLOC_END
 494 #endif
 495
 496 /* Just for sure that there is a space for stack */
 497 #define CONFIG_SPL_STACK_SIZE           0x100
 498
 499 #define CONFIG_SYS_UBOOT_BASE           CONFIG_SYS_FLASH_BASE
 500 #define CONFIG_SYS_UBOOT_START          CONFIG_SYS_TEXT_BASE
 501
 502 #define CONFIG_SPL_MAX_FOOTPRINT        (CONFIG_SYS_INIT_RAM_SIZE - \
 503                                          CONFIG_SYS_INIT_RAM_ADDR - \
 504                                          GENERATED_GBL_DATA_SIZE - \
 505                                          CONFIG_SYS_SPL_MALLOC_SIZE - \
 506                                          CONFIG_SPL_STACK_SIZE)
 507
 508 #endif  /* __CONFIG_H */