include/configs/munices.h

   1 /*
   2  * (C) Copyright 2007
   3  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #ifndef __CONFIG_H
   9 #define __CONFIG_H
  10 /*
  11  * High Level Configuration Options
  12  * (easy to change)
  13  */
  14 #define CONFIG_MPC5200          1       /* This is an MPC5200 CPU */
  15 #define CONFIG_MPC5200_DDR      1       /* (with DDR-SDRAM) */
  16 #define CONFIG_MUNICES          1       /* ... on MUNICes board */
  17
  18 #ifndef CONFIG_SYS_TEXT_BASE
  19 #define CONFIG_SYS_TEXT_BASE    0xFFF00000
  20 #endif
  21
  22 #define CONFIG_SYS_MPC5XXX_CLKIN        33333333 /* ... running at 33.333333MHz */
  23 #define CONFIG_SYS_CACHELINE_SIZE       32      /* For MPC5xxx CPUs */
  24 #define CONFIG_HIGH_BATS        1       /* High BATs supported */
  25
  26 /*
  27  * Command line configuration.
  28  */
  29 #define CONFIG_CMD_ASKENV
  30 #define CONFIG_CMD_IMMAP
  31 #define CONFIG_CMD_PING
  32 #define CONFIG_CMD_REGINFO
  33
  34 #if defined(CONFIG_CMD_KGDB)
  35 #  define CONFIG_SYS_CACHELINE_SHIFT    5       /* log base 2 of the above value */
  36 #endif
  37
  38 /*
  39  * Serial console configuration
  40  */
  41 #define CONFIG_PSC_CONSOLE      1       /* console is on PSC1 */
  42 #define CONFIG_BAUDRATE         115200  /* ... at 115200 bps */
  43 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200, 230400 }
  44
  45 #define CONFIG_TIMESTAMP        1       /* Print image info with timestamp */
  46 #define CONFIG_BOOTDELAY        5   /* autoboot after 5 seconds */
  47 #undef  CONFIG_BOOTARGS
  48
  49 #define CONFIG_PREBOOT  "echo;" \
  50         "echo Type \"run net_nfs\" to load Kernel over TFTP and to mount root filesystem over NFS;" \
  51         "echo"
  52
  53 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
  54         "netdev=eth0\0"                                                 \
  55         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
  56                 "nfsroot=$(serverip):$(rootpath)\0"                     \
  57         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
  58         "addip=setenv bootargs $(bootargs) "                            \
  59                 "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)"      \
  60                 ":$(hostname):$(netdev):off panic=5\0"                  \
  61         "flash_nfs=run nfsargs addip;"                                  \
  62                 "bootm $(kernel_addr)\0"                                \
  63         "flash_self=run ramargs addip;"                                 \
  64                 "bootm $(kernel_addr) $(ramdisk_addr)\0"                \
  65         "net_nfs=tftp 200000 $(bootfile);run nfsargs addip;bootm\0"     \
  66         "rootpath=/opt/eldk/ppc_6xx\0"                                  \
  67         "bootfile=/tftpboot/munices/u-boot.bin\0"                       \
  68         "update=tftpboot 200000 ${bootfile};protect off fff00000 fff3ffff;" \
  69         "erase fff00000 fff3ffff; cp.b 200000 FFF00000 ${filesize}\0"   \
  70         ""
  71 #define CONFIG_BOOTCOMMAND      "run net_nfs"
  72
  73 /*
  74  * IPB Bus clocking configuration.
  75  */
  76 #define  CONFIG_SYS_IPBSPEED_133                /* define for 133MHz speed */
  77 #if defined(CONFIG_SYS_IPBSPEED_133)
  78 /*
  79  * PCI Bus clocking configuration
  80  *
  81  * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
  82  * CONFIG_SYS_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't
  83  * been tested with a IPB Bus Clock of 66 MHz.
  84  */
  85 #define CONFIG_SYS_PCISPEED_66          /* define for 66MHz speed */
  86 #else
  87 #undef CONFIG_SYS_PCISPEED_66                   /* for 33MHz speed */
  88 #endif
  89
  90 /*
  91  * Memory map
  92  */
  93 #define CONFIG_SYS_MBAR         0xF0000000 /* MBAR hast to be switched by other bootloader or debugger config  */
  94
  95 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
  96 #define CONFIG_SYS_SDRAM_BASE           0x00000000
  97 /* Use SRAM until RAM will be available */
  98 #define CONFIG_SYS_INIT_RAM_ADDR        MPC5XXX_SRAM
  99 #define CONFIG_SYS_INIT_RAM_SIZE        MPC5XXX_SRAM_SIZE       /* Size of used area in DPRAM */
 100 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 101 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 102
 103 #define CONFIG_SYS_MONITOR_BASE    CONFIG_SYS_TEXT_BASE
 104 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
 105 #   define CONFIG_SYS_RAMBOOT           1
 106 #endif
 107
 108 #define CONFIG_SYS_MONITOR_LEN          (192 << 10)     /* Reserve 192 kB for Monitor   */
 109 #define CONFIG_SYS_MALLOC_LEN           (128 << 10)     /* Reserve 128 kB for malloc()  */
 110 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)       /* Initial Memory map for Linux */
 111
 112 /*
 113  * Flash configuration
 114  */
 115 #define CONFIG_SYS_FLASH_BASE           0xFF000000
 116 #define CONFIG_SYS_FLASH_CFI            1       /* Flash is CFI conformant */
 117 #define CONFIG_FLASH_CFI_DRIVER 1       /* Use the common driver */
 118 #define CONFIG_SYS_FLASH_BANKS_LIST     { CONFIG_SYS_FLASH_BASE }
 119 #define CONFIG_SYS_FLASH_EMPTY_INFO
 120 #define CONFIG_SYS_FLASH_SIZE           0x01000000 /* 16 MByte */
 121 #define CONFIG_SYS_MAX_FLASH_SECT       128     /* max num of sects on one chip */
 122 #define CONFIG_SYS_MAX_FLASH_BANKS      1        /* max num of flash banks (= chip selects) */
 123 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE       /* not supported yet for AMD */
 124
 125 /*
 126  * Chip selects configuration
 127  */
 128 /* Boot Chipselect */
 129 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
 130 #define CONFIG_SYS_BOOTCS_SIZE          CONFIG_SYS_FLASH_SIZE
 131 #define CONFIG_SYS_BOOTCS_CFG           0x00047800
 132
 133 /*
 134  * Environment settings
 135  */
 136 #define CONFIG_ENV_IS_IN_FLASH  1
 137 #define CONFIG_ENV_OFFSET               0x40000
 138 #define CONFIG_ENV_ADDR         (CONFIG_SYS_TEXT_BASE + CONFIG_ENV_OFFSET)
 139 #define CONFIG_ENV_SECT_SIZE    0x20000
 140 #define CONFIG_ENV_SIZE         0x4000
 141 #define CONFIG_ENV_OFFSET_REDUND   (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE)
 142 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_SYS_TEXT_BASE + CONFIG_ENV_OFFSET_REDUND)
 143 #define CONFIG_ENV_SIZE_REDUND     (CONFIG_ENV_SIZE)
 144 #define CONFIG_ENV_OVERWRITE    1
 145
 146 /*
 147  * Ethernet configuration
 148  */
 149 #define CONFIG_MPC5xxx_FEC      1
 150 #define CONFIG_MPC5xxx_FEC_MII100
 151 #define CONFIG_PHY_ADDR         0x01
 152 #define CONFIG_MII              1
 153
 154 /*
 155  * GPIO configuration
 156  */
 157 #define CONFIG_SYS_GPS_PORT_CONFIG      0x00058044 /* PSC1=UART, PSC2=UART ; Ether=100MBit with MD
 158                                                 no PCI */
 159
 160 /*
 161  * Miscellaneous configurable options
 162  */
 163 #define CONFIG_SYS_LONGHELP                     /* undef to save memory     */
 164 #define CONFIG_SYS_CBSIZE               1024    /* Console I/O Buffer Size  */
 165 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)      /* Print Buffer Size */
 166 #define CONFIG_SYS_MAXARGS              16              /* max number of command args   */
 167 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size    */
 168
 169 #define CONFIG_SYS_MEMTEST_START        0x00100000      /* memtest works on */
 170 #define CONFIG_SYS_MEMTEST_END          0x00f00000      /* 1 ... 15 MB in DRAM  */
 171
 172 #define CONFIG_SYS_LOAD_ADDR            0x200000        /* default load address */
 173
 174 #define CONFIG_DISPLAY_BOARDINFO 1
 175 #define CONFIG_CMDLINE_EDITING  1
 176
 177 /*
 178  * Various low-level settings
 179  */
 180 #define CONFIG_SYS_HID0_INIT            HID0_ICE | HID0_ICFI
 181 #define CONFIG_SYS_HID0_FINAL           HID0_ICE
 182
 183 #define CONFIG_SYS_CS_BURST             0x00000000
 184 #define CONFIG_SYS_CS_DEADCYCLE 0x33333333
 185 #define CONFIG_SYS_RESET_ADDRESS        0xff000000
 186
 187 /* pass open firmware flat tree */
 188 #define CONFIG_OF_BOARD_SETUP   1
 189
 190 #define OF_CPU                  "PowerPC,5200@0"
 191 #define OF_TBCLK                (bd->bi_busfreq / 4)
 192 #define OF_SOC                  "soc5200@f0000000"
 193 #define OF_STDOUT_PATH          "/soc5200@f0000000/serial@2000"
 194
 195 #endif /* __CONFIG_H */