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git.ipfire.org Git - people/ms/u-boot.git/blob - include/configs/mx53loco.h
2 * Copyright (C) 2011 Freescale Semiconductor, Inc.
3 * Jason Liu <r64343@freescale.com>
5 * Configuration settings for Freescale MX53 low cost board.
7 * SPDX-License-Identifier: GPL-2.0+
15 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_LOCO
17 #include <asm/arch/imx-regs.h>
19 #define CONFIG_CMDLINE_TAG
20 #define CONFIG_SETUP_MEMORY_TAGS
21 #define CONFIG_INITRD_TAG
23 #define CONFIG_SYS_FSL_CLK
25 /* Size of malloc() pool */
26 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
28 #define CONFIG_BOARD_EARLY_INIT_F
29 #define CONFIG_MXC_GPIO
30 #define CONFIG_REVISION_TAG
32 #define CONFIG_MXC_UART
33 #define CONFIG_MXC_UART_BASE UART1_BASE
36 #define CONFIG_FSL_ESDHC
37 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
38 #define CONFIG_SYS_FSL_ESDHC_NUM 2
40 #define CONFIG_GENERIC_MMC
41 #define CONFIG_DOS_PARTITION
46 #define CONFIG_FEC_MXC
47 #define IMX_FEC_BASE FEC_BASE_ADDR
48 #define CONFIG_FEC_MXC_PHYADDR 0x1F
51 #define CONFIG_USB_EHCI
52 #define CONFIG_USB_EHCI_MX5
53 #define CONFIG_USB_HOST_ETHER
54 #define CONFIG_USB_ETHER_ASIX
55 #define CONFIG_USB_ETHER_MCS7830
56 #define CONFIG_USB_ETHER_SMSC95XX
57 #define CONFIG_MXC_USB_PORT 1
58 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
59 #define CONFIG_MXC_USB_FLAGS 0
62 #define CONFIG_SYS_I2C
63 #define CONFIG_SYS_I2C_MXC
64 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
65 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
66 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
70 #define CONFIG_POWER_I2C
71 #define CONFIG_DIALOG_POWER
72 #define CONFIG_POWER_FSL
73 #define CONFIG_POWER_FSL_MC13892
74 #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48
75 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8
77 /* allow to overwrite serial and ethaddr */
78 #define CONFIG_ENV_OVERWRITE
79 #define CONFIG_CONS_INDEX 1
80 #define CONFIG_BAUDRATE 115200
82 /* Command definition */
83 #define CONFIG_SUPPORT_RAW_INITRD
86 #define CONFIG_ETHPRIME "FEC0"
88 #define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */
89 #define CONFIG_SYS_TEXT_BASE 0x77800000
91 #define CONFIG_EXTRA_ENV_SETTINGS \
94 "fdt_addr=0x71000000\0" \
99 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
100 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} root=${mmcroot}\0" \
102 "load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
103 "bootscript=echo Running bootscript from mmc ...; " \
105 "loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
106 "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
107 "mmcboot=echo Booting from mmc ...; " \
109 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
110 "if run loadfdt; then " \
111 "bootz ${loadaddr} - ${fdt_addr}; " \
113 "if test ${boot_fdt} = try; then " \
116 "echo WARN: Cannot load the DT; " \
122 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
124 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
125 "netboot=echo Booting from net ...; " \
127 "if test ${ip_dyn} = yes; then " \
128 "setenv get_cmd dhcp; " \
130 "setenv get_cmd tftp; " \
132 "${get_cmd} ${image}; " \
133 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
134 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
135 "bootz ${loadaddr} - ${fdt_addr}; " \
137 "if test ${boot_fdt} = try; then " \
140 "echo ERROR: Cannot load the DT; " \
148 #define CONFIG_BOOTCOMMAND \
149 "mmc dev ${mmcdev}; if mmc rescan; then " \
150 "if run loadbootscript; then " \
153 "if run loadimage; then " \
155 "else run netboot; " \
158 "else run netboot; fi"
160 #define CONFIG_ARP_TIMEOUT 200UL
162 /* Miscellaneous configurable options */
163 #define CONFIG_SYS_LONGHELP /* undef to save memory */
164 #define CONFIG_AUTO_COMPLETE
165 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
167 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
168 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
170 #define CONFIG_SYS_MEMTEST_START 0x70000000
171 #define CONFIG_SYS_MEMTEST_END 0x70010000
173 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
175 #define CONFIG_CMDLINE_EDITING
177 /* Physical Memory Map */
178 #define CONFIG_NR_DRAM_BANKS 2
179 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
180 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
181 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
182 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
183 #define PHYS_SDRAM_SIZE (gd->ram_size)
185 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
186 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
187 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
189 #define CONFIG_SYS_INIT_SP_OFFSET \
190 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
191 #define CONFIG_SYS_INIT_SP_ADDR \
192 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
194 /* FLASH and environment organization */
195 #define CONFIG_SYS_NO_FLASH
197 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
198 #define CONFIG_ENV_SIZE (8 * 1024)
199 #define CONFIG_ENV_IS_IN_MMC
200 #define CONFIG_SYS_MMC_ENV_DEV 0
202 #define CONFIG_CMD_SATA
203 #ifdef CONFIG_CMD_SATA
204 #define CONFIG_DWC_AHSATA
205 #define CONFIG_SYS_SATA_MAX_DEVICE 1
206 #define CONFIG_DWC_AHSATA_PORT_ID 0
207 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR
209 #define CONFIG_LIBATA
212 /* Framebuffer and LCD */
213 #define CONFIG_PREBOOT
214 #define CONFIG_VIDEO_IPUV3
215 #define CONFIG_VIDEO_BMP_RLE8
216 #define CONFIG_SPLASH_SCREEN
217 #define CONFIG_BMP_16BPP
218 #define CONFIG_VIDEO_LOGO
219 #define CONFIG_IPUV3_CLK 200000000
221 #endif /* __CONFIG_H */