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1 /*
2 * Copyright (C) 2013 Marek Vasut <marex@denx.de>
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
17 * MA 02111-1307 USA
18 */
19 #ifndef __CONFIGS_MXS_H__
20 #define __CONFIGS_MXS_H__
21
22 /*
23 * Includes
24 */
25
26 #if defined(CONFIG_MX23) && defined(CONFIG_MX28)
27 #error Select either CONFIG_MX23 or CONFIG_MX28 , never both!
28 #elif !defined(CONFIG_MX23) && !defined(CONFIG_MX28)
29 #error Select one of CONFIG_MX23 or CONFIG_MX28 !
30 #endif
31
32 #include <asm/arch/regs-base.h>
33
34 #if defined(CONFIG_MX23)
35 #include <asm/arch/iomux-mx23.h>
36 #elif defined(CONFIG_MX28)
37 #include <asm/arch/iomux-mx28.h>
38 #endif
39
40 /*
41 * CPU specifics
42 */
43
44 /* Startup hooks */
45 #define CONFIG_BOARD_EARLY_INIT_F
46 #define CONFIG_ARCH_MISC_INIT
47
48 /* SPL */
49 #define CONFIG_SPL_NO_CPU_SUPPORT_CODE
50 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
51 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
52 #define CONFIG_SPL_LIBCOMMON_SUPPORT
53 #define CONFIG_SPL_LIBGENERIC_SUPPORT
54 #define CONFIG_SPL_SERIAL_SUPPORT
55 #define CONFIG_SPL_GPIO_SUPPORT
56
57 /* Memory sizes */
58 #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
59 #define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */
60 #define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */
61
62 /* OCRAM at 0x0 ; 32kB on MX23 ; 128kB on MX28 */
63 #define CONFIG_SYS_INIT_RAM_ADDR 0x00000000
64 #if defined(CONFIG_MX23)
65 #define CONFIG_SYS_INIT_RAM_SIZE (32 * 1024)
66 #elif defined(CONFIG_MX28)
67 #define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024)
68 #endif
69
70 /* Point initial SP in SRAM so SPL can use it too. */
71 #define CONFIG_SYS_INIT_SP_OFFSET \
72 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
73 #define CONFIG_SYS_INIT_SP_ADDR \
74 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
75
76 /*
77 * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
78 * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
79 * binary. In case there was more of this mess, 0x100 bytes are skipped.
80 *
81 * In case of a HAB boot, we cannot for some weird reason use the first 4KiB
82 * of DRAM when loading. Moreover, we use the first 4 KiB for IVT and CST
83 * blocks, thus U-Boot starts at offset +8 KiB of DRAM start.
84 *
85 * As for the SPL, we must avoid the first 4 KiB as well, but we load the
86 * IVT and CST to 0x8000, so we don't need to waste the subsequent 4 KiB.
87 */
88 #define CONFIG_SYS_TEXT_BASE 0x40002000
89 #define CONFIG_SPL_TEXT_BASE 0x00001000
90
91 /* U-Boot general configuration */
92 #define CONFIG_SYS_LONGHELP
93 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
94 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
95 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
96 /* Boot argument buffer size */
97 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
98 #define CONFIG_CMDLINE_EDITING /* Command history etc */
99
100 /* Booting Linux */
101 #define CONFIG_CMDLINE_TAG
102 #define CONFIG_SETUP_MEMORY_TAGS
103
104 /*
105 * Drivers
106 */
107
108 /* APBH DMA */
109 #define CONFIG_APBH_DMA
110
111 /* GPIO */
112 #define CONFIG_MXS_GPIO
113
114 /*
115 * DUART Serial Driver.
116 * Conflicts with AUART driver which can be set by board.
117 */
118 #define CONFIG_PL011_SERIAL
119 #define CONFIG_PL011_CLOCK 24000000
120 #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
121 #define CONFIG_CONS_INDEX 0
122 /* Default baudrate can be overridden by board! */
123 #ifndef CONFIG_BAUDRATE
124 #define CONFIG_BAUDRATE 115200
125 #endif
126
127 /* FEC Ethernet on SoC */
128 #ifdef CONFIG_FEC_MXC
129 #define CONFIG_MII
130 #ifndef CONFIG_ETHPRIME
131 #define CONFIG_ETHPRIME "FEC0"
132 #endif
133 #ifndef CONFIG_FEC_XCV_TYPE
134 #define CONFIG_FEC_XCV_TYPE RMII
135 #endif
136 #endif
137
138 /* I2C */
139 #ifdef CONFIG_CMD_I2C
140 #define CONFIG_SYS_I2C
141 #define CONFIG_SYS_I2C_MXS
142 #define CONFIG_HARD_I2C
143 #ifndef CONFIG_SYS_I2C_SPEED
144 #define CONFIG_SYS_I2C_SPEED 400000
145 #endif
146 #endif
147
148 /* LCD */
149 #ifdef CONFIG_VIDEO
150 #define CONFIG_CFB_CONSOLE
151 #define CONFIG_VIDEO_MXS
152 #define CONFIG_VIDEO_SW_CURSOR
153 #define CONFIG_VGA_AS_SINGLE_DEVICE
154 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
155 #endif
156
157 /* MMC */
158 #ifdef CONFIG_CMD_MMC
159 #define CONFIG_MMC
160 #define CONFIG_GENERIC_MMC
161 #define CONFIG_BOUNCE_BUFFER
162 #define CONFIG_MXS_MMC
163 #endif
164
165 /* NAND */
166 #ifdef CONFIG_CMD_NAND
167 #define CONFIG_NAND_MXS
168 #define CONFIG_SYS_MAX_NAND_DEVICE 1
169 #define CONFIG_SYS_NAND_BASE 0x60000000
170 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
171 #endif
172
173 /* OCOTP */
174 #ifdef CONFIG_CMD_FUSE
175 #define CONFIG_MXS_OCOTP
176 #endif
177
178 /* SPI */
179 #ifdef CONFIG_CMD_SPI
180 #define CONFIG_HARD_SPI
181 #define CONFIG_MXS_SPI
182 #define CONFIG_SPI_HALF_DUPLEX
183 #endif
184
185 /* USB */
186 #ifdef CONFIG_CMD_USB
187 #define CONFIG_USB_EHCI
188 #define CONFIG_USB_EHCI_MXS
189 #define CONFIG_EHCI_IS_TDI
190 #endif
191
192 #endif /* __CONFIGS_MXS_H__ */