include/configs/pcm058.h

   1 /*
   2  * Copyright (C) Stefano Babic <sbabic@denx.de>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7
   8 #ifndef __PCM058_CONFIG_H
   9 #define __PCM058_CONFIG_H
  10
  11 #ifdef CONFIG_SPL
  12 #define CONFIG_SPL_SPI_LOAD
  13 #define CONFIG_SYS_SPI_U_BOOT_OFFS      (64 * 1024)
  14 #include "imx6_spl.h"
  15 #endif
  16
  17 #include "mx6_common.h"
  18
  19 /* Thermal */
  20 #define CONFIG_IMX_THERMAL
  21
  22 /* Serial */
  23 #define CONFIG_MXC_UART
  24 #define CONFIG_MXC_UART_BASE           UART2_BASE
  25 #define CONSOLE_DEV             "ttymxc1"
  26
  27 #define PHYS_SDRAM_SIZE         (1u * 1024 * 1024 * 1024)
  28
  29 /* Early setup */
  30 #define CONFIG_DISPLAY_BOARDINFO_LATE
  31
  32
  33 /* Size of malloc() pool */
  34 #define CONFIG_SYS_MALLOC_LEN           (8 * SZ_1M)
  35
  36 /* Ethernet */
  37 #define CONFIG_FEC_MXC
  38 #define CONFIG_MII
  39 #define IMX_FEC_BASE                    ENET_BASE_ADDR
  40 #define CONFIG_FEC_XCV_TYPE             RGMII
  41 #define CONFIG_ETHPRIME                 "FEC"
  42 #define CONFIG_FEC_MXC_PHYADDR          3
  43
  44 /* SPI Flash */
  45 #define CONFIG_SF_DEFAULT_BUS           0
  46 #define CONFIG_SF_DEFAULT_CS            0
  47 #define CONFIG_SF_DEFAULT_SPEED         20000000
  48 #define CONFIG_SF_DEFAULT_MODE          SPI_MODE_0
  49
  50 /* I2C Configs */
  51 #define CONFIG_SYS_I2C
  52 #define CONFIG_SYS_I2C_MXC
  53 #define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 2 */
  54 #define CONFIG_SYS_I2C_SPEED              100000
  55
  56 #ifndef CONFIG_SPL_BUILD
  57 /* Enable NAND support */
  58 #define CONFIG_SYS_MAX_NAND_DEVICE      1
  59 #define CONFIG_SYS_NAND_BASE            0x40000000
  60 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  61 #define CONFIG_SYS_NAND_ONFI_DETECTION
  62 #endif
  63
  64 /* DMA stuff, needed for GPMI/MXS NAND support */
  65
  66 /* Filesystem support */
  67 #define CONFIG_MTD_PARTITIONS
  68 #define CONFIG_MTD_DEVICE
  69
  70 /* Physical Memory Map */
  71 #define CONFIG_NR_DRAM_BANKS           1
  72 #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
  73
  74 #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
  75 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
  76 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
  77
  78 #define CONFIG_SYS_INIT_SP_OFFSET \
  79         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  80 #define CONFIG_SYS_INIT_SP_ADDR \
  81         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  82
  83 /* MMC Configs */
  84 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
  85 #define CONFIG_SYS_FSL_USDHC_NUM        1
  86
  87 /* Environment organization */
  88 #define CONFIG_ENV_SIZE                (16 * 1024)
  89 #define CONFIG_ENV_OFFSET               (1024 * SZ_1K)
  90 #define CONFIG_ENV_SECT_SIZE            (64 * SZ_1K)
  91 #define CONFIG_ENV_SPI_BUS             CONFIG_SF_DEFAULT_BUS
  92 #define CONFIG_ENV_SPI_CS              CONFIG_SF_DEFAULT_CS
  93 #define CONFIG_ENV_SPI_MODE            CONFIG_SF_DEFAULT_MODE
  94 #define CONFIG_ENV_SPI_MAX_HZ          CONFIG_SF_DEFAULT_SPEED
  95 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
  96 #define CONFIG_ENV_OFFSET_REDUND       (CONFIG_ENV_OFFSET + \
  97                                                 CONFIG_ENV_SECT_SIZE)
  98 #define CONFIG_ENV_SIZE_REDUND         CONFIG_ENV_SIZE
  99
 100 #ifdef CONFIG_ENV_IS_IN_NAND
 101 #define CONFIG_ENV_OFFSET              (0x1E0000)
 102 #define CONFIG_ENV_SECT_SIZE           (128 * SZ_1K)
 103 #endif
 104
 105 #endif