include/configs/stout.h

   1 /*
   2  * include/configs/stout.h
   3  *     This file is Stout board configuration.
   4  *
   5  * Copyright (C) 2015 Renesas Electronics Europe GmbH
   6  * Copyright (C) 2015 Renesas Electronics Corporation
   7  * Copyright (C) 2015 Cogent Embedded, Inc.
   8  *
   9  * SPDX-License-Identifier: GPL-2.0
  10  */
  11
  12 #ifndef __STOUT_H
  13 #define __STOUT_H
  14
  15 #undef DEBUG
  16 #define CONFIG_R8A7790
  17 #define CONFIG_ARCH_RMOBILE_BOARD_STRING "Stout"
  18
  19 #include "rcar-gen2-common.h"
  20
  21 #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
  22 #define CONFIG_SYS_TEXT_BASE    0xB0000000
  23 #else
  24 #define CONFIG_SYS_TEXT_BASE    0xE8080000
  25 #endif
  26
  27 /* STACK */
  28 #if defined(CONFIGF_RMOBILE_EXTRAM_BOOT)
  29 #define CONFIG_SYS_INIT_SP_ADDR         0xB003FFFC
  30 #else
  31 #define CONFIG_SYS_INIT_SP_ADDR         0xE827FFFC
  32 #endif
  33 #define STACK_AREA_SIZE                 0xC000
  34 #define LOW_LEVEL_MERAM_STACK   \
  35                 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
  36
  37 /* MEMORY */
  38 #define RCAR_GEN2_SDRAM_BASE            0x40000000
  39 #define RCAR_GEN2_SDRAM_SIZE            (1024u * 1024 * 1024)
  40 #define RCAR_GEN2_UBOOT_SDRAM_SIZE      (512 * 1024 * 1024)
  41
  42 /* SCIF */
  43 #define CONFIG_SCIF_CONSOLE
  44 #define CONFIG_SCIF_A
  45
  46 /* SPI */
  47 #define CONFIG_SPI
  48 #define CONFIG_SH_QSPI
  49 #define CONFIG_SPI_FLASH_QUAD
  50
  51 /* SH Ether */
  52 #define CONFIG_SH_ETHER
  53 #define CONFIG_SH_ETHER_USE_PORT        0
  54 #define CONFIG_SH_ETHER_PHY_ADDR        0x1
  55 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
  56 #define CONFIG_SH_ETHER_ALIGNE_SIZE     64
  57 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
  58 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
  59 #define CONFIG_PHYLIB
  60 #define CONFIG_PHY_MICREL
  61 #define CONFIG_BITBANGMII
  62 #define CONFIG_BITBANGMII_MULTI
  63
  64 /* I2C */
  65 #define CONFIG_SYS_I2C
  66 #define CONFIG_SYS_I2C_RCAR
  67 #define CONFIG_SYS_RCAR_I2C0_SPEED      400000
  68 #define CONFIG_SYS_RCAR_I2C1_SPEED      400000
  69 #define CONFIG_SYS_RCAR_I2C2_SPEED      400000
  70 #define CONFIG_SYS_RCAR_I2C3_SPEED      400000
  71 #define CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS     4
  72
  73 #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
  74
  75 /* Board Clock */
  76 #define RMOBILE_XTAL_CLK        20000000u
  77 #define CONFIG_SYS_CLK_FREQ     RMOBILE_XTAL_CLK
  78 #define CONFIG_SH_TMU_CLK_FREQ  (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */
  79 #define CONFIG_PLL1_CLK_FREQ    (CONFIG_SYS_CLK_FREQ * 156 / 2)
  80 #define CONFIG_PLL1_DIV2_CLK_FREQ       (CONFIG_PLL1_CLK_FREQ / 2)
  81 #define CONFIG_MP_CLK_FREQ      (CONFIG_PLL1_DIV2_CLK_FREQ / 15)
  82 #define CONFIG_HP_CLK_FREQ      (CONFIG_PLL1_CLK_FREQ / 12)
  83
  84 #define CONFIG_SYS_TMU_CLK_DIV  4
  85
  86 /* USB */
  87 #define CONFIG_USB_EHCI
  88 #define CONFIG_USB_EHCI_RMOBILE
  89 #define CONFIG_USB_MAX_CONTROLLER_COUNT 3
  90
  91 /* Module stop status bits */
  92 /* INTC-RT */
  93 #define CONFIG_SMSTP0_ENA       0x00400000
  94 /* MSIF, SCIFA0 */
  95 #define CONFIG_SMSTP2_ENA       0x00002010
  96 /* INTC-SYS, IRQC */
  97 #define CONFIG_SMSTP4_ENA       0x00000180
  98
  99 /* SDHI */
 100 #define CONFIG_SH_SDHI_FREQ     97500000
 101
 102 #endif  /* __STOUT_H */