include/configs/x600.h

   1 /*
   2  * Copyright (C) 2009, STMicroelectronics - All Rights Reserved
   3  * Author(s): Vipin Kumar, <vipin.kumar@st.com> for STMicroelectronics.
   4  *
   5  * Copyright (C) 2012, 2015 Stefan Roese <sr@denx.de>
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #ifndef __CONFIG_H
  11 #define __CONFIG_H
  12
  13 /*
  14  * High Level Configuration Options
  15  * (easy to change)
  16  */
  17 #define CONFIG_SPEAR600                         /* SPEAr600 SoC */
  18 #define CONFIG_X600                             /* on X600 board */
  19
  20 #include <asm/arch/hardware.h>
  21
  22 /* Timer, HZ specific defines */
  23 #define CONFIG_SYS_HZ_CLOCK                     8300000
  24
  25 #define CONFIG_SYS_FLASH_BASE                   0xf8000000
  26 /* Reserve 8KiB for SPL */
  27 #define CONFIG_SPL_PAD_TO                       8192    /* decimal for 'dd' */
  28 #define CONFIG_SYS_SPL_LEN                      CONFIG_SPL_PAD_TO
  29 #define CONFIG_SYS_UBOOT_BASE                   (CONFIG_SYS_FLASH_BASE + \
  30                                                  CONFIG_SYS_SPL_LEN)
  31 #define CONFIG_SYS_UBOOT_START                  CONFIG_SYS_TEXT_BASE
  32 #define CONFIG_SYS_MONITOR_BASE                 CONFIG_SYS_FLASH_BASE
  33 #define CONFIG_SYS_MONITOR_LEN                  0x60000
  34
  35 /* Serial Configuration (PL011) */
  36 #define CONFIG_SYS_SERIAL0                      0xD0000000
  37 #define CONFIG_SYS_SERIAL1                      0xD0080000
  38 #define CONFIG_PL01x_PORTS                      { (void *)CONFIG_SYS_SERIAL0, \
  39                                                 (void *)CONFIG_SYS_SERIAL1 }
  40 #define CONFIG_PL011_CLOCK                      (48 * 1000 * 1000)
  41 #define CONFIG_CONS_INDEX                       0
  42 #define CONFIG_SYS_BAUDRATE_TABLE               { 9600, 19200, 38400, \
  43                                                   57600, 115200 }
  44 #define CONFIG_SYS_LOADS_BAUD_CHANGE
  45
  46 /* NOR FLASH config options */
  47 #define CONFIG_ST_SMI
  48 #define CONFIG_SYS_MAX_FLASH_BANKS              1
  49 #define CONFIG_SYS_FLASH_BANK_SIZE              0x01000000
  50 #define CONFIG_SYS_FLASH_ADDR_BASE              { CONFIG_SYS_FLASH_BASE }
  51 #define CONFIG_SYS_MAX_FLASH_SECT               128
  52 #define CONFIG_SYS_FLASH_EMPTY_INFO
  53 #define CONFIG_SYS_FLASH_ERASE_TOUT             (3 * CONFIG_SYS_HZ)
  54 #define CONFIG_SYS_FLASH_WRITE_TOUT             (3 * CONFIG_SYS_HZ)
  55
  56 /* NAND FLASH config options */
  57 #define CONFIG_NAND_FSMC
  58 #define CONFIG_SYS_NAND_SELF_INIT
  59 #define CONFIG_SYS_MAX_NAND_DEVICE              1
  60 #define CONFIG_SYS_NAND_BASE                    CONFIG_FSMC_NAND_BASE
  61 #define CONFIG_MTD_ECC_SOFT
  62 #define CONFIG_SYS_FSMC_NAND_8BIT
  63 #define CONFIG_SYS_NAND_ONFI_DETECTION
  64 #define CONFIG_NAND_ECC_BCH
  65
  66 /* UBI/UBI config options */
  67 #define CONFIG_MTD_DEVICE
  68 #define CONFIG_MTD_PARTITIONS
  69
  70 /* Ethernet config options */
  71 #define CONFIG_MII
  72 #define CONFIG_PHY_RESET_DELAY                  10000           /* in usec */
  73 #define CONFIG_PHY_ADDR         0       /* PHY address */
  74
  75 #define CONFIG_SPEAR_GPIO
  76
  77 /* I2C config options */
  78 #define CONFIG_SYS_I2C
  79 #define CONFIG_SYS_I2C_BASE                     0xD0200000
  80 #define CONFIG_SYS_I2C_SPEED                    400000
  81 #define CONFIG_SYS_I2C_SLAVE                    0x02
  82 #define CONFIG_I2C_CHIPADDRESS                  0x50
  83
  84 #define CONFIG_RTC_M41T62       1
  85 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
  86
  87 /* FPGA config options */
  88 #define CONFIG_FPGA_SPARTAN3
  89 #define CONFIG_FPGA_COUNT       1
  90
  91 /* USB EHCI options */
  92 #define CONFIG_USB_EHCI_SPEAR
  93 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
  94
  95 /*
  96  * U-Boot Environment placing definitions.
  97  */
  98 #define CONFIG_ENV_SECT_SIZE                    0x00010000
  99 #define CONFIG_ENV_ADDR                         (CONFIG_SYS_MONITOR_BASE + \
 100                                                  CONFIG_SYS_MONITOR_LEN)
 101 #define CONFIG_ENV_SIZE                         0x02000
 102 #define CONFIG_ENV_ADDR_REDUND                  (CONFIG_ENV_ADDR + \
 103                                                  CONFIG_ENV_SECT_SIZE)
 104 #define CONFIG_ENV_SIZE_REDUND                  (CONFIG_ENV_SIZE)
 105
 106 /* Miscellaneous configurable options */
 107 #define CONFIG_ARCH_CPU_INIT
 108 #define CONFIG_BOOT_PARAMS_ADDR                 0x00000100
 109 #define CONFIG_CMDLINE_TAG
 110 #define CONFIG_SETUP_MEMORY_TAGS
 111 #define CONFIG_MISC_INIT_R
 112 #define CONFIG_MX_CYCLIC                /* enable mdc/mwc commands      */
 113
 114 #define CONFIG_SYS_MEMTEST_START                0x00800000
 115 #define CONFIG_SYS_MEMTEST_END                  0x04000000
 116 #define CONFIG_SYS_MALLOC_LEN                   (8 << 20)
 117 #define CONFIG_SYS_LOAD_ADDR                    0x00800000
 118
 119 /* Use last 2 lwords in internal SRAM for bootcounter */
 120 #define CONFIG_SYS_BOOTCOUNT_ADDR               (CONFIG_SRAM_BASE + \
 121                                                  CONFIG_SRAM_SIZE)
 122
 123 #define CONFIG_HOSTNAME                         x600
 124 #define CONFIG_UBI_PART                         ubi0
 125 #define CONFIG_UBIFS_VOLUME                     rootfs
 126
 127 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 128         "u-boot_addr=1000000\0"                                         \
 129         "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.spr\0"          \
 130         "load=tftp ${u-boot_addr} ${u-boot}\0"                          \
 131         "update=protect off " __stringify(CONFIG_SYS_MONITOR_BASE)      \
 132                 " +${filesize};"                                        \
 133                 "erase " __stringify(CONFIG_SYS_MONITOR_BASE) " +${filesize};" \
 134                 "cp.b ${u-boot_addr} " __stringify(CONFIG_SYS_MONITOR_BASE) \
 135                 " ${filesize};"                                         \
 136                 "protect on " __stringify(CONFIG_SYS_MONITOR_BASE)      \
 137                 " +${filesize}\0"                                       \
 138         "upd=run load update\0"                                         \
 139         "ubifs=" __stringify(CONFIG_HOSTNAME) "/ubifs.img\0"            \
 140         "part=" __stringify(CONFIG_UBI_PART) "\0"                       \
 141         "vol=" __stringify(CONFIG_UBIFS_VOLUME) "\0"                    \
 142         "load_ubifs=tftp ${kernel_addr} ${ubifs}\0"                     \
 143         "update_ubifs=ubi part ${part};ubi write ${kernel_addr} ${vol}" \
 144                 " ${filesize}\0"                                        \
 145         "upd_ubifs=run load_ubifs update_ubifs\0"                       \
 146         "init_ubifs=nand erase.part ubi0;ubi part ${part};"             \
 147                 "ubi create ${vol} 4000000\0"                           \
 148         "netdev=eth0\0"                                                 \
 149         "rootpath=/opt/eldk-4.2/arm\0"                                  \
 150         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 151                 "nfsroot=${serverip}:${rootpath}\0"                     \
 152         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
 153         "boot_part=0\0"                                                 \
 154         "altbootcmd=if test $boot_part -eq 0;then "                     \
 155                         "echo Switching to partition 1!;"               \
 156                         "setenv boot_part 1;"                           \
 157                 "else; "                                                \
 158                         "echo Switching to partition 0!;"               \
 159                         "setenv boot_part 0;"                           \
 160                 "fi;"                                                   \
 161                 "saveenv;boot\0"                                        \
 162         "ubifsargs=set bootargs ubi.mtd=ubi${boot_part} "               \
 163                 "root=ubi0:rootfs rootfstype=ubifs\0"                   \
 164         "kernel=" __stringify(CONFIG_HOSTNAME) "/uImage\0"              \
 165         "kernel_fs=/boot/uImage \0"                                     \
 166         "kernel_addr=1000000\0"                                         \
 167         "dtb=" __stringify(CONFIG_HOSTNAME) "/"                         \
 168                 __stringify(CONFIG_HOSTNAME) ".dtb\0"                   \
 169         "dtb_fs=/boot/" __stringify(CONFIG_HOSTNAME) ".dtb\0"           \
 170         "dtb_addr=1800000\0"                                            \
 171         "load_kernel=tftp ${kernel_addr} ${kernel}\0"                   \
 172         "load_dtb=tftp ${dtb_addr} ${dtb}\0"                            \
 173         "addip=setenv bootargs ${bootargs} "                            \
 174                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
 175                 ":${hostname}:${netdev}:off panic=1\0"                  \
 176         "addcon=setenv bootargs ${bootargs} console=ttyAMA0,"           \
 177                 "${baudrate}\0"                                         \
 178         "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
 179         "net_nfs=run load_dtb load_kernel; "                            \
 180                 "run nfsargs addip addcon addmtd addmisc;"              \
 181                 "bootm ${kernel_addr} - ${dtb_addr}\0"                  \
 182         "mtdids=" CONFIG_MTDIDS_DEFAULT "\0"                                    \
 183         "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"                                \
 184         "nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip"         \
 185                 " addcon addmisc addmtd;"                               \
 186                 "bootm ${kernel_addr} - ${dtb_addr}\0"                  \
 187         "ubifs_mount=ubi part ubi${boot_part};ubifsmount ubi:rootfs\0"  \
 188         "ubifs_load=ubifsload ${kernel_addr} ${kernel_fs};"             \
 189                 "ubifsload ${dtb_addr} ${dtb_fs};\0"                    \
 190         "nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip addcon " \
 191                 "addmtd addmisc;bootm ${kernel_addr} - ${dtb_addr}\0"   \
 192         "bootcmd=run nand_ubifs\0"                                      \
 193         "\0"
 194
 195 /* Physical Memory Map */
 196 #define CONFIG_NR_DRAM_BANKS                    1
 197 #define PHYS_SDRAM_1                            0x00000000
 198 #define PHYS_SDRAM_1_MAXSIZE                    0x40000000
 199
 200 #define CONFIG_SYS_SDRAM_BASE                   PHYS_SDRAM_1
 201 #define CONFIG_SRAM_BASE                        0xd2800000
 202 /* Preserve the last 2 lwords for the boot-counter */
 203 #define CONFIG_SRAM_SIZE                        ((8 << 10) - 0x8)
 204 #define CONFIG_SYS_INIT_RAM_ADDR                CONFIG_SRAM_BASE
 205 #define CONFIG_SYS_INIT_RAM_SIZE                CONFIG_SRAM_SIZE
 206
 207 #define CONFIG_SYS_INIT_SP_OFFSET               \
 208         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 209
 210 #define CONFIG_SYS_INIT_SP_ADDR                 \
 211         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 212
 213 /*
 214  * SPL related defines
 215  */
 216 #define CONFIG_SPL_TEXT_BASE            0xd2800b00
 217 #define CONFIG_SPL_MAX_SIZE             (CONFIG_SRAM_SIZE - 0xb00)
 218 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/spear"
 219
 220 /*
 221  * Please select/define only one of the following
 222  * Each definition corresponds to a supported DDR chip.
 223  * DDR configuration is based on the following selection
 224  */
 225 #define CONFIG_DDR_MT47H64M16           1
 226 #define CONFIG_DDR_MT47H32M16           0
 227 #define CONFIG_DDR_MT47H128M8           0
 228
 229 /*
 230  * Synchronous/Asynchronous operation of DDR
 231  *
 232  * Select CONFIG_DDR_2HCLK for DDR clk = 333MHz, synchronous operation
 233  * Select CONFIG_DDR_HCLK for DDR clk = 166MHz, synchronous operation
 234  * Select CONFIG_DDR_PLL2 for DDR clk = PLL2, asynchronous operation
 235  */
 236 #define CONFIG_DDR_2HCLK                1
 237 #define CONFIG_DDR_HCLK                 0
 238 #define CONFIG_DDR_PLL2                 0
 239
 240 /*
 241  * xxx_BOOT_SUPPORTED macro defines whether a booting type is supported
 242  * or not. Modify/Add to only these macros to define new boot types
 243  */
 244 #define USB_BOOT_SUPPORTED              0
 245 #define PCIE_BOOT_SUPPORTED             0
 246 #define SNOR_BOOT_SUPPORTED             1
 247 #define NAND_BOOT_SUPPORTED             1
 248 #define PNOR_BOOT_SUPPORTED             0
 249 #define TFTP_BOOT_SUPPORTED             0
 250 #define UART_BOOT_SUPPORTED             0
 251 #define SPI_BOOT_SUPPORTED              0
 252 #define I2C_BOOT_SUPPORTED              0
 253 #define MMC_BOOT_SUPPORTED              0
 254
 255 #endif  /* __CONFIG_H */