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1 /*
2 * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7 /*
8 * config for XPedite1000 from XES Inc.
9 * Ported from EBONY config by Travis B. Sawyer <tsawyer@sandburst.com>
10 * (C) Copyright 2003 Sandburst Corporation
11 * board/config_EBONY.h - configuration for AMCC 440GP Ref (Ebony)
12 */
13
14 #ifndef __CONFIG_H
15 #define __CONFIG_H
16
17 /* High Level Configuration Options */
18 #define CONFIG_XPEDITE1000 1
19 #define CONFIG_SYS_BOARD_NAME "XPedite1000"
20 #define CONFIG_SYS_FORM_PMC 1
21 #define CONFIG_440 1
22 #define CONFIG_440GX 1 /* 440 GX */
23 #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
24 #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
25
26 #define CONFIG_SYS_TEXT_BASE 0xFFF80000
27
28 /*
29 * DDR config
30 */
31 #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for setup */
32 #define SPD_EEPROM_ADDRESS {0x54} /* SPD i2c spd addresses */
33 #define CONFIG_VERY_BIG_RAM 1
34
35 /*
36 * Base addresses -- Note these are effective addresses where the
37 * actual resources get mapped (not physical addresses)
38 */
39 #define CONFIG_SYS_SDRAM_BASE 0x00000000
40 #define CONFIG_SYS_FLASH_BASE 0xff000000 /* start of FLASH */
41 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
42 #define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
43 #define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */
44 #define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
45 #define CONFIG_SYS_NVRAM_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x08000000)
46 #define CONFIG_SYS_GPIO_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000700)
47
48 /*
49 * Diagnostics
50 */
51 #define CONFIG_SYS_ALT_MEMTEST
52 #define CONFIG_SYS_MEMTEST_START 0x0400000
53 #define CONFIG_SYS_MEMTEST_END 0x0C00000
54
55 /* POST support */
56 #define CONFIG_POST (CONFIG_SYS_POST_RTC | \
57 CONFIG_SYS_POST_I2C)
58
59 /*
60 * LED support
61 */
62 #define USR_LED0 0x00000080
63 #define USR_LED1 0x00000100
64 #define USR_LED2 0x00000200
65 #define USR_LED3 0x00000400
66
67 #ifndef __ASSEMBLY__
68 extern unsigned long in32(unsigned int);
69 extern void out32(unsigned int, unsigned long);
70
71 #define LED0_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED0))
72 #define LED1_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED1))
73 #define LED2_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED2))
74 #define LED3_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED3))
75
76 #define LED0_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED0))
77 #define LED1_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED1))
78 #define LED2_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED2))
79 #define LED3_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED3))
80 #endif
81
82 /*
83 * Use internal SRAM for initial stack
84 */
85 #define CONFIG_SYS_TEMP_STACK_OCM 1
86 #define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_ISRAM_BASE
87 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_ISRAM_BASE /* Initial RAM address */
88 #define CONFIG_SYS_INIT_RAM_SIZE 0x2000 /* Size of used area in RAM */
89 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
90 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
91
92 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 KB for Mon */
93 #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */
94
95 /*
96 * Serial Port
97 */
98 #define CONFIG_CONS_INDEX 1 /* Use UART0 */
99 #define CONFIG_SYS_NS16550_SERIAL
100 #define CONFIG_SYS_NS16550_REG_SIZE 1
101 #define CONFIG_SYS_NS16550_CLK get_serial_clock()
102
103 #define CONFIG_SYS_BAUDRATE_TABLE \
104 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400}
105 #define CONFIG_BAUDRATE 115200
106 #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
107 #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
108
109 /*
110 * NOR flash configuration
111 */
112 #define CONFIG_SYS_MAX_FLASH_BANKS 3
113 #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE, 0xf0000000, 0xf4000000 }
114 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* sectors per device */
115 #define CONFIG_FLASH_CFI_DRIVER
116 #define CONFIG_SYS_FLASH_CFI
117 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
118 #define CONFIG_SYS_FLASH_QUIET_TEST /* MirrorBit flashes are optional */
119 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
120 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
121
122 /*
123 * I2C
124 */
125 #define CONFIG_SYS_I2C
126 #define CONFIG_SYS_I2C_PPC4XX
127 #define CONFIG_SYS_I2C_PPC4XX_CH0
128 #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
129 #define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7f
130
131 /* I2C EEPROM */
132 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
133 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
134 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
135 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
136
137 /* I2C RTC: STMicro M41T00 */
138 #define CONFIG_RTC_M41T11 1
139 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
140 #define CONFIG_SYS_M41T11_BASE_YEAR 2000
141
142 /*
143 * PCI
144 */
145 /* General PCI */
146 #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */
147 #define CONFIG_PCI_PNP /* do pci plug-and-play */
148 #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
149 #define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE */
150
151 /* Board-specific PCI */
152 #define CONFIG_SYS_PCI_TARGET_INIT /* let board init pci target */
153 #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1014 /* IBM */
154 #define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */
155 #define CONFIG_SYS_PCI_FORCE_PCI_CONV /* Force PCI Conventional Mode */
156
157 /*
158 * Networking options
159 */
160 #define CONFIG_PPC4xx_EMAC
161 #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
162 #define CONFIG_MII 1 /* MII PHY management */
163 #define CONFIG_PHY_RESET 1 /* reset phy upon startup */
164 #define CONFIG_SYS_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
165 #define CONFIG_ETHPRIME "ppc_4xx_eth2"
166 #define CONFIG_PHY_ADDR 4 /* PHY address phy0 not populated */
167 #define CONFIG_PHY2_ADDR 4 /* PHY address phy2 */
168 #define CONFIG_HAS_ETH2 1 /* add support for "eth2addr" */
169 #define CONFIG_PHY3_ADDR 8 /* PHY address phy3 */
170 #define CONFIG_HAS_ETH3 1 /* add support for "eth3addr" */
171
172 /* BOOTP options */
173 #define CONFIG_BOOTP_BOOTFILESIZE
174 #define CONFIG_BOOTP_BOOTPATH
175 #define CONFIG_BOOTP_GATEWAY
176 #define CONFIG_BOOTP_HOSTNAME
177
178 /*
179 * Command configuration
180 */
181 #define CONFIG_CMD_DATE
182 #define CONFIG_CMD_EEPROM
183 #define CONFIG_CMD_IRQ
184 #define CONFIG_CMD_JFFS2
185 #define CONFIG_CMD_PCI
186
187 /*
188 * Miscellaneous configurable options
189 */
190 #define CONFIG_SYS_LONGHELP /* undef to save memory */
191 #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
192 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
193 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
194 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
195 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
196 #define CONFIG_CMDLINE_EDITING 1 /* Command-line editing */
197 #define CONFIG_PANIC_HANG /* do not reset board on panic */
198 #define CONFIG_PREBOOT /* enable preboot variable */
199 #define CONFIG_INTEGRITY /* support booting INTEGRITY OS */
200 #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
201
202 /*
203 * For booting Linux, the board info and command line data
204 * have to be in the first 8 MB of memory, since this is
205 * the maximum mapped by the Linux kernel during initialization.
206 */
207 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
208
209 /*
210 * Environment Configuration
211 */
212 #define CONFIG_ENV_IS_IN_FLASH 1
213 #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128k (one sector) for env */
214 #define CONFIG_ENV_SIZE 0x8000
215 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - (256 * 1024))
216
217 /*
218 * Flash memory map:
219 * fff80000 - ffffffff U-Boot (512 KB)
220 * fff40000 - fff7ffff U-Boot Environment (256 KB)
221 * fff00000 - fff3ffff FDT (256KB)
222 * ffc00000 - ffefffff OS image (3MB)
223 * ff000000 - ffbfffff OS Use/Filesystem (12MB)
224 */
225
226 #define CONFIG_UBOOT_ENV_ADDR __stringify(CONFIG_SYS_TEXT_BASE)
227 #define CONFIG_FDT_ENV_ADDR __stringify(0xfff00000)
228 #define CONFIG_OS_ENV_ADDR __stringify(0xffc00000)
229
230 #define CONFIG_PROG_UBOOT \
231 "$download_cmd $loadaddr $ubootfile; " \
232 "if test $? -eq 0; then " \
233 "protect off "CONFIG_UBOOT_ENV_ADDR" +80000; " \
234 "erase "CONFIG_UBOOT_ENV_ADDR" +80000; " \
235 "cp.w $loadaddr "CONFIG_UBOOT_ENV_ADDR" 40000; " \
236 "protect on "CONFIG_UBOOT_ENV_ADDR" +80000; " \
237 "cmp.b $loadaddr "CONFIG_UBOOT_ENV_ADDR" 80000; " \
238 "if test $? -ne 0; then " \
239 "echo PROGRAM FAILED; " \
240 "else; " \
241 "echo PROGRAM SUCCEEDED; " \
242 "fi; " \
243 "else; " \
244 "echo DOWNLOAD FAILED; " \
245 "fi;"
246
247 #define CONFIG_BOOT_OS_NET \
248 "$download_cmd $osaddr $osfile; " \
249 "if test $? -eq 0; then " \
250 "if test -n $fdtaddr; then " \
251 "$download_cmd $fdtaddr $fdtfile; " \
252 "if test $? -eq 0; then " \
253 "bootm $osaddr - $fdtaddr; " \
254 "else; " \
255 "echo FDT DOWNLOAD FAILED; " \
256 "fi; " \
257 "else; " \
258 "bootm $osaddr; " \
259 "fi; " \
260 "else; " \
261 "echo OS DOWNLOAD FAILED; " \
262 "fi;"
263
264 #define CONFIG_PROG_OS \
265 "$download_cmd $osaddr $osfile; " \
266 "if test $? -eq 0; then " \
267 "erase "CONFIG_OS_ENV_ADDR" +$filesize; " \
268 "cp.b $osaddr "CONFIG_OS_ENV_ADDR" $filesize; " \
269 "cmp.b $osaddr "CONFIG_OS_ENV_ADDR" $filesize; " \
270 "if test $? -ne 0; then " \
271 "echo OS PROGRAM FAILED; " \
272 "else; " \
273 "echo OS PROGRAM SUCCEEDED; " \
274 "fi; " \
275 "else; " \
276 "echo OS DOWNLOAD FAILED; " \
277 "fi;"
278
279 #define CONFIG_PROG_FDT \
280 "$download_cmd $fdtaddr $fdtfile; " \
281 "if test $? -eq 0; then " \
282 "erase "CONFIG_FDT_ENV_ADDR" +$filesize;" \
283 "cp.b $fdtaddr "CONFIG_FDT_ENV_ADDR" $filesize; " \
284 "cmp.b $fdtaddr "CONFIG_FDT_ENV_ADDR" $filesize; " \
285 "if test $? -ne 0; then " \
286 "echo FDT PROGRAM FAILED; " \
287 "else; " \
288 "echo FDT PROGRAM SUCCEEDED; " \
289 "fi; " \
290 "else; " \
291 "echo FDT DOWNLOAD FAILED; " \
292 "fi;"
293
294 #define CONFIG_EXTRA_ENV_SETTINGS \
295 "autoload=yes\0" \
296 "download_cmd=tftp\0" \
297 "console_args=console=ttyS0,115200\0" \
298 "root_args=root=/dev/nfs rw\0" \
299 "misc_args=ip=on\0" \
300 "set_bootargs=setenv bootargs ${console_args} ${root_args} ${misc_args}\0" \
301 "bootfile=/home/user/file\0" \
302 "osfile=/home/user/board.uImage\0" \
303 "fdtfile=/home/user/board.dtb\0" \
304 "ubootfile=/home/user/u-boot.bin\0" \
305 "fdtaddr=0x1e00000\0" \
306 "osaddr=0x1000000\0" \
307 "loadaddr=0x1000000\0" \
308 "prog_uboot="CONFIG_PROG_UBOOT"\0" \
309 "prog_os="CONFIG_PROG_OS"\0" \
310 "prog_fdt="CONFIG_PROG_FDT"\0" \
311 "bootcmd_net=run set_bootargs; "CONFIG_BOOT_OS_NET"\0" \
312 "bootcmd_flash=run set_bootargs; " \
313 "bootm "CONFIG_OS_ENV_ADDR" - "CONFIG_FDT_ENV_ADDR"\0" \
314 "bootcmd=run bootcmd_flash\0"
315 #endif /* __CONFIG_H */