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1 /*
2 * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7 /*
8 * config for XPedite1000 from XES Inc.
9 * Ported from EBONY config by Travis B. Sawyer <tsawyer@sandburst.com>
10 * (C) Copyright 2003 Sandburst Corporation
11 * board/config_EBONY.h - configuration for AMCC 440GP Ref (Ebony)
12 */
13
14 #ifndef __CONFIG_H
15 #define __CONFIG_H
16
17 /* High Level Configuration Options */
18 #define CONFIG_XPEDITE1000 1
19 #define CONFIG_SYS_BOARD_NAME "XPedite1000"
20 #define CONFIG_SYS_FORM_PMC 1
21 #define CONFIG_440 1
22 #define CONFIG_440GX 1 /* 440 GX */
23 #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
24
25 #define CONFIG_SYS_TEXT_BASE 0xFFF80000
26
27 /*
28 * DDR config
29 */
30 #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for setup */
31 #define SPD_EEPROM_ADDRESS {0x54} /* SPD i2c spd addresses */
32 #define CONFIG_VERY_BIG_RAM 1
33
34 /*
35 * Base addresses -- Note these are effective addresses where the
36 * actual resources get mapped (not physical addresses)
37 */
38 #define CONFIG_SYS_SDRAM_BASE 0x00000000
39 #define CONFIG_SYS_FLASH_BASE 0xff000000 /* start of FLASH */
40 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
41 #define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
42 #define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */
43 #define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
44 #define CONFIG_SYS_NVRAM_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x08000000)
45 #define CONFIG_SYS_GPIO_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000700)
46
47 /*
48 * Diagnostics
49 */
50 #define CONFIG_SYS_ALT_MEMTEST
51 #define CONFIG_SYS_MEMTEST_START 0x0400000
52 #define CONFIG_SYS_MEMTEST_END 0x0C00000
53
54 /* POST support */
55 #define CONFIG_POST (CONFIG_SYS_POST_RTC | \
56 CONFIG_SYS_POST_I2C)
57
58 /*
59 * LED support
60 */
61 #define USR_LED0 0x00000080
62 #define USR_LED1 0x00000100
63 #define USR_LED2 0x00000200
64 #define USR_LED3 0x00000400
65
66 #ifndef __ASSEMBLY__
67 extern unsigned long in32(unsigned int);
68 extern void out32(unsigned int, unsigned long);
69
70 #define LED0_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED0))
71 #define LED1_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED1))
72 #define LED2_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED2))
73 #define LED3_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED3))
74
75 #define LED0_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED0))
76 #define LED1_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED1))
77 #define LED2_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED2))
78 #define LED3_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED3))
79 #endif
80
81 /*
82 * Use internal SRAM for initial stack
83 */
84 #define CONFIG_SYS_TEMP_STACK_OCM 1
85 #define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_ISRAM_BASE
86 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_ISRAM_BASE /* Initial RAM address */
87 #define CONFIG_SYS_INIT_RAM_SIZE 0x2000 /* Size of used area in RAM */
88 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
89 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
90
91 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 KB for Mon */
92 #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */
93
94 /*
95 * Serial Port
96 */
97 #define CONFIG_CONS_INDEX 1 /* Use UART0 */
98 #define CONFIG_SYS_NS16550_SERIAL
99 #define CONFIG_SYS_NS16550_REG_SIZE 1
100 #define CONFIG_SYS_NS16550_CLK get_serial_clock()
101
102 #define CONFIG_SYS_BAUDRATE_TABLE \
103 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400}
104 #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
105 #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
106
107 /*
108 * NOR flash configuration
109 */
110 #define CONFIG_SYS_MAX_FLASH_BANKS 3
111 #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE, 0xf0000000, 0xf4000000 }
112 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* sectors per device */
113 #define CONFIG_FLASH_CFI_DRIVER
114 #define CONFIG_SYS_FLASH_CFI
115 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
116 #define CONFIG_SYS_FLASH_QUIET_TEST /* MirrorBit flashes are optional */
117 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
118 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
119
120 /*
121 * I2C
122 */
123 #define CONFIG_SYS_I2C
124 #define CONFIG_SYS_I2C_PPC4XX
125 #define CONFIG_SYS_I2C_PPC4XX_CH0
126 #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
127 #define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7f
128
129 /* I2C EEPROM */
130 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
131 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
132 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
133 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
134
135 /* I2C RTC: STMicro M41T00 */
136 #define CONFIG_RTC_M41T11 1
137 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
138 #define CONFIG_SYS_M41T11_BASE_YEAR 2000
139
140 /*
141 * PCI
142 */
143 /* General PCI */
144 #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */
145 #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
146 #define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE */
147
148 /* Board-specific PCI */
149 #define CONFIG_SYS_PCI_TARGET_INIT /* let board init pci target */
150 #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1014 /* IBM */
151 #define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */
152 #define CONFIG_SYS_PCI_FORCE_PCI_CONV /* Force PCI Conventional Mode */
153
154 /*
155 * Networking options
156 */
157 #define CONFIG_PPC4xx_EMAC
158 #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
159 #define CONFIG_MII 1 /* MII PHY management */
160 #define CONFIG_PHY_RESET 1 /* reset phy upon startup */
161 #define CONFIG_SYS_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
162 #define CONFIG_ETHPRIME "ppc_4xx_eth2"
163 #define CONFIG_PHY_ADDR 4 /* PHY address phy0 not populated */
164 #define CONFIG_PHY2_ADDR 4 /* PHY address phy2 */
165 #define CONFIG_HAS_ETH2 1 /* add support for "eth2addr" */
166 #define CONFIG_PHY3_ADDR 8 /* PHY address phy3 */
167 #define CONFIG_HAS_ETH3 1 /* add support for "eth3addr" */
168
169 /* BOOTP options */
170 #define CONFIG_BOOTP_BOOTFILESIZE
171 #define CONFIG_BOOTP_BOOTPATH
172 #define CONFIG_BOOTP_GATEWAY
173 #define CONFIG_BOOTP_HOSTNAME
174
175 /*
176 * Command configuration
177 */
178 #define CONFIG_CMD_PCI
179
180 /*
181 * Miscellaneous configurable options
182 */
183 #define CONFIG_SYS_LONGHELP /* undef to save memory */
184 #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
185 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
186 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
187 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
188 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
189 #define CONFIG_CMDLINE_EDITING 1 /* Command-line editing */
190 #define CONFIG_PANIC_HANG /* do not reset board on panic */
191 #define CONFIG_PREBOOT /* enable preboot variable */
192 #define CONFIG_INTEGRITY /* support booting INTEGRITY OS */
193 #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
194
195 /*
196 * For booting Linux, the board info and command line data
197 * have to be in the first 8 MB of memory, since this is
198 * the maximum mapped by the Linux kernel during initialization.
199 */
200 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
201
202 /*
203 * Environment Configuration
204 */
205 #define CONFIG_ENV_IS_IN_FLASH 1
206 #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128k (one sector) for env */
207 #define CONFIG_ENV_SIZE 0x8000
208 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - (256 * 1024))
209
210 /*
211 * Flash memory map:
212 * fff80000 - ffffffff U-Boot (512 KB)
213 * fff40000 - fff7ffff U-Boot Environment (256 KB)
214 * fff00000 - fff3ffff FDT (256KB)
215 * ffc00000 - ffefffff OS image (3MB)
216 * ff000000 - ffbfffff OS Use/Filesystem (12MB)
217 */
218
219 #define CONFIG_UBOOT_ENV_ADDR __stringify(CONFIG_SYS_TEXT_BASE)
220 #define CONFIG_FDT_ENV_ADDR __stringify(0xfff00000)
221 #define CONFIG_OS_ENV_ADDR __stringify(0xffc00000)
222
223 #define CONFIG_PROG_UBOOT \
224 "$download_cmd $loadaddr $ubootfile; " \
225 "if test $? -eq 0; then " \
226 "protect off "CONFIG_UBOOT_ENV_ADDR" +80000; " \
227 "erase "CONFIG_UBOOT_ENV_ADDR" +80000; " \
228 "cp.w $loadaddr "CONFIG_UBOOT_ENV_ADDR" 40000; " \
229 "protect on "CONFIG_UBOOT_ENV_ADDR" +80000; " \
230 "cmp.b $loadaddr "CONFIG_UBOOT_ENV_ADDR" 80000; " \
231 "if test $? -ne 0; then " \
232 "echo PROGRAM FAILED; " \
233 "else; " \
234 "echo PROGRAM SUCCEEDED; " \
235 "fi; " \
236 "else; " \
237 "echo DOWNLOAD FAILED; " \
238 "fi;"
239
240 #define CONFIG_BOOT_OS_NET \
241 "$download_cmd $osaddr $osfile; " \
242 "if test $? -eq 0; then " \
243 "if test -n $fdtaddr; then " \
244 "$download_cmd $fdtaddr $fdtfile; " \
245 "if test $? -eq 0; then " \
246 "bootm $osaddr - $fdtaddr; " \
247 "else; " \
248 "echo FDT DOWNLOAD FAILED; " \
249 "fi; " \
250 "else; " \
251 "bootm $osaddr; " \
252 "fi; " \
253 "else; " \
254 "echo OS DOWNLOAD FAILED; " \
255 "fi;"
256
257 #define CONFIG_PROG_OS \
258 "$download_cmd $osaddr $osfile; " \
259 "if test $? -eq 0; then " \
260 "erase "CONFIG_OS_ENV_ADDR" +$filesize; " \
261 "cp.b $osaddr "CONFIG_OS_ENV_ADDR" $filesize; " \
262 "cmp.b $osaddr "CONFIG_OS_ENV_ADDR" $filesize; " \
263 "if test $? -ne 0; then " \
264 "echo OS PROGRAM FAILED; " \
265 "else; " \
266 "echo OS PROGRAM SUCCEEDED; " \
267 "fi; " \
268 "else; " \
269 "echo OS DOWNLOAD FAILED; " \
270 "fi;"
271
272 #define CONFIG_PROG_FDT \
273 "$download_cmd $fdtaddr $fdtfile; " \
274 "if test $? -eq 0; then " \
275 "erase "CONFIG_FDT_ENV_ADDR" +$filesize;" \
276 "cp.b $fdtaddr "CONFIG_FDT_ENV_ADDR" $filesize; " \
277 "cmp.b $fdtaddr "CONFIG_FDT_ENV_ADDR" $filesize; " \
278 "if test $? -ne 0; then " \
279 "echo FDT PROGRAM FAILED; " \
280 "else; " \
281 "echo FDT PROGRAM SUCCEEDED; " \
282 "fi; " \
283 "else; " \
284 "echo FDT DOWNLOAD FAILED; " \
285 "fi;"
286
287 #define CONFIG_EXTRA_ENV_SETTINGS \
288 "autoload=yes\0" \
289 "download_cmd=tftp\0" \
290 "console_args=console=ttyS0,115200\0" \
291 "root_args=root=/dev/nfs rw\0" \
292 "misc_args=ip=on\0" \
293 "set_bootargs=setenv bootargs ${console_args} ${root_args} ${misc_args}\0" \
294 "bootfile=/home/user/file\0" \
295 "osfile=/home/user/board.uImage\0" \
296 "fdtfile=/home/user/board.dtb\0" \
297 "ubootfile=/home/user/u-boot.bin\0" \
298 "fdtaddr=0x1e00000\0" \
299 "osaddr=0x1000000\0" \
300 "loadaddr=0x1000000\0" \
301 "prog_uboot="CONFIG_PROG_UBOOT"\0" \
302 "prog_os="CONFIG_PROG_OS"\0" \
303 "prog_fdt="CONFIG_PROG_FDT"\0" \
304 "bootcmd_net=run set_bootargs; "CONFIG_BOOT_OS_NET"\0" \
305 "bootcmd_flash=run set_bootargs; " \
306 "bootm "CONFIG_OS_ENV_ADDR" - "CONFIG_FDT_ENV_ADDR"\0" \
307 "bootcmd=run bootcmd_flash\0"
308 #endif /* __CONFIG_H */