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1 /*
2 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
3 * (C) Copyright 2013 - 2018 Xilinx, Inc.
4 *
5 * Common configuration options for all Zynq boards.
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10 #ifndef __CONFIG_ZYNQ_COMMON_H
11 #define __CONFIG_ZYNQ_COMMON_H
12
13 /* CPU clock */
14 #ifndef CONFIG_CPU_FREQ_HZ
15 # define CONFIG_CPU_FREQ_HZ 800000000
16 #endif
17
18 /* Cache options */
19 #define CONFIG_SYS_L2CACHE_OFF
20 #ifndef CONFIG_SYS_L2CACHE_OFF
21 # define CONFIG_SYS_L2_PL310
22 # define CONFIG_SYS_PL310_BASE 0xf8f02000
23 #endif
24
25 #define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600
26 #define CONFIG_SYS_TIMERBASE ZYNQ_SCUTIMER_BASEADDR
27 #define CONFIG_SYS_TIMER_COUNTS_DOWN
28 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4)
29
30 /* Serial drivers */
31 /* The following table includes the supported baudrates */
32 #define CONFIG_SYS_BAUDRATE_TABLE \
33 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
34
35 #define CONFIG_ARM_DCC
36
37 /* Ethernet driver */
38 #if defined(CONFIG_ZYNQ_GEM)
39 # define CONFIG_MII
40 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
41 # define CONFIG_BOOTP_MAY_FAIL
42 #endif
43
44 /* SPI */
45 #ifdef CONFIG_ZYNQ_SPI
46 #endif
47
48 /* QSPI */
49 #ifdef CONFIG_ZYNQ_QSPI
50 # define CONFIG_SF_DEFAULT_SPEED 30000000
51 # define CONFIG_SPI_FLASH_ISSI
52 #endif
53
54 /* NOR */
55 #ifdef CONFIG_MTD_NOR_FLASH
56 # define CONFIG_SYS_FLASH_BASE 0xE2000000
57 # define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024)
58 # define CONFIG_SYS_MAX_FLASH_BANKS 1
59 # define CONFIG_SYS_MAX_FLASH_SECT 512
60 # define CONFIG_SYS_FLASH_ERASE_TOUT 1000
61 # define CONFIG_SYS_FLASH_WRITE_TOUT 5000
62 # define CONFIG_FLASH_SHOW_PROGRESS 10
63 # define CONFIG_SYS_FLASH_CFI
64 # undef CONFIG_SYS_FLASH_EMPTY_INFO
65 # define CONFIG_FLASH_CFI_DRIVER
66 # undef CONFIG_SYS_FLASH_PROTECTION
67 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
68 #endif
69
70 #ifdef CONFIG_NAND_ZYNQ
71 #define CONFIG_SYS_MAX_NAND_DEVICE 1
72 #define CONFIG_SYS_NAND_ONFI_DETECTION
73 #define CONFIG_MTD_DEVICE
74 #endif
75
76 /* MMC */
77 #if defined(CONFIG_MMC_SDHCI_ZYNQ)
78 # define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000
79 #endif
80
81 #ifdef CONFIG_USB_EHCI_ZYNQ
82 # define CONFIG_EHCI_IS_TDI
83
84 # define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000
85 # define DFU_DEFAULT_POLL_TIMEOUT 300
86 # define CONFIG_USB_CABLE_CHECK
87 # define CONFIG_THOR_RESET_OFF
88 # define DFU_ALT_INFO_RAM \
89 "dfu_ram_info=" \
90 "set dfu_alt_info " \
91 "${kernel_image} ram 0x3000000 0x500000\\\\;" \
92 "${devicetree_image} ram 0x2A00000 0x20000\\\\;" \
93 "${ramdisk_image} ram 0x2000000 0x600000\0" \
94 "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
95 "thor_ram=run dfu_ram_info && thordown 0 ram 0\0"
96
97 # if defined(CONFIG_MMC_SDHCI_ZYNQ)
98 # define DFU_ALT_INFO_MMC \
99 "dfu_mmc_info=" \
100 "set dfu_alt_info " \
101 "${kernel_image} fat 0 1\\\\;" \
102 "${devicetree_image} fat 0 1\\\\;" \
103 "${ramdisk_image} fat 0 1\0" \
104 "dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \
105 "thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0"
106
107 # define DFU_ALT_INFO \
108 DFU_ALT_INFO_RAM \
109 DFU_ALT_INFO_MMC
110 # else
111 # define DFU_ALT_INFO \
112 DFU_ALT_INFO_RAM
113 # endif
114 #endif
115
116 #if !defined(DFU_ALT_INFO)
117 # define DFU_ALT_INFO
118 #endif
119
120 #if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1)
121 #define CONFIG_SYS_I2C_ZYNQ
122 #endif
123
124 /* I2C */
125 #if defined(CONFIG_SYS_I2C_ZYNQ)
126 # define CONFIG_SYS_I2C
127 # define CONFIG_SYS_I2C_ZYNQ_SPEED 100000
128 # define CONFIG_SYS_I2C_ZYNQ_SLAVE 0
129 #endif
130
131 /* EEPROM */
132 #ifdef CONFIG_ZYNQ_EEPROM
133 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
134 # define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
135 # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
136 # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
137 # define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */
138 #endif
139
140 /* Total Size of Environment Sector */
141 #define CONFIG_ENV_SIZE (128 << 10)
142
143 /* Allow to overwrite serial and ethaddr */
144 #define CONFIG_ENV_OVERWRITE
145
146 /* Environment */
147 #ifndef CONFIG_ENV_IS_NOWHERE
148 # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
149 # define CONFIG_ENV_OFFSET 0xE0000
150 #endif
151
152 /* enable preboot to be loaded before CONFIG_BOOTDELAY */
153 #define CONFIG_PREBOOT
154
155 /* Boot configuration */
156 #define CONFIG_SYS_LOAD_ADDR 0 /* default? */
157
158 /* Distro boot enablement */
159
160 #ifdef CONFIG_SPL_BUILD
161 #define BOOTENV
162 #else
163 #include <config_distro_defaults.h>
164
165 #ifdef CONFIG_CMD_MMC
166 #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
167 #else
168 #define BOOT_TARGET_DEVICES_MMC(func)
169 #endif
170
171 #ifdef CONFIG_CMD_USB
172 #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
173 #else
174 #define BOOT_TARGET_DEVICES_USB(func)
175 #endif
176
177 #if defined(CONFIG_CMD_PXE)
178 #define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
179 #else
180 #define BOOT_TARGET_DEVICES_PXE(func)
181 #endif
182
183 #if defined(CONFIG_CMD_DHCP)
184 #define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
185 #else
186 #define BOOT_TARGET_DEVICES_DHCP(func)
187 #endif
188
189 #define BOOT_TARGET_DEVICES(func) \
190 BOOT_TARGET_DEVICES_MMC(func) \
191 BOOT_TARGET_DEVICES_USB(func) \
192 BOOT_TARGET_DEVICES_PXE(func) \
193 BOOT_TARGET_DEVICES_DHCP(func)
194
195 #include <config_distro_bootcmd.h>
196 #endif /* CONFIG_SPL_BUILD */
197
198 /* Default environment */
199 #ifndef CONFIG_EXTRA_ENV_SETTINGS
200 #define CONFIG_EXTRA_ENV_SETTINGS \
201 "fit_image=fit.itb\0" \
202 "load_addr=0x2000000\0" \
203 "fit_size=0x800000\0" \
204 "flash_off=0x100000\0" \
205 "nor_flash_off=0xE2100000\0" \
206 "fdt_high=0x20000000\0" \
207 "initrd_high=0x20000000\0" \
208 "loadbootenv_addr=0x2000000\0" \
209 "fdt_addr_r=0x1f00000\0" \
210 "pxefile_addr_r=0x2000000\0" \
211 "kernel_addr_r=0x2000000\0" \
212 "scriptaddr=0x3000000\0" \
213 "ramdisk_addr_r=0x3100000\0" \
214 "bootenv=uEnv.txt\0" \
215 "bootenv_dev=mmc\0" \
216 "loadbootenv=load ${bootenv_dev} 0 ${loadbootenv_addr} ${bootenv}\0" \
217 "importbootenv=echo Importing environment from ${bootenv_dev} ...; " \
218 "env import -t ${loadbootenv_addr} $filesize\0" \
219 "bootenv_existence_test=test -e ${bootenv_dev} 0 /${bootenv}\0" \
220 "setbootenv=if env run bootenv_existence_test; then " \
221 "if env run loadbootenv; then " \
222 "env run importbootenv; " \
223 "fi; " \
224 "fi; \0" \
225 "sd_loadbootenv=set bootenv_dev mmc && " \
226 "run setbootenv \0" \
227 "usb_loadbootenv=set bootenv_dev usb && usb start && run setbootenv \0" \
228 "preboot=if test $modeboot = sdboot; then " \
229 "run sd_loadbootenv; " \
230 "echo Checking if uenvcmd is set ...; " \
231 "if test -n $uenvcmd; then " \
232 "echo Running uenvcmd ...; " \
233 "run uenvcmd; " \
234 "fi; " \
235 "fi; \0" \
236 "norboot=echo Copying FIT from NOR flash to RAM... && " \
237 "cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \
238 "bootm ${load_addr}\0" \
239 "sdboot=echo Copying FIT from SD to RAM... && " \
240 "load mmc 0 ${load_addr} ${fit_image} && " \
241 "bootm ${load_addr}\0" \
242 "jtagboot=echo TFTPing FIT to RAM... && " \
243 "tftpboot ${load_addr} ${fit_image} && " \
244 "bootm ${load_addr}\0" \
245 "usbboot=if usb start; then " \
246 "echo Copying FIT from USB to RAM... && " \
247 "load usb 0 ${load_addr} ${fit_image} && " \
248 "bootm ${load_addr}; fi\0" \
249 DFU_ALT_INFO \
250 BOOTENV
251 #endif
252
253 /* Miscellaneous configurable options */
254
255 #define CONFIG_CLOCKS
256 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
257
258 #ifndef CONFIG_NR_DRAM_BANKS
259 # define CONFIG_NR_DRAM_BANKS 1
260 #endif
261
262 #define CONFIG_SYS_MEMTEST_START 0
263 #define CONFIG_SYS_MEMTEST_END 0x1000
264
265 #define CONFIG_SYS_MALLOC_LEN 0x1400000
266
267 #define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000
268 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000
269 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
270 CONFIG_SYS_INIT_RAM_SIZE - \
271 GENERATED_GBL_DATA_SIZE)
272
273 /* Enable the PL to be downloaded */
274 #define CONFIG_FPGA_ZYNQPL
275
276 /* FIT support */
277 #define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */
278
279 /* Extend size of kernel image for uncompression */
280 #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
281
282 /* Boot FreeBSD/vxWorks from an ELF image */
283 #define CONFIG_SYS_MMC_MAX_DEVICE 1
284
285 #define CONFIG_SYS_LDSCRIPT "arch/arm/mach-zynq/u-boot.lds"
286
287 /* Commands */
288
289 /* SPL part */
290
291 /* MMC support */
292 #ifdef CONFIG_MMC_SDHCI_ZYNQ
293 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
294 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
295 #endif
296
297 /* Disable dcache for SPL just for sure */
298 #ifdef CONFIG_SPL_BUILD
299 #define CONFIG_SYS_DCACHE_OFF
300 #endif
301
302 /* Address in RAM where the parameters must be copied by SPL. */
303 #define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000
304
305 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "system.dtb"
306 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
307
308 /* Not using MMC raw mode - just for compilation purpose */
309 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0
310 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0
311 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0
312
313 /* qspi mode is working fine */
314 #ifdef CONFIG_ZYNQ_QSPI
315 #define CONFIG_SPL_SPI_LOAD
316 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000
317 #define CONFIG_SYS_SPI_ARGS_OFFS 0x200000
318 #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000
319 #define CONFIG_SYS_SPI_KERNEL_OFFS (CONFIG_SYS_SPI_ARGS_OFFS + \
320 CONFIG_SYS_SPI_ARGS_SIZE)
321 #endif
322
323 /* for booting directly linux */
324
325 /* SP location before relocation, must use scratch RAM */
326 #define CONFIG_SPL_TEXT_BASE 0x0
327
328 /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
329 #define CONFIG_SPL_MAX_SIZE 0x30000
330
331 /* On the top of OCM space */
332 #define CONFIG_SYS_SPL_MALLOC_START CONFIG_SPL_STACK_R_ADDR
333 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000000
334
335 /*
336 * SPL stack position - and stack goes down
337 * 0xfffffe00 is used for putting wfi loop.
338 * Set it up as limit for now.
339 */
340 #define CONFIG_SPL_STACK 0xfffffe00
341
342 /* BSS setup */
343 #define CONFIG_SPL_BSS_START_ADDR 0x100000
344 #define CONFIG_SPL_BSS_MAX_SIZE 0x100000
345
346 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
347
348 #endif /* __CONFIG_ZYNQ_COMMON_H */