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git.ipfire.org Git - people/ms/u-boot.git/blob - post/drivers/memory.c
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * SPDX-License-Identifier: GPL-2.0+
12 * General observations:
13 * o The recommended test sequence is to test the data lines: if they are
14 * broken, nothing else will work properly. Then test the address
15 * lines. Finally, test the cells in the memory now that the test
16 * program knows that the address and data lines work properly.
17 * This sequence also helps isolate and identify what is faulty.
19 * o For the address line test, it is a good idea to use the base
20 * address of the lowest memory location, which causes a '1' bit to
21 * walk through a field of zeros on the address lines and the highest
22 * memory location, which causes a '0' bit to walk through a field of
23 * '1's on the address line.
25 * o Floating buses can fool memory tests if the test routine writes
26 * a value and then reads it back immediately. The problem is, the
27 * write will charge the residual capacitance on the data bus so the
28 * bus retains its state briefely. When the test program reads the
29 * value back immediately, the capacitance of the bus can allow it
30 * to read back what was written, even though the memory circuitry
31 * is broken. To avoid this, the test program should write a test
32 * pattern to the target location, write a different pattern elsewhere
33 * to charge the residual capacitance in a differnt manner, then read
34 * the target location back.
36 * o Always read the target location EXACTLY ONCE and save it in a local
37 * variable. The problem with reading the target location more than
38 * once is that the second and subsequent reads may work properly,
39 * resulting in a failed test that tells the poor technician that
40 * "Memory error at 00000000, wrote aaaaaaaa, read aaaaaaaa" which
41 * doesn't help him one bit and causes puzzled phone calls. Been there,
46 * This tests data lines for shorts and opens by forcing adjacent data
47 * to opposite states. Because the data lines could be routed in an
48 * arbitrary manner the must ensure test patterns ensure that every case
49 * is tested. By using the following series of binary patterns every
50 * combination of adjacent bits is test regardless of routing.
52 * ...101010101010101010101010
53 * ...110011001100110011001100
54 * ...111100001111000011110000
55 * ...111111110000000011111111
57 * Carrying this out, gives us six hex patterns as follows:
66 * To test for short and opens to other signals on our boards, we
67 * simply test with the 1's complemnt of the paterns as well, resulting
68 * in twelve patterns total.
70 * After writing a test pattern. a special pattern 0x0123456789ABCDEF is
71 * written to a different address in case the data lines are floating.
72 * Thus, if a byte lane fails, you will see part of the special
73 * pattern in that byte lane when the test runs. For example, if the
74 * xx__xxxxxxxxxxxx byte line fails, you will see aa23aaaaaaaaaaaa
75 * (for the 'a' test pattern).
79 * This function performs a test to verify that all the address lines
80 * hooked up to the RAM work properly. If there is an address line
81 * fault, it usually shows up as two different locations in the address
82 * map (related by the faulty address line) mapping to one physical
83 * memory storage location. The artifact that shows up is writing to
84 * the first location "changes" the second location.
86 * To test all address lines, we start with the given base address and
87 * xor the address with a '1' bit to flip one address line. For each
88 * test, we shift the '1' bit left to test the next address line.
90 * In the actual code, we start with address sizeof(ulong) since our
91 * test pattern we use is a ulong and thus, if we tried to test lower
92 * order address bits, it wouldn't work because our pattern would
95 * Example for a 4 bit address space with the base at 0000:
101 * Example for a 4 bit address space with the base at 0010:
104 * 0000 <- (below the base address, skipped)
108 * The test locations are successively tested to make sure that they are
109 * not "mirrored" onto the base address due to a faulty address line.
110 * Note that the base and each test location are related by one address
111 * line flipped. Note that the base address need not be all zeros.
115 * These tests verify RAM using sequential writes and reads
116 * to/from RAM. There are several test cases that use different patterns to
117 * verify RAM. Each test case fills a region of RAM with one pattern and
118 * then reads the region back and compares its contents with the pattern.
119 * The following patterns are used:
121 * 1a) zero pattern (0x00000000)
122 * 1b) negative pattern (0xffffffff)
123 * 1c) checkerboard pattern (0x55555555)
124 * 1d) checkerboard pattern (0xaaaaaaaa)
125 * 2) bit-flip pattern ((1 << (offset % 32))
126 * 3) address pattern (offset)
127 * 4) address pattern (~offset)
129 * Being run in normal mode, the test verifies only small 4Kb
130 * regions of RAM around each 1Mb boundary. For example, for 64Mb
131 * RAM the following areas are verified: 0x00000000-0x00000800,
132 * 0x000ff800-0x00100800, 0x001ff800-0x00200800, ..., 0x03fff800-
133 * 0x04000000. If the test is run in slow-test mode, it verifies
138 #include <watchdog.h>
140 #if CONFIG_POST & (CONFIG_SYS_POST_MEMORY | CONFIG_SYS_POST_MEM_REGIONS)
142 DECLARE_GLOBAL_DATA_PTR
;
145 * Define INJECT_*_ERRORS for testing error detection in the presence of
148 #undef INJECT_DATA_ERRORS
149 #undef INJECT_ADDRESS_ERRORS
151 #ifdef INJECT_DATA_ERRORS
152 #warning "Injecting data line errors for testing purposes"
155 #ifdef INJECT_ADDRESS_ERRORS
156 #warning "Injecting address line errors for testing purposes"
161 * This function performs a double word move from the data at
162 * the source pointer to the location at the destination pointer.
163 * This is helpful for testing memory on processors which have a 64 bit
166 * On those PowerPC with FPU, use assembly and a floating point move:
167 * this does a 64 bit move.
169 * For other processors, let the compiler generate the best code it can.
171 static void move64(const unsigned long long *src
, unsigned long long *dest
)
173 #if defined(CONFIG_MPC8260) || defined(CONFIG_MPC824X)
174 asm ("lfd 0, 0(3)\n\t" /* fpr0 = *scr */
175 "stfd 0, 0(4)" /* *dest = fpr0 */
176 : : : "fr0" ); /* Clobbers fr0 */
184 * This is 64 bit wide test patterns. Note that they reside in ROM
185 * (which presumably works) and the tests write them to RAM which may
188 * The "otherpattern" is written to drive the data bus to values other
189 * than the test pattern. This is for detecting floating bus lines.
192 const static unsigned long long pattern
[] = {
193 0xaaaaaaaaaaaaaaaaULL
,
194 0xccccccccccccccccULL
,
195 0xf0f0f0f0f0f0f0f0ULL
,
196 0xff00ff00ff00ff00ULL
,
197 0xffff0000ffff0000ULL
,
198 0xffffffff00000000ULL
,
199 0x00000000ffffffffULL
,
200 0x0000ffff0000ffffULL
,
201 0x00ff00ff00ff00ffULL
,
202 0x0f0f0f0f0f0f0f0fULL
,
203 0x3333333333333333ULL
,
204 0x5555555555555555ULL
206 const unsigned long long otherpattern
= 0x0123456789abcdefULL
;
209 static int memory_post_dataline(unsigned long long * pmem
)
211 unsigned long long temp64
= 0;
212 int num_patterns
= ARRAY_SIZE(pattern
);
214 unsigned int hi
, lo
, pathi
, patlo
;
217 for ( i
= 0; i
< num_patterns
; i
++) {
218 move64(&(pattern
[i
]), pmem
++);
220 * Put a different pattern on the data lines: otherwise they
221 * may float long enough to read back what we wrote.
223 move64(&otherpattern
, pmem
--);
224 move64(pmem
, &temp64
);
226 #ifdef INJECT_DATA_ERRORS
227 temp64
^= 0x00008000;
230 if (temp64
!= pattern
[i
]){
231 pathi
= (pattern
[i
]>>32) & 0xffffffff;
232 patlo
= pattern
[i
] & 0xffffffff;
234 hi
= (temp64
>>32) & 0xffffffff;
235 lo
= temp64
& 0xffffffff;
237 post_log("Memory (date line) error at %08x, "
238 "wrote %08x%08x, read %08x%08x !\n",
239 pmem
, pathi
, patlo
, hi
, lo
);
246 static int memory_post_addrline(ulong
*testaddr
, ulong
*base
, ulong size
)
254 end
= (ulong
*)((ulong
)base
+ size
); /* pointer arith! */
256 for(xor = sizeof(ulong
); xor > 0; xor <<= 1) {
257 target
= (ulong
*)((ulong
)testaddr
^ xor);
258 if((target
>= base
) && (target
< end
)) {
259 *testaddr
= ~*target
;
262 #ifdef INJECT_ADDRESS_ERRORS
263 if(xor == 0x00008000) {
264 readback
= *testaddr
;
267 if(readback
== *testaddr
) {
268 post_log("Memory (address line) error at %08x<->%08x, "
269 "XOR value %08x !\n",
270 testaddr
, target
, xor);
278 static int memory_post_test1(unsigned long start
,
283 ulong
*mem
= (ulong
*) start
;
287 for (i
= 0; i
< size
/ sizeof (ulong
); i
++) {
293 for (i
= 0; i
< size
/ sizeof (ulong
) && !ret
; i
++) {
295 if (readback
!= val
) {
296 post_log("Memory error at %08x, "
297 "wrote %08x, read %08x !\n",
298 mem
+ i
, val
, readback
);
310 static int memory_post_test2(unsigned long start
, unsigned long size
)
313 ulong
*mem
= (ulong
*) start
;
317 for (i
= 0; i
< size
/ sizeof (ulong
); i
++) {
318 mem
[i
] = 1 << (i
% 32);
323 for (i
= 0; i
< size
/ sizeof (ulong
) && !ret
; i
++) {
325 if (readback
!= (1 << (i
% 32))) {
326 post_log("Memory error at %08x, "
327 "wrote %08x, read %08x !\n",
328 mem
+ i
, 1 << (i
% 32), readback
);
340 static int memory_post_test3(unsigned long start
, unsigned long size
)
343 ulong
*mem
= (ulong
*) start
;
347 for (i
= 0; i
< size
/ sizeof (ulong
); i
++) {
353 for (i
= 0; i
< size
/ sizeof (ulong
) && !ret
; i
++) {
356 post_log("Memory error at %08x, "
357 "wrote %08x, read %08x !\n",
358 mem
+ i
, i
, readback
);
370 static int memory_post_test4(unsigned long start
, unsigned long size
)
373 ulong
*mem
= (ulong
*) start
;
377 for (i
= 0; i
< size
/ sizeof (ulong
); i
++) {
383 for (i
= 0; i
< size
/ sizeof (ulong
) && !ret
; i
++) {
385 if (readback
!= ~i
) {
386 post_log("Memory error at %08x, "
387 "wrote %08x, read %08x !\n",
388 mem
+ i
, ~i
, readback
);
400 static int memory_post_test_lines(unsigned long start
, unsigned long size
)
404 ret
= memory_post_dataline((unsigned long long *)start
);
407 ret
= memory_post_addrline((ulong
*)start
, (ulong
*)start
,
411 ret
= memory_post_addrline((ulong
*)(start
+size
-8),
412 (ulong
*)start
, size
);
418 static int memory_post_test_patterns(unsigned long start
, unsigned long size
)
422 ret
= memory_post_test1(start
, size
, 0x00000000);
425 ret
= memory_post_test1(start
, size
, 0xffffffff);
428 ret
= memory_post_test1(start
, size
, 0x55555555);
431 ret
= memory_post_test1(start
, size
, 0xaaaaaaaa);
434 ret
= memory_post_test2(start
, size
);
437 ret
= memory_post_test3(start
, size
);
440 ret
= memory_post_test4(start
, size
);
446 static int memory_post_test_regions(unsigned long start
, unsigned long size
)
451 for (i
= 0; i
< (size
>> 20) && (!ret
); i
++) {
453 ret
= memory_post_test_patterns(start
+ (i
<< 20),
456 ret
= memory_post_test_patterns(start
+ (i
<< 20) +
463 static int memory_post_tests(unsigned long start
, unsigned long size
)
467 ret
= memory_post_test_lines(start
, size
);
469 ret
= memory_post_test_patterns(start
, size
);
475 * !! this is only valid, if you have contiguous memory banks !!
477 __attribute__((weak
))
478 int arch_memory_test_prepare(u32
*vstart
, u32
*size
, phys_addr_t
*phys_offset
)
482 *vstart
= CONFIG_SYS_SDRAM_BASE
;
483 *size
= (gd
->ram_size
>= 256 << 20 ?
484 256 << 20 : gd
->ram_size
) - (1 << 20);
486 /* Limit area to be tested with the board info struct */
487 if ((*vstart
) + (*size
) > (ulong
)bd
)
488 *size
= (ulong
)bd
- *vstart
;
493 __attribute__((weak
))
494 int arch_memory_test_advance(u32
*vstart
, u32
*size
, phys_addr_t
*phys_offset
)
499 __attribute__((weak
))
500 int arch_memory_test_cleanup(u32
*vstart
, u32
*size
, phys_addr_t
*phys_offset
)
505 __attribute__((weak
))
506 void arch_memory_failure_handle(void)
511 int memory_regions_post_test(int flags
)
514 phys_addr_t phys_offset
= 0;
517 arch_memory_test_prepare(&vstart
, &memsize
, &phys_offset
);
519 ret
= memory_post_test_lines(vstart
, memsize
);
521 ret
= memory_post_test_regions(vstart
, memsize
);
526 int memory_post_test(int flags
)
529 phys_addr_t phys_offset
= 0;
532 arch_memory_test_prepare(&vstart
, &memsize
, &phys_offset
);
535 if (flags
& POST_SLOWTEST
) {
536 ret
= memory_post_tests(vstart
, memsize
);
537 } else { /* POST_NORMAL */
538 ret
= memory_post_test_regions(vstart
, memsize
);
541 !arch_memory_test_advance(&vstart
, &memsize
, &phys_offset
));
543 arch_memory_test_cleanup(&vstart
, &memsize
, &phys_offset
);
545 arch_memory_failure_handle();
550 #endif /* CONFIG_POST&(CONFIG_SYS_POST_MEMORY|CONFIG_SYS_POST_MEM_REGIONS) */