post/drivers/memory.c

   1 /*
   2  * (C) Copyright 2002
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <common.h>
  25
  26 /* Memory test
  27  *
  28  * General observations:
  29  * o The recommended test sequence is to test the data lines: if they are
  30  *   broken, nothing else will work properly.  Then test the address
  31  *   lines.  Finally, test the cells in the memory now that the test
  32  *   program knows that the address and data lines work properly.
  33  *   This sequence also helps isolate and identify what is faulty.
  34  *
  35  * o For the address line test, it is a good idea to use the base
  36  *   address of the lowest memory location, which causes a '1' bit to
  37  *   walk through a field of zeros on the address lines and the highest
  38  *   memory location, which causes a '0' bit to walk through a field of
  39  *   '1's on the address line.
  40  *
  41  * o Floating buses can fool memory tests if the test routine writes
  42  *   a value and then reads it back immediately.  The problem is, the
  43  *   write will charge the residual capacitance on the data bus so the
  44  *   bus retains its state briefely.  When the test program reads the
  45  *   value back immediately, the capacitance of the bus can allow it
  46  *   to read back what was written, even though the memory circuitry
  47  *   is broken.  To avoid this, the test program should write a test
  48  *   pattern to the target location, write a different pattern elsewhere
  49  *   to charge the residual capacitance in a differnt manner, then read
  50  *   the target location back.
  51  *
  52  * o Always read the target location EXACTLY ONCE and save it in a local
  53  *   variable.  The problem with reading the target location more than
  54  *   once is that the second and subsequent reads may work properly,
  55  *   resulting in a failed test that tells the poor technician that
  56  *   "Memory error at 00000000, wrote aaaaaaaa, read aaaaaaaa" which
  57  *   doesn't help him one bit and causes puzzled phone calls.  Been there,
  58  *   done that.
  59  *
  60  * Data line test:
  61  * ---------------
  62  * This tests data lines for shorts and opens by forcing adjacent data
  63  * to opposite states. Because the data lines could be routed in an
  64  * arbitrary manner the must ensure test patterns ensure that every case
  65  * is tested. By using the following series of binary patterns every
  66  * combination of adjacent bits is test regardless of routing.
  67  *
  68  *     ...101010101010101010101010
  69  *     ...110011001100110011001100
  70  *     ...111100001111000011110000
  71  *     ...111111110000000011111111
  72  *
  73  * Carrying this out, gives us six hex patterns as follows:
  74  *
  75  *     0xaaaaaaaaaaaaaaaa
  76  *     0xcccccccccccccccc
  77  *     0xf0f0f0f0f0f0f0f0
  78  *     0xff00ff00ff00ff00
  79  *     0xffff0000ffff0000
  80  *     0xffffffff00000000
  81  *
  82  * To test for short and opens to other signals on our boards, we
  83  * simply test with the 1's complemnt of the paterns as well, resulting
  84  * in twelve patterns total.
  85  *
  86  * After writing a test pattern. a special pattern 0x0123456789ABCDEF is
  87  * written to a different address in case the data lines are floating.
  88  * Thus, if a byte lane fails, you will see part of the special
  89  * pattern in that byte lane when the test runs.  For example, if the
  90  * xx__xxxxxxxxxxxx byte line fails, you will see aa23aaaaaaaaaaaa
  91  * (for the 'a' test pattern).
  92  *
  93  * Address line test:
  94  * ------------------
  95  *  This function performs a test to verify that all the address lines
  96  *  hooked up to the RAM work properly.  If there is an address line
  97  *  fault, it usually shows up as two different locations in the address
  98  *  map (related by the faulty address line) mapping to one physical
  99  *  memory storage location.  The artifact that shows up is writing to
 100  *  the first location "changes" the second location.
 101  *
 102  * To test all address lines, we start with the given base address and
 103  * xor the address with a '1' bit to flip one address line.  For each
 104  * test, we shift the '1' bit left to test the next address line.
 105  *
 106  * In the actual code, we start with address sizeof(ulong) since our
 107  * test pattern we use is a ulong and thus, if we tried to test lower
 108  * order address bits, it wouldn't work because our pattern would
 109  * overwrite itself.
 110  *
 111  * Example for a 4 bit address space with the base at 0000:
 112  *   0000 <- base
 113  *   0001 <- test 1
 114  *   0010 <- test 2
 115  *   0100 <- test 3
 116  *   1000 <- test 4
 117  * Example for a 4 bit address space with the base at 0010:
 118  *   0010 <- base
 119  *   0011 <- test 1
 120  *   0000 <- (below the base address, skipped)
 121  *   0110 <- test 2
 122  *   1010 <- test 3
 123  *
 124  * The test locations are successively tested to make sure that they are
 125  * not "mirrored" onto the base address due to a faulty address line.
 126  * Note that the base and each test location are related by one address
 127  * line flipped.  Note that the base address need not be all zeros.
 128  *
 129  * Memory tests 1-4:
 130  * -----------------
 131  * These tests verify RAM using sequential writes and reads
 132  * to/from RAM. There are several test cases that use different patterns to
 133  * verify RAM. Each test case fills a region of RAM with one pattern and
 134  * then reads the region back and compares its contents with the pattern.
 135  * The following patterns are used:
 136  *
 137  *  1a) zero pattern (0x00000000)
 138  *  1b) negative pattern (0xffffffff)
 139  *  1c) checkerboard pattern (0x55555555)
 140  *  1d) checkerboard pattern (0xaaaaaaaa)
 141  *  2)  bit-flip pattern ((1 << (offset % 32))
 142  *  3)  address pattern (offset)
 143  *  4)  address pattern (~offset)
 144  *
 145  * Being run in normal mode, the test verifies only small 4Kb
 146  * regions of RAM around each 1Mb boundary. For example, for 64Mb
 147  * RAM the following areas are verified: 0x00000000-0x00000800,
 148  * 0x000ff800-0x00100800, 0x001ff800-0x00200800, ..., 0x03fff800-
 149  * 0x04000000. If the test is run in slow-test mode, it verifies
 150  * the whole RAM.
 151  */
 152
 153 #include <post.h>
 154 #include <watchdog.h>
 155
 156 #if CONFIG_POST & CONFIG_SYS_POST_MEMORY
 157
 158 DECLARE_GLOBAL_DATA_PTR;
 159
 160 /*
 161  * Define INJECT_*_ERRORS for testing error detection in the presence of
 162  * _good_ hardware.
 163  */
 164 #undef  INJECT_DATA_ERRORS
 165 #undef  INJECT_ADDRESS_ERRORS
 166
 167 #ifdef INJECT_DATA_ERRORS
 168 #warning "Injecting data line errors for testing purposes"
 169 #endif
 170
 171 #ifdef INJECT_ADDRESS_ERRORS
 172 #warning "Injecting address line errors for testing purposes"
 173 #endif
 174
 175
 176 /*
 177  * This function performs a double word move from the data at
 178  * the source pointer to the location at the destination pointer.
 179  * This is helpful for testing memory on processors which have a 64 bit
 180  * wide data bus.
 181  *
 182  * On those PowerPC with FPU, use assembly and a floating point move:
 183  * this does a 64 bit move.
 184  *
 185  * For other processors, let the compiler generate the best code it can.
 186  */
 187 static void move64(const unsigned long long *src, unsigned long long *dest)
 188 {
 189 #if defined(CONFIG_MPC8260) || defined(CONFIG_MPC824X)
 190         asm ("lfd  0, 0(3)\n\t" /* fpr0   =  *scr       */
 191          "stfd 0, 0(4)"         /* *dest  =  fpr0       */
 192          : : : "fr0" );         /* Clobbers fr0         */
 193     return;
 194 #else
 195         *dest = *src;
 196 #endif
 197 }
 198
 199 /*
 200  * This is 64 bit wide test patterns.  Note that they reside in ROM
 201  * (which presumably works) and the tests write them to RAM which may
 202  * not work.
 203  *
 204  * The "otherpattern" is written to drive the data bus to values other
 205  * than the test pattern.  This is for detecting floating bus lines.
 206  *
 207  */
 208 const static unsigned long long pattern[] = {
 209         0xaaaaaaaaaaaaaaaaULL,
 210         0xccccccccccccccccULL,
 211         0xf0f0f0f0f0f0f0f0ULL,
 212         0xff00ff00ff00ff00ULL,
 213         0xffff0000ffff0000ULL,
 214         0xffffffff00000000ULL,
 215         0x00000000ffffffffULL,
 216         0x0000ffff0000ffffULL,
 217         0x00ff00ff00ff00ffULL,
 218         0x0f0f0f0f0f0f0f0fULL,
 219         0x3333333333333333ULL,
 220         0x5555555555555555ULL
 221 };
 222 const unsigned long long otherpattern = 0x0123456789abcdefULL;
 223
 224
 225 static int memory_post_dataline(unsigned long long * pmem)
 226 {
 227         unsigned long long temp64 = 0;
 228         int num_patterns = sizeof(pattern)/ sizeof(pattern[0]);
 229         int i;
 230         unsigned int hi, lo, pathi, patlo;
 231         int ret = 0;
 232
 233         for ( i = 0; i < num_patterns; i++) {
 234                 move64(&(pattern[i]), pmem++);
 235                 /*
 236                  * Put a different pattern on the data lines: otherwise they
 237                  * may float long enough to read back what we wrote.
 238                  */
 239                 move64(&otherpattern, pmem--);
 240                 move64(pmem, &temp64);
 241
 242 #ifdef INJECT_DATA_ERRORS
 243                 temp64 ^= 0x00008000;
 244 #endif
 245
 246                 if (temp64 != pattern[i]){
 247                         pathi = (pattern[i]>>32) & 0xffffffff;
 248                         patlo = pattern[i] & 0xffffffff;
 249
 250                         hi = (temp64>>32) & 0xffffffff;
 251                         lo = temp64 & 0xffffffff;
 252
 253                         post_log ("Memory (date line) error at %08x, "
 254                                   "wrote %08x%08x, read %08x%08x !\n",
 255                                           pmem, pathi, patlo, hi, lo);
 256                         ret = -1;
 257                 }
 258         }
 259         return ret;
 260 }
 261
 262 static int memory_post_addrline(ulong *testaddr, ulong *base, ulong size)
 263 {
 264         ulong *target;
 265         ulong *end;
 266         ulong readback;
 267         ulong xor;
 268         int   ret = 0;
 269
 270         end = (ulong *)((ulong)base + size);    /* pointer arith! */
 271         xor = 0;
 272         for(xor = sizeof(ulong); xor > 0; xor <<= 1) {
 273                 target = (ulong *)((ulong)testaddr ^ xor);
 274                 if((target >= base) && (target < end)) {
 275                         *testaddr = ~*target;
 276                         readback  = *target;
 277
 278 #ifdef INJECT_ADDRESS_ERRORS
 279                         if(xor == 0x00008000) {
 280                                 readback = *testaddr;
 281                         }
 282 #endif
 283                         if(readback == *testaddr) {
 284                                 post_log ("Memory (address line) error at %08x<->%08x, "
 285                                         "XOR value %08x !\n",
 286                                         testaddr, target, xor);
 287                                 ret = -1;
 288                         }
 289                 }
 290         }
 291         return ret;
 292 }
 293
 294 static int memory_post_test1 (unsigned long start,
 295                               unsigned long size,
 296                               unsigned long val)
 297 {
 298         unsigned long i;
 299         ulong *mem = (ulong *) start;
 300         ulong readback;
 301         int ret = 0;
 302
 303         for (i = 0; i < size / sizeof (ulong); i++) {
 304                 mem[i] = val;
 305                 if (i % 1024 == 0)
 306                         WATCHDOG_RESET ();
 307         }
 308
 309         for (i = 0; i < size / sizeof (ulong) && ret == 0; i++) {
 310                 readback = mem[i];
 311                 if (readback != val) {
 312                         post_log ("Memory error at %08x, "
 313                                   "wrote %08x, read %08x !\n",
 314                                           mem + i, val, readback);
 315
 316                         ret = -1;
 317                         break;
 318                 }
 319                 if (i % 1024 == 0)
 320                         WATCHDOG_RESET ();
 321         }
 322
 323         return ret;
 324 }
 325
 326 static int memory_post_test2 (unsigned long start, unsigned long size)
 327 {
 328         unsigned long i;
 329         ulong *mem = (ulong *) start;
 330         ulong readback;
 331         int ret = 0;
 332
 333         for (i = 0; i < size / sizeof (ulong); i++) {
 334                 mem[i] = 1 << (i % 32);
 335                 if (i % 1024 == 0)
 336                         WATCHDOG_RESET ();
 337         }
 338
 339         for (i = 0; i < size / sizeof (ulong) && ret == 0; i++) {
 340                 readback = mem[i];
 341                 if (readback != (1 << (i % 32))) {
 342                         post_log ("Memory error at %08x, "
 343                                   "wrote %08x, read %08x !\n",
 344                                           mem + i, 1 << (i % 32), readback);
 345
 346                         ret = -1;
 347                         break;
 348                 }
 349                 if (i % 1024 == 0)
 350                         WATCHDOG_RESET ();
 351         }
 352
 353         return ret;
 354 }
 355
 356 static int memory_post_test3 (unsigned long start, unsigned long size)
 357 {
 358         unsigned long i;
 359         ulong *mem = (ulong *) start;
 360         ulong readback;
 361         int ret = 0;
 362
 363         for (i = 0; i < size / sizeof (ulong); i++) {
 364                 mem[i] = i;
 365                 if (i % 1024 == 0)
 366                         WATCHDOG_RESET ();
 367         }
 368
 369         for (i = 0; i < size / sizeof (ulong) && ret == 0; i++) {
 370                 readback = mem[i];
 371                 if (readback != i) {
 372                         post_log ("Memory error at %08x, "
 373                                   "wrote %08x, read %08x !\n",
 374                                           mem + i, i, readback);
 375
 376                         ret = -1;
 377                         break;
 378                 }
 379                 if (i % 1024 == 0)
 380                         WATCHDOG_RESET ();
 381         }
 382
 383         return ret;
 384 }
 385
 386 static int memory_post_test4 (unsigned long start, unsigned long size)
 387 {
 388         unsigned long i;
 389         ulong *mem = (ulong *) start;
 390         ulong readback;
 391         int ret = 0;
 392
 393         for (i = 0; i < size / sizeof (ulong); i++) {
 394                 mem[i] = ~i;
 395                 if (i % 1024 == 0)
 396                         WATCHDOG_RESET ();
 397         }
 398
 399         for (i = 0; i < size / sizeof (ulong) && ret == 0; i++) {
 400                 readback = mem[i];
 401                 if (readback != ~i) {
 402                         post_log ("Memory error at %08x, "
 403                                   "wrote %08x, read %08x !\n",
 404                                           mem + i, ~i, readback);
 405
 406                         ret = -1;
 407                         break;
 408                 }
 409                 if (i % 1024 == 0)
 410                         WATCHDOG_RESET ();
 411         }
 412
 413         return ret;
 414 }
 415
 416 static int memory_post_tests (unsigned long start, unsigned long size)
 417 {
 418         int ret = 0;
 419
 420         if (ret == 0)
 421                 ret = memory_post_dataline ((unsigned long long *)start);
 422         WATCHDOG_RESET ();
 423         if (ret == 0)
 424                 ret = memory_post_addrline ((ulong *)start, (ulong *)start, size);
 425         WATCHDOG_RESET ();
 426         if (ret == 0)
 427                 ret = memory_post_addrline ((ulong *)(start + size - 8),
 428                                             (ulong *)start, size);
 429         WATCHDOG_RESET ();
 430         if (ret == 0)
 431                 ret = memory_post_test1 (start, size, 0x00000000);
 432         WATCHDOG_RESET ();
 433         if (ret == 0)
 434                 ret = memory_post_test1 (start, size, 0xffffffff);
 435         WATCHDOG_RESET ();
 436         if (ret == 0)
 437                 ret = memory_post_test1 (start, size, 0x55555555);
 438         WATCHDOG_RESET ();
 439         if (ret == 0)
 440                 ret = memory_post_test1 (start, size, 0xaaaaaaaa);
 441         WATCHDOG_RESET ();
 442         if (ret == 0)
 443                 ret = memory_post_test2 (start, size);
 444         WATCHDOG_RESET ();
 445         if (ret == 0)
 446                 ret = memory_post_test3 (start, size);
 447         WATCHDOG_RESET ();
 448         if (ret == 0)
 449                 ret = memory_post_test4 (start, size);
 450         WATCHDOG_RESET ();
 451
 452         return ret;
 453 }
 454
 455 int memory_post_test (int flags)
 456 {
 457         int ret = 0;
 458         bd_t *bd = gd->bd;
 459         unsigned long memsize = (bd->bi_memsize >= 256 << 20 ?
 460                                  256 << 20 : bd->bi_memsize) - (1 << 20);
 461
 462         /* Limit area to be tested with the board info struct */
 463         if (CONFIG_SYS_SDRAM_BASE + memsize > (ulong)bd)
 464                 memsize = (ulong)bd - CONFIG_SYS_SDRAM_BASE;
 465
 466         if (flags & POST_SLOWTEST) {
 467                 ret = memory_post_tests (CONFIG_SYS_SDRAM_BASE, memsize);
 468         } else {                        /* POST_NORMAL */
 469
 470                 unsigned long i;
 471
 472                 for (i = 0; i < (memsize >> 20) && ret == 0; i++) {
 473                         if (ret == 0)
 474                                 ret = memory_post_tests (i << 20, 0x800);
 475                         if (ret == 0)
 476                                 ret = memory_post_tests ((i << 20) + 0xff800, 0x800);
 477                 }
 478         }
 479
 480         return ret;
 481 }
 482
 483 #endif /* CONFIG_POST & CONFIG_SYS_POST_MEMORY */