tegra: spl: Enable debug UART

[people/ms/u-boot.git] / .travis.yml

diff --git a/.travis.yml b/.travis.yml
index f7287ae254126bc6e854a0791d9ca6093aaacd8a..7b9ec1eb5a6d07e4ea9b5e5a15ea137703d3dc41 100644 (file)
--- a/.travis.yml
+++ b/.travis.yml
@@ -205,6 +205,8 @@ matrix:
         - BUILDMAN="corenet_ds b4860qds sbc8548 bsc91*"
     - env:
         - BUILDMAN="mpc86xx"
+    - env:
+        - BUILDMAN="mpc8xx"
     - env:
         - BUILDMAN="siemens"
     - env: