/arch Architecture specific files
/arc Files generic to ARC architecture
/arm Files generic to ARM architecture
- /avr32 Files generic to AVR32 architecture
/m68k Files generic to m68k architecture
/microblaze Files generic to microblaze architecture
/mips Files generic to MIPS architecture
- Board Type: Define exactly one, e.g. CONFIG_MPC8540ADS.
-- CPU Daughterboard Type: (if CONFIG_ATSTK1000 is defined)
- Define exactly one, e.g. CONFIG_ATSTK1002
-
- Marvell Family Member
CONFIG_SYS_MVFS - define it if you want to enable
multiple fs option at one time
* Adds the "fdt" command
* The bootm command automatically updates the fdt
- OF_CPU - The proper name of the cpus node (only required for
- MPC512X and MPC5xxx based boards).
- OF_SOC - The proper name of the soc node (only required for
- MPC512X and MPC5xxx based boards).
OF_TBCLK - The timebase frequency.
OF_STDOUT_PATH - The path to the console device
CONFIG_CMD_RUN run command in env variable
CONFIG_CMD_SANDBOX * sb command to access sandbox features
CONFIG_CMD_SAVES * save S record dump
- CONFIG_SCSI * SCSI Support
CONFIG_CMD_SDRAM * print SDRAM configuration information
(requires CONFIG_CMD_I2C)
- CONFIG_CMD_SETGETDCR Support for DCR Register access
- (4xx only)
CONFIG_CMD_SF * Read/write/erase SPI NOR flash
CONFIG_CMD_SOFTSWITCH * Soft switch setting command for BF60x
CONFIG_CMD_SOURCE "source" command Support
(configuration option CONFIG_CMD_CACHE) unless you know
what you (and your U-Boot users) are doing. Data
cache cannot be enabled on systems like the
- 8260 (where accesses to the IMMR region must be
+ 8xx (where accesses to the IMMR region must be
uncached), and it cannot be disabled on all other
systems where we (mis-) use the data cache to hold an
initial stack and some data.
CONFIG_WATCHDOG
If this variable is defined, it enables watchdog
support for the SoC. There must be support in the SoC
- specific code for a watchdog. When supported for a
- specific SoC is available, then no further board specific
- code should be needed to use it.
+ specific code for a watchdog. For the 8xx
+ CPUs, the SIU Watchdog feature is enabled in the SYPCR
+ register. When supported for a specific SoC is
+ available, then no further board specific code should
+ be needed to use it.
CONFIG_HW_WATCHDOG
When using a watchdog circuitry external to the used
Default is 32bit.
- SCSI Support:
- At the moment only there is only support for the
- SYM53C8XX SCSI controller; define
- CONFIG_SCSI_SYM53C8XX to enable it.
-
CONFIG_SYS_SCSI_MAX_LUN [8], CONFIG_SYS_SCSI_MAX_SCSI_ID [7] and
CONFIG_SYS_SCSI_MAX_DEVICE [CONFIG_SYS_SCSI_MAX_SCSI_ID *
CONFIG_SYS_SCSI_MAX_LUN] can be adjusted to define the
maximum numbers of LUNs, SCSI ID's and target
devices.
- CONFIG_SYS_SCSI_SYM53C8XX_CCF to fix clock timing (80Mhz)
The environment variable 'scsidevs' is set to the number of
SCSI devices found during the last scan.
- USB Support:
At the moment only the UHCI host controller is
- supported (PIP405, MIP405, MPC5200); define
+ supported (PIP405, MIP405); define
CONFIG_USB_UHCI to enable it.
define CONFIG_USB_KEYBOARD to enable the USB Keyboard
and define CONFIG_USB_STORAGE to enable the USB
Note:
Supported are USB Keyboards and USB Floppy drives
(TEAC FD-05PUB).
- MPC5200 USB requires additional defines:
- CONFIG_USB_CLOCK
- for 528 MHz Clock: 0x0001bbbb
- CONFIG_PSC3_USB
- for USB on PSC3
- CONFIG_USB_CONFIG
- for differential drivers: 0x00001000
- for single ended drivers: 0x00005000
- for differential drivers on PSC3: 0x00000100
- for single ended drivers on PSC3: 0x00004100
- CONFIG_SYS_USB_EVENT_POLL
- May be defined to allow interrupt polling
- instead of using asynchronous interrupts
CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the
txfilltuning field in the EHCI controller on reset.
In such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined
with a list of GPIO LEDs that have inverted polarity.
-- CAN Support: CONFIG_CAN_DRIVER
-
- Defining CONFIG_CAN_DRIVER enables CAN driver support
- on those systems that support this (optional)
- feature.
-
- I2C Support: CONFIG_SYS_I2C
This enable the NEW i2c subsystem, and will allow you to use
Define this option to include a destructive SPI flash
test ('sf test').
- CONFIG_SF_DUAL_FLASH Dual flash memories
-
- Define this option to use dual flash support where two flash
- memories can be connected with a given cs line.
- Currently Xilinx Zynq qspi supports these type of connections.
-
- SystemACE Support:
CONFIG_SYSTEMACE
- CONFIG_SYS_IMMR: Physical address of the Internal Memory.
DO NOT CHANGE unless you know exactly what you're
- doing! (11-4) [82xx systems only]
+ doing! (11-4) [MPC8xx systems only]
- CONFIG_SYS_INIT_RAM_ADDR:
sequences.
U-Boot uses the following memory types:
- - PPC4xx: data cache
+ - MPC8xx: IMMR (internal memory of the CPU)
- CONFIG_SYS_GBL_DATA_OFFSET:
CONFIG_SYS_OR3_PRELIM, CONFIG_SYS_BR3_PRELIM:
Memory Controller Definitions: BR2/3 and OR2/3 (SDRAM)
-- CONFIG_PCI_DISABLE_PCIE:
- Disable PCI-Express on systems where it is supported but not
- required.
-
- CONFIG_PCI_ENUM_ONLY
Only scan through and get the devices on the buses.
Don't do any setup work, presumably because someone or
LynxOS, pSOS, QNX, RTEMS, INTEGRITY;
Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, LynxOS,
INTEGRITY).
-* Target CPU Architecture (Provisions for Alpha, ARM, AVR32, Intel x86,
+* Target CPU Architecture (Provisions for Alpha, ARM, Intel x86,
IA64, MIPS, NDS32, Nios II, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit;
- Currently supported: ARM, AVR32, Intel x86, MIPS, NDS32, Nios II, PowerPC).
+ Currently supported: ARM, Intel x86, MIPS, NDS32, Nios II, PowerPC).
* Compression Type (uncompressed, gzip, bzip2)
* Load Address
* Entry Point
projects / people / ms / u-boot.git / blobdiff