arc: significant cache rework

[people/ms/u-boot.git] / arch / arc / include / asm / arcregs.h

diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
index 8ace87fa0f25953a910161c8c9eaf4e845822b9f..667f218bd808d669c17a4d3cd02150a39d25094c 100644 (file)
--- a/arch/arc/include/asm/arcregs.h
+++ b/arch/arc/include/asm/arcregs.h
@@ -7,6 +7,8 @@
 #ifndef _ASM_ARC_ARCREGS_H
 #define _ASM_ARC_ARCREGS_H
 
+#include <asm/cache.h>
+
 /*
  * ARC architecture has additional address space - auxiliary registers.
  * These registers are mostly used for configuration purposes.
@@ -21,7 +23,7 @@
 #define ARC_AUX_IC_IVIC                0x10
 #define ARC_AUX_IC_CTRL                0x11
 #define ARC_AUX_IC_IVIL                0x19
-#if (CONFIG_ARC_MMU_VER > 2)
+#if (CONFIG_ARC_MMU_VER == 3)
 #define ARC_AUX_IC_PTAG                0x1E
 #endif
 #define ARC_BCR_IC_BUILD       0x77
@@ -40,10 +42,17 @@
 #define ARC_AUX_DC_IVDL                0x4A
 #define ARC_AUX_DC_FLSH                0x4B
 #define ARC_AUX_DC_FLDL                0x4C
-#if (CONFIG_ARC_MMU_VER > 2)
+#if (CONFIG_ARC_MMU_VER == 3)
 #define ARC_AUX_DC_PTAG                0x5C
 #endif
 #define ARC_BCR_DC_BUILD       0x72
+#define ARC_BCR_SLC            0xce
+#define ARC_AUX_SLC_CONFIG     0x901
+#define ARC_AUX_SLC_CTRL       0x903
+#define ARC_AUX_SLC_FLUSH      0x904
+#define ARC_AUX_SLC_INVALIDATE 0x905
+#define ARC_AUX_SLC_IVDL       0x910
+#define ARC_AUX_SLC_FLDL       0x912
 
 #ifndef __ASSEMBLY__
 /* Accessors for auxiliary registers */