imx: imx-common: power down lcdif before boot os

[people/ms/u-boot.git] / arch / arm / imx-common / cpu.c

diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c
index b58df7da6fc1e3f992e2f5f5ad2e4b40afabb1ea..656bb60bbe203e7fffa2d4c8536fc9d4069f7bb5 100644 (file)
--- a/arch/arm/imx-common/cpu.c
+++ b/arch/arm/imx-common/cpu.c
@@ -16,6 +16,7 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/arch/crm_regs.h>
+#include <imx_thermal.h>
 #include <ipu_pixfmt.h>
 #include <thermal.h>
 #include <sata.h>
@@ -24,13 +25,17 @@
 #include <fsl_esdhc.h>
 #endif
 
-char *get_reset_cause(void)
+#if defined(CONFIG_DISPLAY_CPUINFO)
+static u32 reset_cause = -1;
+
+static char *get_reset_cause(void)
 {
        u32 cause;
        struct src *src_regs = (struct src *)SRC_BASE_ADDR;
 
        cause = readl(&src_regs->srsr);
        writel(cause, &src_regs->srsr);
+       reset_cause = cause;
 
        switch (cause) {
        case 0x00001:
@@ -41,18 +46,39 @@ char *get_reset_cause(void)
        case 0x00008:
                return "IPP USER";
        case 0x00010:
+#ifdef CONFIG_MX7
+               return "WDOG1";
+#else
                return "WDOG";
+#endif
        case 0x00020:
                return "JTAG HIGH-Z";
        case 0x00040:
                return "JTAG SW";
+       case 0x00080:
+               return "WDOG3";
+#ifdef CONFIG_MX7
+       case 0x00100:
+               return "WDOG4";
+       case 0x00200:
+               return "TEMPSENSE";
+#else
+       case 0x00100:
+               return "TEMPSENSE";
        case 0x10000:
                return "WARM BOOT";
+#endif
        default:
                return "unknown reset";
        }
 }
 
+u32 get_imx_reset_cause(void)
+{
+       return reset_cause;
+}
+#endif
+
 #if defined(CONFIG_MX53) || defined(CONFIG_MX6)
 #if defined(CONFIG_MX53)
 #define MEMCTL_BASE    ESDCTL_BASE_ADDR
@@ -111,6 +137,12 @@ unsigned imx_ddr_size(void)
 const char *get_imx_type(u32 imxtype)
 {
        switch (imxtype) {
+       case MXC_CPU_MX7D:
+               return "7D";    /* Dual-core version of the mx7 */
+       case MXC_CPU_MX6QP:
+               return "6QP";   /* Quad-Plus version of the mx6 */
+       case MXC_CPU_MX6DP:
+               return "6DP";   /* Dual-Plus version of the mx6 */
        case MXC_CPU_MX6Q:
                return "6Q";    /* Quad-core version of the mx6 */
        case MXC_CPU_MX6D:
@@ -123,6 +155,8 @@ const char *get_imx_type(u32 imxtype)
                return "6SL";   /* Solo-Lite version of the mx6 */
        case MXC_CPU_MX6SX:
                return "6SX";   /* SoloX version of the mx6 */
+       case MXC_CPU_MX6UL:
+               return "6UL";   /* Ultra-Lite version of the mx6 */
        case MXC_CPU_MX51:
                return "51";
        case MXC_CPU_MX53:
@@ -135,31 +169,60 @@ const char *get_imx_type(u32 imxtype)
 int print_cpuinfo(void)
 {
        u32 cpurev;
-
-#if defined(CONFIG_MX6) && defined(CONFIG_IMX6_THERMAL)
-       struct udevice *thermal_dev;
-       int cpu_tmp, ret;
-#endif
+       __maybe_unused u32 max_freq;
 
        cpurev = get_cpu_rev();
 
+#if defined(CONFIG_IMX_THERMAL)
+       struct udevice *thermal_dev;
+       int cpu_tmp, minc, maxc, ret;
+
+       printf("CPU:   Freescale i.MX%s rev%d.%d",
+              get_imx_type((cpurev & 0xFF000) >> 12),
+              (cpurev & 0x000F0) >> 4,
+              (cpurev & 0x0000F) >> 0);
+       max_freq = get_cpu_speed_grade_hz();
+       if (!max_freq || max_freq == mxc_get_clock(MXC_ARM_CLK)) {
+               printf(" at %dMHz\n", mxc_get_clock(MXC_ARM_CLK) / 1000000);
+       } else {
+               printf(" %d MHz (running at %d MHz)\n", max_freq / 1000000,
+                      mxc_get_clock(MXC_ARM_CLK) / 1000000);
+       }
+#else
        printf("CPU:   Freescale i.MX%s rev%d.%d at %d MHz\n",
                get_imx_type((cpurev & 0xFF000) >> 12),
                (cpurev & 0x000F0) >> 4,
                (cpurev & 0x0000F) >> 0,
                mxc_get_clock(MXC_ARM_CLK) / 1000000);
+#endif
 
-#if defined(CONFIG_MX6) && defined(CONFIG_IMX6_THERMAL)
+#if defined(CONFIG_IMX_THERMAL)
+       puts("CPU:   ");
+       switch (get_cpu_temp_grade(&minc, &maxc)) {
+       case TEMP_AUTOMOTIVE:
+               puts("Automotive temperature grade ");
+               break;
+       case TEMP_INDUSTRIAL:
+               puts("Industrial temperature grade ");
+               break;
+       case TEMP_EXTCOMMERCIAL:
+               puts("Extended Commercial temperature grade ");
+               break;
+       default:
+               puts("Commercial temperature grade ");
+               break;
+       }
+       printf("(%dC to %dC)", minc, maxc);
        ret = uclass_get_device(UCLASS_THERMAL, 0, &thermal_dev);
        if (!ret) {
                ret = thermal_get_temp(thermal_dev, &cpu_tmp);
 
                if (!ret)
-                       printf("CPU:   Temperature %d C\n", cpu_tmp);
+                       printf(" at %dC\n", cpu_tmp);
                else
-                       printf("CPU:   Temperature: invalid sensor data\n");
+                       debug(" - invalid sensor data\n");
        } else {
-               printf("CPU:   Temperature: Can't find sensor device\n");
+               debug(" - invalid sensor device\n");
        }
 #endif
 
@@ -190,6 +253,7 @@ int cpu_mmc_init(bd_t *bis)
 }
 #endif
 
+#ifndef CONFIG_MX7
 u32 get_ahb_clk(void)
 {
        struct mxc_ccm_reg *imx_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
@@ -201,16 +265,23 @@ u32 get_ahb_clk(void)
 
        return get_periph_clk() / (ahb_podf + 1);
 }
+#endif
 
 void arch_preboot_os(void)
 {
 #if defined(CONFIG_CMD_SATA)
        sata_stop();
+#if defined(CONFIG_MX6)
+       disable_sata_clock();
+#endif
 #endif
 #if defined(CONFIG_VIDEO_IPUV3)
        /* disable video before launching O/S */
        ipuv3_fb_shutdown();
 #endif
+#if defined(CONFIG_VIDEO_MXS)
+       lcdif_power_down();
+#endif
 }
 
 void set_chipselect_size(int const cs_size)