armv8: ls1088a: Add NXP LS1088A SoC support

[people/ms/u-boot.git] / arch / arm / include / asm / arch-fsl-layerscape / immap_lsch3.h

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
index 59410aa7e74454404aa85bdf3c8001a188095464..99a7413611d86f13d6665312a92b8463fdb929f9 100644 (file)
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
@@ -246,6 +246,17 @@ struct ccsr_gur {
 #define FSL_CHASSIS3_SRDS2_PRTCL_SHIFT FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_SHIFT
 #define FSL_CHASSIS3_SRDS1_REGSR       29
 #define FSL_CHASSIS3_SRDS2_REGSR       29
+#elif defined(CONFIG_ARCH_LS1088A)
+#define        FSL_CHASSIS3_RCWSR29_SRDS1_PRTCL_MASK   0xFFFF0000
+#define        FSL_CHASSIS3_RCWSR29_SRDS1_PRTCL_SHIFT  16
+#define        FSL_CHASSIS3_RCWSR30_SRDS2_PRTCL_MASK   0x0000FFFF
+#define        FSL_CHASSIS3_RCWSR30_SRDS2_PRTCL_SHIFT  0
+#define FSL_CHASSIS3_SRDS1_PRTCL_MASK  FSL_CHASSIS3_RCWSR29_SRDS1_PRTCL_MASK
+#define FSL_CHASSIS3_SRDS1_PRTCL_SHIFT FSL_CHASSIS3_RCWSR29_SRDS1_PRTCL_SHIFT
+#define FSL_CHASSIS3_SRDS2_PRTCL_MASK  FSL_CHASSIS3_RCWSR30_SRDS2_PRTCL_MASK
+#define FSL_CHASSIS3_SRDS2_PRTCL_SHIFT FSL_CHASSIS3_RCWSR30_SRDS2_PRTCL_SHIFT
+#define FSL_CHASSIS3_SRDS1_REGSR       29
+#define FSL_CHASSIS3_SRDS2_REGSR       30
 #endif
 #define RCW_SB_EN_REG_INDEX    9
 #define RCW_SB_EN_MASK         0x00000400