drivers, block: remove sil680 driver

[people/ms/u-boot.git] / board / amcc / bamboo / bamboo.c

diff --git a/board/amcc/bamboo/bamboo.c b/board/amcc/bamboo/bamboo.c
index 41957c9b8f69e4a1edb3644b4091c24a46c7f651..9f642071cc5d93759752ae73bb7d9369bc13b9f8 100644 (file)
--- a/board/amcc/bamboo/bamboo.c
+++ b/board/amcc/bamboo/bamboo.c
@@ -2,23 +2,7 @@
  * (C) Copyright 2005-2007
  * Stefan Roese, DENX Software Engineering, sr@denx.de.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -28,11 +12,12 @@
 #include <asm/ppc440.h>
 #include "bamboo.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 void ext_bus_cntlr_init(void);
 void configure_ppc440ep_pins(void);
 int is_nand_selected(void);
 
-#if !(defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL))
 /*************************************************************************
  *
  * Bamboo has one bank onboard sdram (plus DIMM)
@@ -194,7 +179,6 @@ const unsigned char cfg_simulate_spd_eeprom[128] = {
        0,
        0
 };
-#endif
 
 #if 0
 {         /* GPIO   Alternate1       Alternate2        Alternate3 */
@@ -440,12 +424,13 @@ int board_early_init_f(void)
 
 int checkboard(void)
 {
-       char *s = getenv("serial#");
+       char buf[64];
+       int i = getenv_f("serial#", buf, sizeof(buf));
 
        printf("Board: Bamboo - AMCC PPC440EP Evaluation Board");
-       if (s != NULL) {
+       if (i > 0) {
                puts(", serial# ");
-               puts(s);
+               puts(buf);
        }
        putc('\n');
 
@@ -453,17 +438,11 @@ int checkboard(void)
 }
 
 
-phys_size_t initdram (int board_type)
+int dram_init(void)
 {
-#if !(defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL))
-       long dram_size;
+       gd->ram_size = spd_sdram();
 
-       dram_size = spd_sdram();
-
-       return dram_size;
-#else
-       return CONFIG_SYS_MBYTES_SDRAM << 20;
-#endif
+       return 0;
 }
 
 /*----------------------------------------------------------------------------+
@@ -476,16 +455,16 @@ int is_powerpc440ep_pass1(void)
        pvr = get_pvr();
 
        if (pvr == PVR_POWERPC_440EP_PASS1)
-               return TRUE;
+               return true;
        else if (pvr == PVR_POWERPC_440EP_PASS2)
-               return FALSE;
+               return false;
        else {
                printf("brdutil error 3\n");
                for (;;)
                        ;
        }
 
-       return(FALSE);
+       return false;
 }
 
 /*----------------------------------------------------------------------------+
@@ -494,9 +473,9 @@ int is_powerpc440ep_pass1(void)
 int is_nand_selected(void)
 {
 #ifdef CONFIG_BAMBOO_NAND
-       return TRUE;
+       return true;
 #else
-       return FALSE;
+       return false;
 #endif
 }
 
@@ -506,7 +485,7 @@ int is_nand_selected(void)
 unsigned char config_on_ebc_cs4_is_small_flash(void)
 {
        /* Not implemented yet => returns constant value */
-       return TRUE;
+       return true;
 }
 
 /*----------------------------------------------------------------------------+
@@ -554,13 +533,13 @@ void ext_bus_cntlr_init(void)
          |
          +-------------------------------------------------------------------------*/
        /* Read Pin Strap Register in PPC440EP */
-       mfsdr(sdr_pstrp0, sdr0_pstrp0);
+       mfsdr(SDR0_PINSTP, sdr0_pstrp0);
        bootstrap_settings = sdr0_pstrp0 & SDR0_PSTRP0_BOOTSTRAP_MASK;
 
        /*-------------------------------------------------------------------------+
          |  PPC440EP Pass1
          +-------------------------------------------------------------------------*/
-       if (is_powerpc440ep_pass1() == TRUE) {
+       if (is_powerpc440ep_pass1() == true) {
                switch(bootstrap_settings) {
                case SDR0_PSTRP0_BOOTSTRAP_SETTINGS0:
                        /* Default Strap Settings 0 : CPU 400 - PLB 133 - Boot EBC 8 bit 33MHz */
@@ -737,7 +716,7 @@ void ext_bus_cntlr_init(void)
                /*------------------------------------------------------------------------- */
                ebc0_cs0_bnap_value = EBC0_BNAP_SMALL_FLASH;
                ebc0_cs0_bncr_value = EBC0_BNCR_SMALL_FLASH_CS0;
-               if ((is_nand_selected()) == TRUE) {
+               if ((is_nand_selected()) == true) {
                        /* NAND Flash */
                        ebc0_cs1_bnap_value = EBC0_BNAP_NAND_FLASH;
                        ebc0_cs1_bncr_value = EBC0_BNCR_NAND_FLASH_CS1;
@@ -764,7 +743,7 @@ void ext_bus_cntlr_init(void)
                /*------------------------------------------------------------------------- */
                ebc0_cs0_bnap_value = EBC0_BNAP_LARGE_FLASH_OR_SRAM;
                ebc0_cs0_bncr_value = EBC0_BNCR_LARGE_FLASH_OR_SRAM_CS0;
-               if ((is_nand_selected()) == TRUE) {
+               if ((is_nand_selected()) == true) {
                        /* NAND Flash */
                        ebc0_cs1_bnap_value = EBC0_BNAP_NAND_FLASH;
                        ebc0_cs1_bncr_value = EBC0_BNCR_NAND_FLASH_CS1;
@@ -811,7 +790,7 @@ void ext_bus_cntlr_init(void)
                ebc0_cs0_bnap_value = 0;
                ebc0_cs0_bncr_value = 0;
 
-               if ((is_nand_selected()) == TRUE) {
+               if ((is_nand_selected()) == true) {
                        /* NAND Flash */
                        ebc0_cs1_bnap_value = EBC0_BNAP_NAND_FLASH;
                        ebc0_cs1_bncr_value = EBC0_BNCR_NAND_FLASH_CS1;
@@ -829,7 +808,7 @@ void ext_bus_cntlr_init(void)
                        ebc0_cs3_bncr_value = 0;
                }
 
-               if ((config_on_ebc_cs4_is_small_flash()) == TRUE) {
+               if ((config_on_ebc_cs4_is_small_flash()) == true) {
                        /* Small Flash */
                        ebc0_cs4_bnap_value = EBC0_BNAP_SMALL_FLASH;
                        ebc0_cs4_bncr_value = EBC0_BNCR_SMALL_FLASH_CS4;
@@ -1809,23 +1788,12 @@ void configure_ppc440ep_pins(void)
        if (ppc440ep_core_selection[NAND_FLASH] == CORE_SELECTED)
        {
                update_ndfc_ios(gpio_tab);
-
-#if !(defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL))
                mtsdr(SDR0_CUST0, SDR0_CUST0_MUX_NDFC_SEL   |
                      SDR0_CUST0_NDFC_ENABLE    |
                      SDR0_CUST0_NDFC_BW_8_BIT  |
                      SDR0_CUST0_NDFC_ARE_MASK  |
                      SDR0_CUST0_CHIPSELGAT_EN1 |
                      SDR0_CUST0_CHIPSELGAT_EN2);
-#else
-               mtsdr(SDR0_CUST0, SDR0_CUST0_MUX_NDFC_SEL   |
-                     SDR0_CUST0_NDFC_ENABLE    |
-                     SDR0_CUST0_NDFC_BW_8_BIT  |
-                     SDR0_CUST0_NDFC_ARE_MASK  |
-                     SDR0_CUST0_CHIPSELGAT_EN0 |
-                     SDR0_CUST0_CHIPSELGAT_EN2);
-#endif
-
                ndfc_selection_in_fpga();
        }
        else
@@ -1912,7 +1880,7 @@ void configure_ppc440ep_pins(void)
        if (ppc440ep_core_selection[PACKET_REJ_FUNC_EN] == CORE_SELECTED)
        {
                mfsdr(SDR0_MFR, sdr0_mfr);
-               sdr0_mfr = (sdr0_mfr & ~SDR0_MFR_PKT_REJ_MASK) | SDR0_MFR_PKT_REJ_EN;;
+               sdr0_mfr = (sdr0_mfr & ~SDR0_MFR_PKT_REJ_MASK) | SDR0_MFR_PKT_REJ_EN;
                mtsdr(SDR0_MFR, sdr0_mfr);
        }