drivers, block: remove sil680 driver

[people/ms/u-boot.git] / board / esd / pmc440 / init.S

diff --git a/board/esd/pmc440/init.S b/board/esd/pmc440/init.S
index cc8030b5e5e125d8b7f144d2b97271d2ce3ea915..1f26fad147792fbb48fec4f9e66d367d7e88a6f6 100644 (file)
--- a/board/esd/pmc440/init.S
+++ b/board/esd/pmc440/init.S
@@ -27,11 +27,7 @@ tlbtab:
         * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the
         * speed up boot process. It is patched after relocation to enable SA_I
         */
-#ifndef CONFIG_NAND_SPL
        tlbentry( CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M, CONFIG_SYS_BOOT_BASE_ADDR, 1, AC_RWX | SA_G )
-#else
-       tlbentry( CONFIG_SYS_NAND_BOOT_SPL_SRC, SZ_4K, CONFIG_SYS_NAND_BOOT_SPL_SRC, 1, AC_RWX | SA_G )
-#endif
 
        /* TLB entries for DDR2 SDRAM are generated dynamically */
 
@@ -71,31 +67,3 @@ tlbtab:
 
        /* TODO:  what about high IO space */
        tlbtab_end
-
-#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
-       /*
-        * For NAND booting the first TLB has to be reconfigured to full size
-        * and with caching disabled after running from RAM!
-        */
-#define TLB00  TLB0(CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M)
-#define TLB01  TLB1(CONFIG_SYS_BOOT_BASE_ADDR, 1)
-#define TLB02  TLB2(AC_RWX | SA_IG)
-
-       .globl  reconfig_tlb0
-reconfig_tlb0:
-       sync
-       isync
-       addi    r4,r0,0x0000            /* TLB entry #0 */
-       lis     r5,TLB00@h
-       ori     r5,r5,TLB00@l
-       tlbwe   r5,r4,0x0000            /* Save it out */
-       lis     r5,TLB01@h
-       ori     r5,r5,TLB01@l
-       tlbwe   r5,r4,0x0001            /* Save it out */
-       lis     r5,TLB02@h
-       ori     r5,r5,TLB02@l
-       tlbwe   r5,r4,0x0002            /* Save it out */
-       sync
-       isync
-       blr
-#endif